Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Heiko Stübner | 7b2500b | 2017-02-18 19:46:33 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2014 MundoReader S.L. |
| 4 | * Author: Heiko Stuebner <heiko@sntech.de> |
Heiko Stübner | 7b2500b | 2017-02-18 19:46:33 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H |
| 8 | #define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H |
| 9 | |
| 10 | #include <dt-bindings/clock/rk3188-cru-common.h> |
| 11 | |
| 12 | /* soft-reset indices */ |
| 13 | #define SRST_PTM_CORE2 0 |
| 14 | #define SRST_PTM_CORE3 1 |
| 15 | #define SRST_CORE2 5 |
| 16 | #define SRST_CORE3 6 |
| 17 | #define SRST_CORE2_DBG 10 |
| 18 | #define SRST_CORE3_DBG 11 |
| 19 | |
| 20 | #define SRST_TIMER2 16 |
| 21 | #define SRST_TIMER4 23 |
| 22 | #define SRST_I2S0 24 |
| 23 | #define SRST_TIMER5 25 |
| 24 | #define SRST_TIMER3 29 |
| 25 | #define SRST_TIMER6 31 |
| 26 | |
| 27 | #define SRST_PTM3 36 |
| 28 | #define SRST_PTM3_ATB 37 |
| 29 | |
| 30 | #define SRST_GPS 67 |
| 31 | #define SRST_HSICPHY 75 |
| 32 | #define SRST_TIMER 78 |
| 33 | |
| 34 | #define SRST_PTM2 92 |
| 35 | #define SRST_CORE2_WDT 94 |
| 36 | #define SRST_CORE3_WDT 95 |
| 37 | |
| 38 | #define SRST_PTM2_ATB 111 |
| 39 | |
| 40 | #define SRST_HSIC 117 |
| 41 | #define SRST_CTI2 118 |
| 42 | #define SRST_CTI2_APB 119 |
| 43 | #define SRST_GPU_BRIDGE 121 |
| 44 | #define SRST_CTI3 123 |
| 45 | #define SRST_CTI3_APB 124 |
| 46 | |
| 47 | #endif |