blob: 9b3d5324e0e432df5da80baaf5ad6a4a134ebadb [file] [log] [blame]
Poonam Aggrwale394ceb2012-12-23 19:22:33 +00001/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Roy Zang <tie-fei.zang@freescale.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Poonam Aggrwale394ceb2012-12-23 19:22:33 +00006 */
7#include <common.h>
8#include <phy.h>
9#include <fm_eth.h>
10#include <asm/io.h>
11#include <asm/immap_85xx.h>
12#include <asm/fsl_serdes.h>
13
14u32 port_to_devdisr[] = {
15 [FM1_DTSEC1] = FSL_CORENET_DEVDISR2_DTSEC1_1,
16 [FM1_DTSEC2] = FSL_CORENET_DEVDISR2_DTSEC1_2,
17 [FM1_DTSEC3] = FSL_CORENET_DEVDISR2_DTSEC1_3,
18 [FM1_DTSEC4] = FSL_CORENET_DEVDISR2_DTSEC1_4,
19 [FM1_DTSEC5] = FSL_CORENET_DEVDISR2_DTSEC1_5,
20 [FM1_DTSEC6] = FSL_CORENET_DEVDISR2_DTSEC1_6,
21 [FM1_10GEC1] = FSL_CORENET_DEVDISR2_10GEC1_1,
22 [FM1_10GEC2] = FSL_CORENET_DEVDISR2_10GEC1_2,
23};
24
25static int is_device_disabled(enum fm_port port)
26{
27 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
28 u32 devdisr2 = in_be32(&gur->devdisr2);
29
30 return port_to_devdisr[port] & devdisr2;
31}
32
33void fman_disable_port(enum fm_port port)
34{
35 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
36
37 setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
38}
39
40phy_interface_t fman_port_enet_if(enum fm_port port)
41{
42 if (is_device_disabled(port))
43 return PHY_INTERFACE_MODE_NONE;
44
Suresh Gupta16d88f42013-03-25 07:40:13 +000045 /*B4860 has two 10Gig Mac*/
46 if ((port == FM1_10GEC1 || port == FM1_10GEC2) &&
47 ((is_serdes_configured(XAUI_FM1_MAC9)) ||
48 (is_serdes_configured(XAUI_FM1_MAC10))))
Poonam Aggrwale394ceb2012-12-23 19:22:33 +000049 return PHY_INTERFACE_MODE_XGMII;
50
51 /* Fix me need to handle RGMII here first */
52
53 switch (port) {
54 case FM1_DTSEC1:
55 case FM1_DTSEC2:
56 case FM1_DTSEC3:
57 case FM1_DTSEC4:
58 case FM1_DTSEC5:
59 case FM1_DTSEC6:
60 if (is_serdes_configured(SGMII_FM1_DTSEC1 + port - FM1_DTSEC1))
61 return PHY_INTERFACE_MODE_SGMII;
62 break;
63 default:
64 return PHY_INTERFACE_MODE_NONE;
65 }
66
67 return PHY_INTERFACE_MODE_NONE;
68}