Kumar Gala | c916d7c | 2011-04-13 08:37:44 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 3 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame^] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Kumar Gala | c916d7c | 2011-04-13 08:37:44 -0500 | [diff] [blame] | 5 | */ |
| 6 | #include <common.h> |
| 7 | #include <phy.h> |
| 8 | #include <fm_eth.h> |
| 9 | #include <asm/io.h> |
| 10 | #include <asm/immap_85xx.h> |
| 11 | #include <asm/fsl_serdes.h> |
| 12 | |
Kim Phillips | 960d70c | 2012-10-29 13:34:34 +0000 | [diff] [blame] | 13 | static u32 port_to_devdisr[] = { |
Kumar Gala | c916d7c | 2011-04-13 08:37:44 -0500 | [diff] [blame] | 14 | [FM1_DTSEC1] = MPC85xx_DEVDISR_TSEC1, |
| 15 | [FM1_DTSEC2] = MPC85xx_DEVDISR_TSEC2, |
| 16 | }; |
| 17 | |
| 18 | static int is_device_disabled(enum fm_port port) |
| 19 | { |
| 20 | ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
| 21 | u32 devdisr = in_be32(&gur->devdisr); |
| 22 | |
| 23 | return port_to_devdisr[port] & devdisr; |
| 24 | } |
| 25 | |
Kumar Gala | 69a8524 | 2011-09-14 12:01:35 -0500 | [diff] [blame] | 26 | void fman_disable_port(enum fm_port port) |
| 27 | { |
| 28 | ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
Kumar Gala | f5b9e73 | 2011-10-14 03:17:56 -0500 | [diff] [blame] | 29 | |
| 30 | /* don't allow disabling of DTSEC1 as its needed for MDIO */ |
| 31 | if (port == FM1_DTSEC1) |
| 32 | return; |
| 33 | |
Kumar Gala | 69a8524 | 2011-09-14 12:01:35 -0500 | [diff] [blame] | 34 | setbits_be32(&gur->devdisr, port_to_devdisr[port]); |
| 35 | } |
| 36 | |
Kumar Gala | c916d7c | 2011-04-13 08:37:44 -0500 | [diff] [blame] | 37 | phy_interface_t fman_port_enet_if(enum fm_port port) |
| 38 | { |
| 39 | ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
| 40 | u32 pordevsr = in_be32(&gur->pordevsr); |
| 41 | |
| 42 | if (is_device_disabled(port)) |
| 43 | return PHY_INTERFACE_MODE_NONE; |
| 44 | |
| 45 | /* DTSEC1 can be SGMII, RGMII or RMII */ |
| 46 | if (port == FM1_DTSEC1) { |
| 47 | if (is_serdes_configured(SGMII_FM1_DTSEC1)) |
| 48 | return PHY_INTERFACE_MODE_SGMII; |
| 49 | if (pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS) { |
| 50 | if (pordevsr & MPC85xx_PORDEVSR_TSEC1_PRTC) |
| 51 | return PHY_INTERFACE_MODE_RGMII; |
| 52 | else |
| 53 | return PHY_INTERFACE_MODE_RMII; |
| 54 | } |
| 55 | } |
| 56 | |
| 57 | /* DTSEC2 only supports SGMII or RGMII */ |
| 58 | if (port == FM1_DTSEC2) { |
| 59 | if (is_serdes_configured(SGMII_FM1_DTSEC2)) |
| 60 | return PHY_INTERFACE_MODE_SGMII; |
| 61 | if (pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS) |
| 62 | return PHY_INTERFACE_MODE_RGMII; |
| 63 | } |
| 64 | |
| 65 | return PHY_INTERFACE_MODE_NONE; |
| 66 | } |