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Stelian Pop6afcabf2008-02-07 16:37:54 +00001/*
Stelian Pop983c1db2008-03-26 20:52:32 +01002 * (C) Copyright 2007-2008
Stelian Pop567fb852008-05-08 22:52:09 +02003 * Stelian Pop <stelian.pop@leadtechdesign.com>
Stelian Pop6afcabf2008-02-07 16:37:54 +00004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91CAP9ADK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Stelian Popc139b172008-05-08 14:52:29 +020031#define AT91_CPU_NAME "AT91CAP9"
Stelian Popad229a42008-11-07 13:55:14 +010032#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
33#define AT91_MASTER_CLOCK 100000000 /* peripheral */
34#define AT91_CPU_CLOCK 200000000 /* cpu */
Wolfgang Denk9e2a79b2008-12-16 23:13:46 +010035#define CONFIG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */
Stelian Popad229a42008-11-07 13:55:14 +010036#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
Stelian Pop6afcabf2008-02-07 16:37:54 +000037
38#define AT91_SLOW_CLOCK 32768 /* slow clock */
39
40#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
41#define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */
42#define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */
43#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
44
45#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
46#define CONFIG_SETUP_MEMORY_TAGS 1
47#define CONFIG_INITRD_TAG 1
48
49#define CONFIG_SKIP_LOWLEVEL_INIT
50#define CONFIG_SKIP_RELOCATE_UBOOT
51
Stelian Pop6afcabf2008-02-07 16:37:54 +000052/*
53 * Hardware drivers
54 */
Stelian Pop6afcabf2008-02-07 16:37:54 +000055#define CONFIG_ATMEL_USART 1
56#undef CONFIG_USART0
57#undef CONFIG_USART1
58#undef CONFIG_USART2
59#define CONFIG_USART3 1 /* USART 3 is DBGU */
60
Stelian Popc139b172008-05-08 14:52:29 +020061/* LCD */
62#define CONFIG_LCD 1
63#define LCD_BPP LCD_COLOR8
64#define CONFIG_LCD_LOGO 1
65#undef LCD_TEST_PATTERN
66#define CONFIG_LCD_INFO 1
67#define CONFIG_LCD_INFO_BELOW_LOGO 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Popc139b172008-05-08 14:52:29 +020069#define CONFIG_ATMEL_LCD 1
70#define CONFIG_ATMEL_LCD_BGR555 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Stelian Popc139b172008-05-08 14:52:29 +020072
Stelian Pop6afcabf2008-02-07 16:37:54 +000073#define CONFIG_BOOTDELAY 3
Stelian Pop6afcabf2008-02-07 16:37:54 +000074
Stelian Pop6afcabf2008-02-07 16:37:54 +000075/*
76 * BOOTP options
77 */
78#define CONFIG_BOOTP_BOOTFILESIZE 1
79#define CONFIG_BOOTP_BOOTPATH 1
80#define CONFIG_BOOTP_GATEWAY 1
81#define CONFIG_BOOTP_HOSTNAME 1
82
83/*
84 * Command line configuration.
85 */
86#include <config_cmd_default.h>
87#undef CONFIG_CMD_BDI
88#undef CONFIG_CMD_IMI
89#undef CONFIG_CMD_AUTOSCRIPT
90#undef CONFIG_CMD_FPGA
91#undef CONFIG_CMD_LOADS
92
93#define CONFIG_CMD_PING 1
94#define CONFIG_CMD_DHCP 1
95#define CONFIG_CMD_NAND 1
96#define CONFIG_CMD_USB 1
97
98/* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */
99#define CONFIG_NR_DRAM_BANKS 1
100#define PHYS_SDRAM 0x70000000
101#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
102
103/* DataFlash */
104#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200105#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
106#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
107#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
Stelian Pop93da48b2008-05-08 20:52:15 +0200108#define AT91_SPI_CLK 15000000
109#define DATAFLASH_TCSS (0x1a << 16)
110#define DATAFLASH_TCHS (0x1 << 24)
Stelian Pop6afcabf2008-02-07 16:37:54 +0000111
112/* NOR flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200113#define CONFIG_SYS_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200114#define CONFIG_FLASH_CFI_DRIVER 1
Stelian Pop6afcabf2008-02-07 16:37:54 +0000115#define PHYS_FLASH_1 0x10000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200116#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
117#define CONFIG_SYS_MAX_FLASH_SECT 256
118#define CONFIG_SYS_MAX_FLASH_BANKS 1
Stelian Pop6afcabf2008-02-07 16:37:54 +0000119
Stelian Pop6afcabf2008-02-07 16:37:54 +0000120/* NAND flash */
121#define NAND_MAX_CHIPS 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200122#define CONFIG_SYS_MAX_NAND_DEVICE 1
123#define CONFIG_SYS_NAND_BASE 0x40000000
124#define CONFIG_SYS_NAND_DBW_8 1
Stelian Pop6afcabf2008-02-07 16:37:54 +0000125
Stelian Pop6afcabf2008-02-07 16:37:54 +0000126/* Ethernet */
127#define CONFIG_MACB 1
128#define CONFIG_RMII 1
129#define CONFIG_NET_MULTI 1
130#define CONFIG_NET_RETRY_COUNT 20
131#define CONFIG_RESET_PHY_R 1
132
133/* USB */
134#define CONFIG_USB_OHCI_NEW 1
135#define LITTLEENDIAN 1
136#define CONFIG_DOS_PARTITION 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
138#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */
139#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9"
140#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Stelian Pop3e0cda02008-11-09 00:14:46 +0100141#define CONFIG_USB_STORAGE 1
142#define CONFIG_CMD_FAT 1
Stelian Pop6afcabf2008-02-07 16:37:54 +0000143
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */
Stelian Pop6afcabf2008-02-07 16:37:54 +0000145
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
147#define CONFIG_SYS_MEMTEST_END 0x73e00000
Stelian Pop6afcabf2008-02-07 16:37:54 +0000148
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_USE_DATAFLASH 1
150#undef CONFIG_SYS_USE_NORFLASH
Stelian Pop6afcabf2008-02-07 16:37:54 +0000151
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop6afcabf2008-02-07 16:37:54 +0000153
154/* bootstrap + u-boot + env + linux in dataflash */
Jean-Christophe PLAGNIOL-VILLARD057c8492008-09-10 22:47:58 +0200155#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200157#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200159#define CONFIG_ENV_SIZE 0x4200
Stelian Popab526402008-05-08 20:52:17 +0200160#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x72000000 0x210000; bootm"
Stelian Pop32675082008-05-08 20:52:16 +0200161#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
162 "root=/dev/mtdblock1 " \
163 "mtdparts=physmap-flash.0:-(nor);" \
164 "at91_nand:-(root) " \
165 "rw rootfstype=jffs2"
Stelian Pop6afcabf2008-02-07 16:37:54 +0000166
167#else
168
169/* bootstrap + u-boot + env + linux in norflash */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200170#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#define CONFIG_SYS_MONITOR_BASE (PHYS_FLASH_1 + 0x8000)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200172#define CONFIG_ENV_OFFSET 0x4000
173#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_ENV_OFFSET)
174#define CONFIG_ENV_SIZE 0x4000
Stelian Pop6afcabf2008-02-07 16:37:54 +0000175#define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm"
Stelian Pop32675082008-05-08 20:52:16 +0200176#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
177 "root=/dev/mtdblock4 " \
178 "mtdparts=physmap-flash.0:16k(bootstrap)ro,"\
179 "16k(env),224k(uboot)ro,-(linux);" \
180 "at91_nand:-(root) " \
181 "rw rootfstype=jffs2"
Stelian Pop6afcabf2008-02-07 16:37:54 +0000182
183#endif
184
Stelian Pop983c1db2008-03-26 20:52:32 +0100185#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200186#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Stelian Pop6afcabf2008-02-07 16:37:54 +0000187
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188#define CONFIG_SYS_PROMPT "U-Boot> "
189#define CONFIG_SYS_CBSIZE 256
190#define CONFIG_SYS_MAXARGS 16
191#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
192#define CONFIG_SYS_LONGHELP 1
Stelian Pop6afcabf2008-02-07 16:37:54 +0000193#define CONFIG_CMDLINE_EDITING 1
194
Stelian Pop983c1db2008-03-26 20:52:32 +0100195#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
196/*
197 * Size of malloc() pool
198 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#define CONFIG_SYS_MALLOC_LEN ROUND(CONFIG_ENV_SIZE + 128*1024, 0x1000)
200#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
Stelian Pop983c1db2008-03-26 20:52:32 +0100201
Stelian Pop6afcabf2008-02-07 16:37:54 +0000202#define CONFIG_STACKSIZE (32*1024) /* regular stack */
203
204#ifdef CONFIG_USE_IRQ
205#error CONFIG_USE_IRQ not supported
206#endif
207
208#endif