blob: ccb07e338470f4d34d6b80c0e5790ac2093206db [file] [log] [blame]
Marek Vasut0f83b362013-04-25 10:16:03 +00001/*
2 * DENX M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Marek Vasut0f83b362013-04-25 10:16:03 +00006 */
7
8#ifndef __M53EVK_CONFIG_H__
9#define __M53EVK_CONFIG_H__
10
11#define CONFIG_MX53
12#define CONFIG_MXC_GPIO
13#define CONFIG_SYS_HZ 1000
14
15#include <asm/arch/imx-regs.h>
16
17#define CONFIG_DISPLAY_CPUINFO
18#define CONFIG_BOARD_EARLY_INIT_F
19#define CONFIG_REVISION_TAG
20#define CONFIG_SYS_NO_FLASH
21
22/*
23 * U-Boot Commands
24 */
25#include <config_cmd_default.h>
26#define CONFIG_DISPLAY_BOARDINFO
27#define CONFIG_DOS_PARTITION
28
29#define CONFIG_CMD_DATE
30#define CONFIG_CMD_DHCP
31#define CONFIG_CMD_EXT2
32#define CONFIG_CMD_FAT
33#define CONFIG_CMD_I2C
34#define CONFIG_CMD_MII
35#define CONFIG_CMD_MMC
36#define CONFIG_CMD_NAND
37#define CONFIG_CMD_NET
38#define CONFIG_CMD_PING
39#define CONFIG_CMD_SATA
40#define CONFIG_CMD_USB
41
42/*
43 * Memory configurations
44 */
45#define CONFIG_NR_DRAM_BANKS 2
46#define PHYS_SDRAM_1 CSD0_BASE_ADDR
47#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
48#define PHYS_SDRAM_2 CSD1_BASE_ADDR
49#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
50#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
51#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
52#define CONFIG_SYS_MEMTEST_START 0x70000000
53#define CONFIG_SYS_MEMTEST_END 0xaff00000
54
55#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
56#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
57#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
58
59#define CONFIG_SYS_INIT_SP_OFFSET \
60 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
61#define CONFIG_SYS_INIT_SP_ADDR \
62 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
63
64#define CONFIG_SYS_TEXT_BASE 0x71000000
65
66/*
67 * U-Boot general configurations
68 */
69#define CONFIG_SYS_LONGHELP
70#define CONFIG_SYS_PROMPT "=> "
71#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
72#define CONFIG_SYS_PBSIZE \
73 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
74 /* Print buffer size */
75#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
76#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
77 /* Boot argument buffer size */
78#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
79#define CONFIG_AUTO_COMPLETE /* Command auto complete */
80#define CONFIG_CMDLINE_EDITING /* Command history etc */
81#define CONFIG_SYS_HUSH_PARSER
82
83/*
84 * Serial Driver
85 */
86#define CONFIG_MXC_UART
87#define CONFIG_MXC_UART_BASE UART2_BASE
88#define CONFIG_CONS_INDEX 1
89#define CONFIG_BAUDRATE 115200
90
91/*
92 * MMC Driver
93 */
94#ifdef CONFIG_CMD_MMC
95#define CONFIG_MMC
96#define CONFIG_GENERIC_MMC
97#define CONFIG_FSL_ESDHC
98#define CONFIG_SYS_FSL_ESDHC_ADDR 0
99#define CONFIG_SYS_FSL_ESDHC_NUM 1
100#endif
101
102/*
103 * NAND
104 */
105#define CONFIG_ENV_SIZE (16 * 1024)
106#ifdef CONFIG_CMD_NAND
107#define CONFIG_SYS_MAX_NAND_DEVICE 1
108#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
109#define CONFIG_NAND_MXC
110#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
111#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
112#define CONFIG_SYS_NAND_LARGEPAGE
113#define CONFIG_MXC_NAND_HWECC
114#define CONFIG_SYS_NAND_USE_FLASH_BBT
115
116/* Environment is in NAND */
117#define CONFIG_ENV_IS_IN_NAND
118#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
119#define CONFIG_ENV_SECT_SIZE (128 * 1024)
120#define CONFIG_ENV_RANGE (512 * 1024)
121#define CONFIG_ENV_OFFSET 0x100000
122#define CONFIG_ENV_OFFSET_REDUND \
123 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
124
125#define CONFIG_CMD_UBI
126#define CONFIG_CMD_UBIFS
127#define CONFIG_CMD_MTDPARTS
128#define CONFIG_RBTREE
129#define CONFIG_LZO
130#define CONFIG_MTD_DEVICE
131#define CONFIG_MTD_PARTITIONS
132#define MTDIDS_DEFAULT "nand0=mxc-nand"
133#define MTDPARTS_DEFAULT \
134 "mtdparts=mxc-nand:" \
135 "1m(bootloader)ro," \
136 "512k(environment)," \
137 "512k(redundant-environment)," \
138 "4m(kernel)," \
139 "128k(fdt)," \
140 "8m(ramdisk)," \
141 "-(filesystem)"
142#else
143#define CONFIG_ENV_IS_NOWHERE
144#endif
145
146/*
147 * Ethernet on SOC (FEC)
148 */
149#ifdef CONFIG_CMD_NET
150#define CONFIG_FEC_MXC
151#define IMX_FEC_BASE FEC_BASE_ADDR
152#define CONFIG_FEC_MXC_PHYADDR 0x0
153#define CONFIG_MII
154#define CONFIG_DISCOVER_PHY
155#define CONFIG_FEC_XCV_TYPE RMII
156#define CONFIG_PHYLIB
157#define CONFIG_PHY_MICREL
158#endif
159
160/*
161 * I2C
162 */
163#ifdef CONFIG_CMD_I2C
164#define CONFIG_HARD_I2C
165#define CONFIG_I2C_MXC
166#define CONFIG_SYS_I2C_BASE I2C2_BASE_ADDR
167#define CONFIG_SYS_I2C_SPEED 100000
168#endif
169
170/*
171 * RTC
172 */
173#ifdef CONFIG_CMD_DATE
174#define CONFIG_RTC_M41T62
175#define CONFIG_SYS_I2C_RTC_ADDR 0x68
176#define CONFIG_SYS_M41T11_BASE_YEAR 2000
177#endif
178
179/*
180 * USB
181 */
182#ifdef CONFIG_CMD_USB
183#define CONFIG_USB_EHCI
184#define CONFIG_USB_EHCI_MX5
185#define CONFIG_USB_STORAGE
186#define CONFIG_USB_HOST_ETHER
187#define CONFIG_USB_ETHER_ASIX
188#define CONFIG_USB_ETHER_SMSC95XX
189#define CONFIG_MXC_USB_PORT 1
190#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
191#define CONFIG_MXC_USB_FLAGS 0
192#endif
193
194/*
195 * SATA
196 */
197#ifdef CONFIG_CMD_SATA
198#define CONFIG_DWC_AHSATA
199#define CONFIG_SYS_SATA_MAX_DEVICE 1
200#define CONFIG_DWC_AHSATA_PORT_ID 0
201#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
202#define CONFIG_LBA48
203#define CONFIG_LIBATA
204#endif
205
206/*
207 * Boot Linux
208 */
209#define CONFIG_CMDLINE_TAG
210#define CONFIG_INITRD_TAG
211#define CONFIG_REVISION_TAG
212#define CONFIG_SETUP_MEMORY_TAGS
213#define CONFIG_BOOTDELAY 3
214#define CONFIG_BOOTFILE "m53evk/uImage"
215#define CONFIG_BOOTARGS "console=ttymxc1,115200"
216#define CONFIG_LOADADDR 0x70800000
217#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
218#define CONFIG_OF_LIBFDT
219
220/*
221 * NAND SPL
222 */
223#define CONFIG_SPL
224#define CONFIG_SPL_FRAMEWORK
225#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
226#define CONFIG_SPL_BOARD_INIT
227#define CONFIG_SPL_TEXT_BASE 0x70008000
228#define CONFIG_SPL_PAD_TO 0x8000
229#define CONFIG_SPL_STACK 0x70004000
230#define CONFIG_SPL_GPIO_SUPPORT
231#define CONFIG_SPL_LIBCOMMON_SUPPORT
232#define CONFIG_SPL_LIBGENERIC_SUPPORT
233#define CONFIG_SPL_NAND_SUPPORT
234#define CONFIG_SPL_SERIAL_SUPPORT
235
236#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
237#define CONFIG_SYS_NAND_PAGE_SIZE 2048
238#define CONFIG_SYS_NAND_OOBSIZE 64
239#define CONFIG_SYS_NAND_PAGE_COUNT 64
240#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
241#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
242
243#endif /* __M53EVK_CONFIG_H__ */