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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ian Campbellabce2c62014-06-05 19:00:15 +01002/*
3 * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
6 *
7 * (C) Copyright 2007-2011
8 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
9 * Tom Cubie <tangliang@allwinnertech.com>
Ian Campbellabce2c62014-06-05 19:00:15 +010010 */
11
12#include <common.h>
Simon Glass7aa97482014-10-30 20:25:49 -060013#include <dm.h>
14#include <errno.h>
15#include <fdtdec.h>
16#include <malloc.h>
Ian Campbellabce2c62014-06-05 19:00:15 +010017#include <asm/io.h>
18#include <asm/gpio.h>
Chen-Yu Tsai4694dc52016-07-22 16:12:59 +080019#include <dt-bindings/gpio/gpio.h>
Ian Campbellabce2c62014-06-05 19:00:15 +010020
Simon Glassbcee8d62019-12-06 21:41:35 -070021#if !CONFIG_IS_ENABLED(DM_GPIO)
Ian Campbellabce2c62014-06-05 19:00:15 +010022static int sunxi_gpio_output(u32 pin, u32 val)
23{
24 u32 dat;
25 u32 bank = GPIO_BANK(pin);
26 u32 num = GPIO_NUM(pin);
27 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
28
29 dat = readl(&pio->dat);
30 if (val)
31 dat |= 0x1 << num;
32 else
33 dat &= ~(0x1 << num);
34
35 writel(dat, &pio->dat);
36
37 return 0;
38}
39
40static int sunxi_gpio_input(u32 pin)
41{
42 u32 dat;
43 u32 bank = GPIO_BANK(pin);
44 u32 num = GPIO_NUM(pin);
45 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
46
47 dat = readl(&pio->dat);
48 dat >>= num;
49
50 return dat & 0x1;
51}
52
53int gpio_request(unsigned gpio, const char *label)
54{
55 return 0;
56}
57
58int gpio_free(unsigned gpio)
59{
60 return 0;
61}
62
63int gpio_direction_input(unsigned gpio)
64{
65 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
66
Axel Linb0c4ae12014-12-20 11:41:25 +080067 return 0;
Ian Campbellabce2c62014-06-05 19:00:15 +010068}
69
70int gpio_direction_output(unsigned gpio, int value)
71{
72 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
73
74 return sunxi_gpio_output(gpio, value);
75}
76
77int gpio_get_value(unsigned gpio)
78{
79 return sunxi_gpio_input(gpio);
80}
81
82int gpio_set_value(unsigned gpio, int value)
83{
84 return sunxi_gpio_output(gpio, value);
85}
86
87int sunxi_name_to_gpio(const char *name)
88{
89 int group = 0;
90 int groupsize = 9 * 32;
91 long pin;
92 char *eptr;
Hans de Goede6c727e02014-12-24 19:34:38 +010093
Ian Campbellabce2c62014-06-05 19:00:15 +010094 if (*name == 'P' || *name == 'p')
95 name++;
96 if (*name >= 'A') {
97 group = *name - (*name > 'a' ? 'a' : 'A');
98 groupsize = 32;
99 name++;
100 }
101
102 pin = simple_strtol(name, &eptr, 10);
103 if (!*name || *eptr)
104 return -1;
105 if (pin < 0 || pin > groupsize || group >= 9)
106 return -1;
107 return group * 32 + pin;
108}
Simon Glassbcee8d62019-12-06 21:41:35 -0700109#endif /* DM_GPIO */
Simon Glass7aa97482014-10-30 20:25:49 -0600110
Simon Glassbcee8d62019-12-06 21:41:35 -0700111#if CONFIG_IS_ENABLED(DM_GPIO)
Simon Glassa5ab8832015-04-18 11:33:43 -0600112/* TODO(sjg@chromium.org): Remove this function and use device tree */
113int sunxi_name_to_gpio(const char *name)
114{
115 unsigned int gpio;
116 int ret;
Hans de Goedef9b7a042015-04-22 11:31:22 +0200117#if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
118 char lookup[8];
Simon Glassa5ab8832015-04-18 11:33:43 -0600119
Samuel Holland09cbd382023-01-22 17:46:22 -0600120 if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
Hans de Goedef9b7a042015-04-22 11:31:22 +0200121 sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
122 SUNXI_GPIO_AXP0_VBUS_ENABLE);
123 name = lookup;
124 }
125#endif
Simon Glassa5ab8832015-04-18 11:33:43 -0600126 ret = gpio_lookup_name(name, NULL, NULL, &gpio);
127
128 return ret ? ret : gpio;
129}
130
Simon Glass7aa97482014-10-30 20:25:49 -0600131static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
132{
Simon Glass8a8d24b2020-12-03 16:55:23 -0700133 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
Simon Glass7aa97482014-10-30 20:25:49 -0600134 u32 num = GPIO_NUM(offset);
135 unsigned dat;
136
137 dat = readl(&plat->regs->dat);
138 dat >>= num;
139
140 return dat & 0x1;
141}
142
Simon Glass7aa97482014-10-30 20:25:49 -0600143static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
144{
Simon Glass8a8d24b2020-12-03 16:55:23 -0700145 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
Simon Glass7aa97482014-10-30 20:25:49 -0600146 int func;
147
148 func = sunxi_gpio_get_cfgbank(plat->regs, offset);
149 if (func == SUNXI_GPIO_OUTPUT)
150 return GPIOF_OUTPUT;
151 else if (func == SUNXI_GPIO_INPUT)
152 return GPIOF_INPUT;
153 else
154 return GPIOF_FUNC;
155}
156
Chen-Yu Tsai4694dc52016-07-22 16:12:59 +0800157static int sunxi_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
Simon Glass3a571232017-05-18 20:09:18 -0600158 struct ofnode_phandle_args *args)
Chen-Yu Tsai4694dc52016-07-22 16:12:59 +0800159{
160 int ret;
161
162 ret = device_get_child(dev, args->args[0], &desc->dev);
163 if (ret)
164 return ret;
165 desc->offset = args->args[1];
Samuel Holland35ae1262021-10-20 23:52:56 -0500166 desc->flags = gpio_flags_xlate(args->args[2]);
167
168 return 0;
169}
170
171static int sunxi_gpio_set_flags(struct udevice *dev, unsigned int offset,
172 ulong flags)
173{
174 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
175
176 if (flags & GPIOD_IS_OUT) {
177 u32 value = !!(flags & GPIOD_IS_OUT_ACTIVE);
178 u32 num = GPIO_NUM(offset);
179
180 clrsetbits_le32(&plat->regs->dat, 1 << num, value << num);
181 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
182 } else if (flags & GPIOD_IS_IN) {
183 u32 pull = 0;
184
185 if (flags & GPIOD_PULL_UP)
186 pull = 1;
187 else if (flags & GPIOD_PULL_DOWN)
188 pull = 2;
189 sunxi_gpio_set_pull_bank(plat->regs, offset, pull);
190 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
191 }
Chen-Yu Tsai4694dc52016-07-22 16:12:59 +0800192
193 return 0;
194}
195
Simon Glass7aa97482014-10-30 20:25:49 -0600196static const struct dm_gpio_ops gpio_sunxi_ops = {
Simon Glass7aa97482014-10-30 20:25:49 -0600197 .get_value = sunxi_gpio_get_value,
Simon Glass7aa97482014-10-30 20:25:49 -0600198 .get_function = sunxi_gpio_get_function,
Chen-Yu Tsai4694dc52016-07-22 16:12:59 +0800199 .xlate = sunxi_gpio_xlate,
Samuel Holland35ae1262021-10-20 23:52:56 -0500200 .set_flags = sunxi_gpio_set_flags,
Simon Glass7aa97482014-10-30 20:25:49 -0600201};
202
Simon Glass7aa97482014-10-30 20:25:49 -0600203static int gpio_sunxi_probe(struct udevice *dev)
204{
Simon Glass8a8d24b2020-12-03 16:55:23 -0700205 struct sunxi_gpio_plat *plat = dev_get_plat(dev);
Simon Glasse564f052015-03-05 12:25:20 -0700206 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Simon Glass7aa97482014-10-30 20:25:49 -0600207
208 /* Tell the uclass how many GPIOs we have */
209 if (plat) {
Samuel Hollandb799eab2021-08-12 20:09:43 -0500210 uc_priv->gpio_count = SUNXI_GPIOS_PER_BANK;
Simon Glass7aa97482014-10-30 20:25:49 -0600211 uc_priv->bank_name = plat->bank_name;
212 }
213
214 return 0;
215}
Stephen Warren6f82fac2016-05-11 15:26:25 -0600216
Simon Glass7aa97482014-10-30 20:25:49 -0600217U_BOOT_DRIVER(gpio_sunxi) = {
218 .name = "gpio_sunxi",
219 .id = UCLASS_GPIO,
Simon Glass7aa97482014-10-30 20:25:49 -0600220 .probe = gpio_sunxi_probe,
Samuel Hollandb799eab2021-08-12 20:09:43 -0500221 .ops = &gpio_sunxi_ops,
Simon Glass7aa97482014-10-30 20:25:49 -0600222};
Simon Glassbcee8d62019-12-06 21:41:35 -0700223#endif /* DM_GPIO */