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Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +09001/*
Jean-Christophe PLAGNIOL-VILLARD8dd29c82009-06-04 12:06:47 +02002 * (C) Copyright 2009
3 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
4 *
Nobuhiro Iwamatsu73f35e02012-08-21 13:14:46 +09005 * (C) Copyright 2007-2012
Nobuhiro Iwamatsue9d5f352008-11-20 16:44:42 +09006 * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
7 *
8 * (C) Copyright 2003
9 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090010 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020011 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090012 */
13
14#include <common.h>
Nobuhiro Iwamatsu9e23fe02008-07-08 12:03:24 +090015#include <asm/processor.h>
Nobuhiro Iwamatsue9d5f352008-11-20 16:44:42 +090016#include <asm/io.h>
Nobuhiro Iwamatsu73f35e02012-08-21 13:14:46 +090017#include <sh_tmu.h>
18
Nobuhiro Iwamatsu861bd4b2013-07-23 13:57:24 +090019#define TCR_TPSC 0x07
20
Nobuhiro Iwamatsu73f35e02012-08-21 13:14:46 +090021static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE;
Nobuhiro Iwamatsue9d5f352008-11-20 16:44:42 +090022
Nobuhiro Iwamatsud4430422012-08-21 13:24:43 +090023unsigned long get_tbclk(void)
24{
Nobuhiro Iwamatsub8f16082013-08-20 14:33:15 +090025 u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1;
26 return get_tmu0_clk_rate() >> ((tmu_bit + 1) * 2);
Nobuhiro Iwamatsud4430422012-08-21 13:24:43 +090027}
28
Rob Herring1b5cf952013-10-04 10:22:42 -050029unsigned long timer_read_counter(void)
Jean-Christophe PLAGNIOL-VILLARD8dd29c82009-06-04 12:06:47 +020030{
Rob Herring1b5cf952013-10-04 10:22:42 -050031 return ~readl(&tmu->tcnt0);
Jean-Christophe PLAGNIOL-VILLARD8dd29c82009-06-04 12:06:47 +020032}
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090033
Nobuhiro Iwamatsu73f35e02012-08-21 13:14:46 +090034static void tmu_timer_start(unsigned int timer)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090035{
36 if (timer > 2)
37 return;
Nobuhiro Iwamatsu73f35e02012-08-21 13:14:46 +090038 writeb(readb(&tmu->tstr) | (1 << timer), &tmu->tstr);
Nobuhiro Iwamatsue9d5f352008-11-20 16:44:42 +090039}
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090040
Nobuhiro Iwamatsu73f35e02012-08-21 13:14:46 +090041static void tmu_timer_stop(unsigned int timer)
Nobuhiro Iwamatsue9d5f352008-11-20 16:44:42 +090042{
43 if (timer > 2)
44 return;
Nobuhiro Iwamatsu73f35e02012-08-21 13:14:46 +090045 writeb(readb(&tmu->tstr) & ~(1 << timer), &tmu->tstr);
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090046}
47
Nobuhiro Iwamatsu73f35e02012-08-21 13:14:46 +090048int timer_init(void)
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090049{
Nobuhiro Iwamatsub8f16082013-08-20 14:33:15 +090050 u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1;
51 writew((readw(&tmu->tcr0) & ~TCR_TPSC) | tmu_bit, &tmu->tcr0);
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090052
Nobuhiro Iwamatsue9d5f352008-11-20 16:44:42 +090053 tmu_timer_stop(0);
54 tmu_timer_start(0);
55
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090056 return 0;
57}
58