Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * Configuation settings for the SMN42 board from Siemens. |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #ifndef __CONFIG_H |
| 27 | #define __CONFIG_H |
| 28 | |
| 29 | /* |
| 30 | * If we are developing, we might want to start u-boot from ram |
| 31 | * so we MUST NOT initialize critical regs like mem-timing ... |
| 32 | */ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 33 | #undef CONFIG_SKIP_LOWLEVEL_INIT |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 34 | |
| 35 | /* |
| 36 | * High Level Configuration Options |
| 37 | * (easy to change) |
| 38 | */ |
| 39 | #define CONFIG_ARM7 1 /* This is a ARM7 CPU */ |
| 40 | #define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */ |
| 41 | #define CONFIG_LPC2292 |
Wolfgang Denk | 725671c | 2007-06-06 16:26:56 +0200 | [diff] [blame] | 42 | #undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 43 | |
| 44 | #undef CONFIG_USE_IRQ /* don't need them anymore */ |
| 45 | |
| 46 | /* |
| 47 | * Size of malloc() pool |
| 48 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 49 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 50 | |
| 51 | /* |
| 52 | * Hardware drivers |
| 53 | */ |
| 54 | |
| 55 | /* |
| 56 | * select serial console configuration |
| 57 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6790c55 | 2009-03-29 23:01:42 +0200 | [diff] [blame] | 58 | #define CONFIG_LPC2292_SERIAL |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 59 | #define CONFIG_SERIAL1 1 /* we use Serial line 1 */ |
| 60 | |
| 61 | /* allow to overwrite serial and ethaddr */ |
| 62 | #define CONFIG_ENV_OVERWRITE |
| 63 | |
| 64 | #define CONFIG_BAUDRATE 115200 |
| 65 | |
Jon Loeliger | 18225e8 | 2007-07-09 21:31:24 -0500 | [diff] [blame] | 66 | /* |
| 67 | * BOOTP options |
| 68 | */ |
| 69 | #define CONFIG_BOOTP_SUBNETMASK |
| 70 | #define CONFIG_BOOTP_GATEWAY |
| 71 | #define CONFIG_BOOTP_HOSTNAME |
| 72 | #define CONFIG_BOOTP_BOOTPATH |
| 73 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 74 | |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 75 | |
| 76 | /* enable I2C and select the hardware/software driver */ |
Wolfgang Denk | 725671c | 2007-06-06 16:26:56 +0200 | [diff] [blame] | 77 | #undef CONFIG_HARD_I2C /* I2C with hardware support */ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 78 | #define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ |
| 79 | /* this would be 0xAE if E0, E1 and E2 were pulled high */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 80 | #define CONFIG_SYS_I2C_SLAVE 0xA0 |
| 81 | #define CONFIG_SYS_I2C_EEPROM_ADDR (0xA0 >> 1) |
| 82 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16 bit address */ |
| 83 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes per write */ |
| 84 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 85 | /* not used but required by devices.c */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 86 | #define CONFIG_SYS_I2C_SPEED 10000 |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 87 | |
| 88 | #ifdef CONFIG_SOFT_I2C |
| 89 | /* |
| 90 | * Software (bit-bang) I2C driver configuration |
| 91 | */ |
| 92 | #define SCL 0x00000004 /* P0.2 */ |
| 93 | #define SDA 0x00000008 /* P0.3 */ |
| 94 | |
| 95 | #define I2C_READ ((GET32(IO0PIN) & SDA) ? 1 : 0) |
| 96 | #define I2C_SDA(x) { if (x) PUT32(IO0SET, SDA); else PUT32(IO0CLR, SDA); } |
| 97 | #define I2C_SCL(x) { if (x) PUT32(IO0SET, SCL); else PUT32(IO0CLR, SCL); } |
| 98 | #define I2C_DELAY { udelay(100); } |
| 99 | #define I2C_ACTIVE { unsigned int i2ctmp; \ |
Wolfgang Denk | 725671c | 2007-06-06 16:26:56 +0200 | [diff] [blame] | 100 | i2ctmp = GET32(IO0DIR); \ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 101 | i2ctmp |= SDA; \ |
| 102 | PUT32(IO0DIR, i2ctmp); } |
| 103 | #define I2C_TRISTATE { unsigned int i2ctmp; \ |
Wolfgang Denk | 725671c | 2007-06-06 16:26:56 +0200 | [diff] [blame] | 104 | i2ctmp = GET32(IO0DIR); \ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 105 | i2ctmp &= ~SDA; \ |
| 106 | PUT32(IO0DIR, i2ctmp); } |
| 107 | #endif /* CONFIG_SOFT_I2C */ |
| 108 | |
Jon Loeliger | fe7f782 | 2007-07-08 15:02:44 -0500 | [diff] [blame] | 109 | |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 110 | /* |
Jon Loeliger | fe7f782 | 2007-07-08 15:02:44 -0500 | [diff] [blame] | 111 | * Command line configuration. |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 112 | */ |
Jon Loeliger | fe7f782 | 2007-07-08 15:02:44 -0500 | [diff] [blame] | 113 | #include <config_cmd_default.h> |
| 114 | #define CONFIG_CMD_DHCP |
| 115 | #define CONFIG_CMD_FAT |
| 116 | #define CONFIG_CMD_MMC |
| 117 | #define CONFIG_CMD_NET |
| 118 | #define CONFIG_CMD_EEPROM |
| 119 | #define CONFIG_CMD_PING |
| 120 | |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 121 | |
| 122 | #define CONFIG_DOS_PARTITION |
| 123 | |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 124 | #define CONFIG_BOOTDELAY 5 |
| 125 | |
| 126 | /* |
| 127 | * Miscellaneous configurable options |
| 128 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 129 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 130 | #define CONFIG_SYS_PROMPT "SMN42 # " /* Monitor Command Prompt */ |
| 131 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 132 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 133 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 134 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 135 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 136 | #define CONFIG_SYS_MEMTEST_START 0x81800000 /* memtest works on */ |
| 137 | #define CONFIG_SYS_MEMTEST_END 0x83000000 /* 24 MB in SRAM */ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 138 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 139 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ |
Wolfgang Denk | 725671c | 2007-06-06 16:26:56 +0200 | [diff] [blame] | 140 | /* for uClinux img is here*/ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 141 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #define CONFIG_SYS_SYS_CLK_FREQ 58982400 /* Hz */ |
| 143 | #define CONFIG_SYS_HZ 2048 /* decrementer freq in Hz */ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 144 | |
| 145 | /* valid baudrates */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 147 | |
| 148 | /*----------------------------------------------------------------------- |
| 149 | * Stack sizes |
| 150 | * |
| 151 | * The stack sizes are set up in start.S using the settings below |
| 152 | */ |
| 153 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
| 154 | #ifdef CONFIG_USE_IRQ |
| 155 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 156 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
| 157 | #endif |
| 158 | |
| 159 | /*----------------------------------------------------------------------- |
| 160 | * Physical Memory Map |
| 161 | */ |
| 162 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SRAM */ |
| 163 | #define PHYS_SDRAM_1 0x81000000 /* SRAM Bank #1 */ |
| 164 | #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB SRAM */ |
| 165 | |
| 166 | /* This is the external flash */ |
| 167 | #define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */ |
| 168 | #define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */ |
| 169 | |
| 170 | /*----------------------------------------------------------------------- |
| 171 | * FLASH and environment organization |
| 172 | */ |
| 173 | |
| 174 | /* |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 175 | * The first entry in CONFIG_SYS_FLASH_BANKS_LIST is a dummy, but it must be present. |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 176 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 177 | #define CONFIG_SYS_FLASH_BANKS_LIST { 0, PHYS_FLASH_1 } |
| 178 | #define CONFIG_SYS_FLASH_ADDR0 0x555 |
| 179 | #define CONFIG_SYS_FLASH_ADDR1 0x2AA |
| 180 | #define CONFIG_SYS_FLASH_ERASE_TOUT 16384 /* Timeout for Flash Erase (in ms) */ |
| 181 | #define CONFIG_SYS_FLASH_WRITE_TOUT 5 /* Timeout for Flash Write (in ms) */ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 182 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 183 | #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 184 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 185 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 186 | |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 187 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 188 | /* The Environment Sector is in the CPU-internal flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 189 | #define CONFIG_SYS_FLASH_BASE 0 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 190 | #define CONFIG_ENV_OFFSET 0x3C000 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 191 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 192 | #define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */ |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 193 | |
| 194 | #define CONFIG_CMDLINE_TAG |
| 195 | #define CONFIG_SETUP_MEMORY_TAGS |
| 196 | #define CONFIG_INITRD_TAG |
| 197 | #define CONFIG_MMC 1 |
| 198 | /* we use this ethernet chip */ |
Reinhard Meyer (-VC) | b7081d9 | 2010-08-06 18:42:07 +0200 | [diff] [blame] | 199 | #define CONFIG_ENC28J60_LPC2292 |
Peter Pearse | 160131b | 2007-05-09 11:41:58 +0100 | [diff] [blame] | 200 | |
| 201 | #endif /* __CONFIG_H */ |