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wdenkc6097192002-11-03 00:24:07 +00001/*
Heiko Schocherea818db2013-01-29 08:53:15 +01002 * (C) Copyright 2009
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 * Changes for multibus/multiadapter I2C support.
5 *
wdenkc6097192002-11-03 00:24:07 +00006 * (C) Copyright 2001, 2002
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +000010 *
11 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
12 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
13 * Neil Russell.
Simon Glass28527092016-11-23 06:34:44 -070014 *
15 * NOTE: This driver should be converted to driver model before June 2017.
16 * Please see doc/driver-model/i2c-howto.txt for instructions.
wdenkc6097192002-11-03 00:24:07 +000017 */
18
19#include <common.h>
20#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
21#include <ioports.h>
Heiko Schochera21ca952008-10-17 13:52:51 +020022#include <asm/io.h>
wdenkc6097192002-11-03 00:24:07 +000023#endif
Andreas Bießmanneabd5d82011-02-10 00:30:04 +000024#if defined(CONFIG_AVR32)
25#include <asm/arch/portmux.h>
26#endif
Ryan Mallonf3100ff2011-01-27 08:54:15 +130027#if defined(CONFIG_AT91FAMILY)
wdenk9d5028c2004-11-21 00:06:33 +000028#include <asm/io.h>
29#include <asm/arch/hardware.h>
Jens Scharsig0cf0b932010-02-03 22:46:58 +010030#include <asm/arch/at91_pio.h>
Andreas Bießmanncb96a0a2013-10-30 15:18:18 +010031#ifdef CONFIG_ATMEL_LEGACY
Daniel Gorsulowski4e574c42009-05-18 13:20:54 +020032#include <asm/arch/gpio.h>
Jens Scharsig0cf0b932010-02-03 22:46:58 +010033#endif
Daniel Gorsulowski4e574c42009-05-18 13:20:54 +020034#endif
Heiko Schocher1b6275d2009-03-12 07:37:34 +010035#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
Heiko Schochera21ca952008-10-17 13:52:51 +020036#include <asm/io.h>
37#endif
wdenkc6097192002-11-03 00:24:07 +000038#include <i2c.h>
39
Mike Frysinger793b5722010-07-21 13:38:02 -040040#if defined(CONFIG_SOFT_I2C_GPIO_SCL)
41# include <asm/gpio.h>
42
43# ifndef I2C_GPIO_SYNC
44# define I2C_GPIO_SYNC
45# endif
46
47# ifndef I2C_INIT
48# define I2C_INIT \
49 do { \
50 gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
51 gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
52 } while (0)
53# endif
54
55# ifndef I2C_ACTIVE
56# define I2C_ACTIVE do { } while (0)
57# endif
58
59# ifndef I2C_TRISTATE
60# define I2C_TRISTATE do { } while (0)
61# endif
62
63# ifndef I2C_READ
64# define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
65# endif
66
67# ifndef I2C_SDA
68# define I2C_SDA(bit) \
69 do { \
70 if (bit) \
71 gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
72 else \
73 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
74 I2C_GPIO_SYNC; \
75 } while (0)
76# endif
77
78# ifndef I2C_SCL
79# define I2C_SCL(bit) \
80 do { \
81 gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
82 I2C_GPIO_SYNC; \
83 } while (0)
84# endif
85
86# ifndef I2C_DELAY
87# define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
88# endif
89
90#endif
91
wdenkc6097192002-11-03 00:24:07 +000092/* #define DEBUG_I2C */
93
Wolfgang Denkd87080b2006-03-31 18:32:53 +020094DECLARE_GLOBAL_DATA_PTR;
Heiko Schocherea818db2013-01-29 08:53:15 +010095
96#ifndef I2C_SOFT_DECLARATIONS
97# if defined(CONFIG_MPC8260)
98# define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = \
99 ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
100# elif defined(CONFIG_8xx)
101# define I2C_SOFT_DECLARATIONS volatile immap_t *immr = \
102 (immap_t *)CONFIG_SYS_IMMR;
103# else
104# define I2C_SOFT_DECLARATIONS
105# endif
106#endif
107
Marek Vasut90f002a2013-08-01 12:32:20 +0200108#if !defined(CONFIG_SYS_I2C_SOFT_SPEED)
109#define CONFIG_SYS_I2C_SOFT_SPEED CONFIG_SYS_I2C_SPEED
Heiko Schocherea818db2013-01-29 08:53:15 +0100110#endif
Marek Vasut90f002a2013-08-01 12:32:20 +0200111#if !defined(CONFIG_SYS_I2C_SOFT_SLAVE)
112#define CONFIG_SYS_I2C_SOFT_SLAVE CONFIG_SYS_I2C_SLAVE
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200113#endif
114
wdenkc6097192002-11-03 00:24:07 +0000115/*-----------------------------------------------------------------------
116 * Definitions
117 */
wdenkc6097192002-11-03 00:24:07 +0000118#define RETRIES 0
119
wdenkc6097192002-11-03 00:24:07 +0000120#define I2C_ACK 0 /* PD_SDA level to ack a byte */
121#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
122
123
124#ifdef DEBUG_I2C
125#define PRINTD(fmt,args...) do { \
wdenkc6097192002-11-03 00:24:07 +0000126 printf (fmt ,##args); \
127 } while (0)
128#else
129#define PRINTD(fmt,args...)
130#endif
131
132/*-----------------------------------------------------------------------
133 * Local functions
134 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +0000136static void send_reset (void);
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200137#endif
wdenkc6097192002-11-03 00:24:07 +0000138static void send_start (void);
139static void send_stop (void);
140static void send_ack (int);
141static int write_byte (uchar byte);
142static uchar read_byte (int);
143
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +0000145/*-----------------------------------------------------------------------
146 * Send a reset sequence consisting of 9 clocks with the data signal high
147 * to clock any confused device back into an idle state. Also send a
148 * <stop> at the end of the sequence for belts & suspenders.
149 */
150static void send_reset(void)
151{
Heiko Schocher98aed372008-10-15 09:35:26 +0200152 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000153 int j;
154
wdenk60fbe252003-04-08 23:25:21 +0000155 I2C_SCL(1);
wdenkc6097192002-11-03 00:24:07 +0000156 I2C_SDA(1);
wdenk60fbe252003-04-08 23:25:21 +0000157#ifdef I2C_INIT
158 I2C_INIT;
159#endif
160 I2C_TRISTATE;
wdenkc6097192002-11-03 00:24:07 +0000161 for(j = 0; j < 9; j++) {
162 I2C_SCL(0);
163 I2C_DELAY;
164 I2C_DELAY;
165 I2C_SCL(1);
166 I2C_DELAY;
167 I2C_DELAY;
168 }
169 send_stop();
170 I2C_TRISTATE;
171}
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200172#endif
wdenkc6097192002-11-03 00:24:07 +0000173
174/*-----------------------------------------------------------------------
175 * START: High -> Low on SDA while SCL is High
176 */
177static void send_start(void)
178{
Heiko Schocher98aed372008-10-15 09:35:26 +0200179 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000180
181 I2C_DELAY;
182 I2C_SDA(1);
183 I2C_ACTIVE;
184 I2C_DELAY;
185 I2C_SCL(1);
186 I2C_DELAY;
187 I2C_SDA(0);
188 I2C_DELAY;
189}
190
191/*-----------------------------------------------------------------------
192 * STOP: Low -> High on SDA while SCL is High
193 */
194static void send_stop(void)
195{
Heiko Schocher98aed372008-10-15 09:35:26 +0200196 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000197
198 I2C_SCL(0);
199 I2C_DELAY;
200 I2C_SDA(0);
201 I2C_ACTIVE;
202 I2C_DELAY;
203 I2C_SCL(1);
204 I2C_DELAY;
205 I2C_SDA(1);
206 I2C_DELAY;
207 I2C_TRISTATE;
208}
209
wdenkc6097192002-11-03 00:24:07 +0000210/*-----------------------------------------------------------------------
211 * ack should be I2C_ACK or I2C_NOACK
212 */
213static void send_ack(int ack)
214{
Heiko Schocher98aed372008-10-15 09:35:26 +0200215 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000216
wdenkc6097192002-11-03 00:24:07 +0000217 I2C_SCL(0);
218 I2C_DELAY;
wdenkc6097192002-11-03 00:24:07 +0000219 I2C_ACTIVE;
Wolfgang Denkc15f80e2006-03-13 00:50:48 +0100220 I2C_SDA(ack);
wdenkc6097192002-11-03 00:24:07 +0000221 I2C_DELAY;
222 I2C_SCL(1);
223 I2C_DELAY;
224 I2C_DELAY;
225 I2C_SCL(0);
226 I2C_DELAY;
227}
228
wdenkc6097192002-11-03 00:24:07 +0000229/*-----------------------------------------------------------------------
230 * Send 8 bits and look for an acknowledgement.
231 */
232static int write_byte(uchar data)
233{
Heiko Schocher98aed372008-10-15 09:35:26 +0200234 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000235 int j;
236 int nack;
237
238 I2C_ACTIVE;
239 for(j = 0; j < 8; j++) {
240 I2C_SCL(0);
241 I2C_DELAY;
242 I2C_SDA(data & 0x80);
243 I2C_DELAY;
244 I2C_SCL(1);
245 I2C_DELAY;
246 I2C_DELAY;
247
248 data <<= 1;
249 }
250
251 /*
252 * Look for an <ACK>(negative logic) and return it.
253 */
254 I2C_SCL(0);
255 I2C_DELAY;
256 I2C_SDA(1);
257 I2C_TRISTATE;
258 I2C_DELAY;
259 I2C_SCL(1);
260 I2C_DELAY;
261 I2C_DELAY;
262 nack = I2C_READ;
263 I2C_SCL(0);
264 I2C_DELAY;
265 I2C_ACTIVE;
266
267 return(nack); /* not a nack is an ack */
268}
269
wdenkc6097192002-11-03 00:24:07 +0000270/*-----------------------------------------------------------------------
271 * if ack == I2C_ACK, ACK the byte so can continue reading, else
272 * send I2C_NOACK to end the read.
273 */
274static uchar read_byte(int ack)
275{
Heiko Schocher98aed372008-10-15 09:35:26 +0200276 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000277 int data;
278 int j;
279
280 /*
281 * Read 8 bits, MSB first.
282 */
283 I2C_TRISTATE;
Haavard Skinnemoen110e0062008-05-16 11:08:11 +0200284 I2C_SDA(1);
wdenkc6097192002-11-03 00:24:07 +0000285 data = 0;
286 for(j = 0; j < 8; j++) {
287 I2C_SCL(0);
288 I2C_DELAY;
289 I2C_SCL(1);
290 I2C_DELAY;
291 data <<= 1;
292 data |= I2C_READ;
293 I2C_DELAY;
294 }
295 send_ack(ack);
296
297 return(data);
298}
299
wdenkc6097192002-11-03 00:24:07 +0000300/*-----------------------------------------------------------------------
301 * Initialization
302 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100303static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
wdenkc6097192002-11-03 00:24:07 +0000304{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200305#if defined(CONFIG_SYS_I2C_INIT_BOARD)
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200306 /* call board specific i2c bus reset routine before accessing the */
307 /* environment, which might be in a chip on that bus. For details */
308 /* about this problem see doc/I2C_Edge_Conditions. */
309 i2c_init_board();
310#else
wdenkc6097192002-11-03 00:24:07 +0000311 /*
wdenk8bde7f72003-06-27 21:31:46 +0000312 * WARNING: Do NOT save speed in a static variable: if the
313 * I2C routines are called before RAM is initialized (to read
314 * the DIMM SPD, for instance), RAM won't be usable and your
315 * system will crash.
wdenkc6097192002-11-03 00:24:07 +0000316 */
317 send_reset ();
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200318#endif
wdenkc6097192002-11-03 00:24:07 +0000319}
320
321/*-----------------------------------------------------------------------
322 * Probe to see if a chip is present. Also good for checking for the
323 * completion of EEPROM writes since the chip stops responding until
324 * the write completes (typically 10mSec).
325 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100326static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
wdenkc6097192002-11-03 00:24:07 +0000327{
328 int rc;
329
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100330 /*
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100331 * perform 1 byte write transaction with just address byte
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100332 * (fake write)
333 */
wdenkc6097192002-11-03 00:24:07 +0000334 send_start();
wdenk6aff3112002-12-17 01:51:00 +0000335 rc = write_byte ((addr << 1) | 0);
wdenkc6097192002-11-03 00:24:07 +0000336 send_stop();
337
338 return (rc ? 1 : 0);
339}
340
341/*-----------------------------------------------------------------------
342 * Read bytes
343 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100344static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
345 int alen, uchar *buffer, int len)
wdenkc6097192002-11-03 00:24:07 +0000346{
347 int shift;
348 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
349 chip, addr, alen, buffer, len);
350
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200351#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
wdenkc6097192002-11-03 00:24:07 +0000352 /*
353 * EEPROM chips that implement "address overflow" are ones
354 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
355 * address and the extra bits end up in the "chip address"
356 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
357 * four 256 byte chips.
358 *
359 * Note that we consider the length of the address field to
360 * still be one byte because the extra address bits are
361 * hidden in the chip address.
362 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200363 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
wdenkc6097192002-11-03 00:24:07 +0000364
365 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
366 chip, addr);
367#endif
368
369 /*
370 * Do the addressing portion of a write cycle to set the
371 * chip's address pointer. If the address length is zero,
372 * don't do the normal write cycle to set the address pointer,
373 * there is no address pointer in this chip.
374 */
375 send_start();
376 if(alen > 0) {
377 if(write_byte(chip << 1)) { /* write cycle */
378 send_stop();
379 PRINTD("i2c_read, no chip responded %02X\n", chip);
380 return(1);
381 }
382 shift = (alen-1) * 8;
383 while(alen-- > 0) {
384 if(write_byte(addr >> shift)) {
385 PRINTD("i2c_read, address not <ACK>ed\n");
386 return(1);
387 }
388 shift -= 8;
389 }
Andrew Dyer2ac69852008-12-29 17:36:01 -0600390
391 /* Some I2C chips need a stop/start sequence here,
392 * other chips don't work with a full stop and need
393 * only a start. Default behaviour is to send the
394 * stop/start sequence.
395 */
396#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
wdenkc6097192002-11-03 00:24:07 +0000397 send_start();
Andrew Dyer2ac69852008-12-29 17:36:01 -0600398#else
399 send_stop();
400 send_start();
401#endif
wdenkc6097192002-11-03 00:24:07 +0000402 }
403 /*
404 * Send the chip address again, this time for a read cycle.
405 * Then read the data. On the last byte, we do a NACK instead
406 * of an ACK(len == 0) to terminate the read.
407 */
408 write_byte((chip << 1) | 1); /* read cycle */
409 while(len-- > 0) {
410 *buffer++ = read_byte(len == 0);
411 }
412 send_stop();
413 return(0);
414}
415
416/*-----------------------------------------------------------------------
417 * Write bytes
418 */
Heiko Schocherea818db2013-01-29 08:53:15 +0100419static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
420 int alen, uchar *buffer, int len)
wdenkc6097192002-11-03 00:24:07 +0000421{
422 int shift, failures = 0;
423
424 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
425 chip, addr, alen, buffer, len);
426
427 send_start();
428 if(write_byte(chip << 1)) { /* write cycle */
429 send_stop();
430 PRINTD("i2c_write, no chip responded %02X\n", chip);
431 return(1);
432 }
433 shift = (alen-1) * 8;
434 while(alen-- > 0) {
435 if(write_byte(addr >> shift)) {
436 PRINTD("i2c_write, address not <ACK>ed\n");
437 return(1);
438 }
439 shift -= 8;
440 }
441
442 while(len-- > 0) {
443 if(write_byte(*buffer++)) {
444 failures++;
445 }
446 }
447 send_stop();
448 return(failures);
449}
Heiko Schocherea818db2013-01-29 08:53:15 +0100450
451/*
452 * Register soft i2c adapters
453 */
Dirk Eibach37b33252015-10-28 11:46:39 +0100454U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe,
Heiko Schocherea818db2013-01-29 08:53:15 +0100455 soft_i2c_read, soft_i2c_write, NULL,
456 CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
457 0)
458#if defined(I2C_SOFT_DECLARATIONS2)
Dirk Eibach37b33252015-10-28 11:46:39 +0100459U_BOOT_I2C_ADAP_COMPLETE(soft01, soft_i2c_init, soft_i2c_probe,
Heiko Schocherea818db2013-01-29 08:53:15 +0100460 soft_i2c_read, soft_i2c_write, NULL,
461 CONFIG_SYS_I2C_SOFT_SPEED_2,
462 CONFIG_SYS_I2C_SOFT_SLAVE_2,
463 1)
464#endif
465#if defined(I2C_SOFT_DECLARATIONS3)
Dirk Eibach37b33252015-10-28 11:46:39 +0100466U_BOOT_I2C_ADAP_COMPLETE(soft02, soft_i2c_init, soft_i2c_probe,
Heiko Schocherea818db2013-01-29 08:53:15 +0100467 soft_i2c_read, soft_i2c_write, NULL,
468 CONFIG_SYS_I2C_SOFT_SPEED_3,
469 CONFIG_SYS_I2C_SOFT_SLAVE_3,
470 2)
471#endif
472#if defined(I2C_SOFT_DECLARATIONS4)
Dirk Eibach37b33252015-10-28 11:46:39 +0100473U_BOOT_I2C_ADAP_COMPLETE(soft03, soft_i2c_init, soft_i2c_probe,
Heiko Schocherea818db2013-01-29 08:53:15 +0100474 soft_i2c_read, soft_i2c_write, NULL,
475 CONFIG_SYS_I2C_SOFT_SPEED_4,
476 CONFIG_SYS_I2C_SOFT_SLAVE_4,
477 3)
478#endif
Dirk Eibach7ed45d32015-10-28 11:46:35 +0100479#if defined(I2C_SOFT_DECLARATIONS5)
Dirk Eibach37b33252015-10-28 11:46:39 +0100480U_BOOT_I2C_ADAP_COMPLETE(soft04, soft_i2c_init, soft_i2c_probe,
Dirk Eibach7ed45d32015-10-28 11:46:35 +0100481 soft_i2c_read, soft_i2c_write, NULL,
482 CONFIG_SYS_I2C_SOFT_SPEED_5,
483 CONFIG_SYS_I2C_SOFT_SLAVE_5,
484 4)
485#endif
486#if defined(I2C_SOFT_DECLARATIONS6)
Dirk Eibach37b33252015-10-28 11:46:39 +0100487U_BOOT_I2C_ADAP_COMPLETE(soft05, soft_i2c_init, soft_i2c_probe,
Dirk Eibach7ed45d32015-10-28 11:46:35 +0100488 soft_i2c_read, soft_i2c_write, NULL,
489 CONFIG_SYS_I2C_SOFT_SPEED_6,
490 CONFIG_SYS_I2C_SOFT_SLAVE_6,
491 5)
492#endif
493#if defined(I2C_SOFT_DECLARATIONS7)
Dirk Eibach37b33252015-10-28 11:46:39 +0100494U_BOOT_I2C_ADAP_COMPLETE(soft06, soft_i2c_init, soft_i2c_probe,
Dirk Eibach7ed45d32015-10-28 11:46:35 +0100495 soft_i2c_read, soft_i2c_write, NULL,
496 CONFIG_SYS_I2C_SOFT_SPEED_7,
497 CONFIG_SYS_I2C_SOFT_SLAVE_7,
498 6)
499#endif
500#if defined(I2C_SOFT_DECLARATIONS8)
Dirk Eibach37b33252015-10-28 11:46:39 +0100501U_BOOT_I2C_ADAP_COMPLETE(soft07, soft_i2c_init, soft_i2c_probe,
Dirk Eibach7ed45d32015-10-28 11:46:35 +0100502 soft_i2c_read, soft_i2c_write, NULL,
503 CONFIG_SYS_I2C_SOFT_SPEED_8,
504 CONFIG_SYS_I2C_SOFT_SLAVE_8,
505 7)
506#endif
Dirk Eibach5c3b6dc2015-10-28 11:46:36 +0100507#if defined(I2C_SOFT_DECLARATIONS9)
Dirk Eibach37b33252015-10-28 11:46:39 +0100508U_BOOT_I2C_ADAP_COMPLETE(soft08, soft_i2c_init, soft_i2c_probe,
Dirk Eibach5c3b6dc2015-10-28 11:46:36 +0100509 soft_i2c_read, soft_i2c_write, NULL,
510 CONFIG_SYS_I2C_SOFT_SPEED_9,
511 CONFIG_SYS_I2C_SOFT_SLAVE_9,
512 8)
513#endif
514#if defined(I2C_SOFT_DECLARATIONS10)
Dirk Eibach37b33252015-10-28 11:46:39 +0100515U_BOOT_I2C_ADAP_COMPLETE(soft09, soft_i2c_init, soft_i2c_probe,
Dirk Eibach5c3b6dc2015-10-28 11:46:36 +0100516 soft_i2c_read, soft_i2c_write, NULL,
517 CONFIG_SYS_I2C_SOFT_SPEED_10,
518 CONFIG_SYS_I2C_SOFT_SLAVE_10,
519 9)
520#endif
521#if defined(I2C_SOFT_DECLARATIONS11)
522U_BOOT_I2C_ADAP_COMPLETE(soft10, soft_i2c_init, soft_i2c_probe,
523 soft_i2c_read, soft_i2c_write, NULL,
524 CONFIG_SYS_I2C_SOFT_SPEED_11,
525 CONFIG_SYS_I2C_SOFT_SLAVE_11,
526 10)
527#endif
528#if defined(I2C_SOFT_DECLARATIONS12)
529U_BOOT_I2C_ADAP_COMPLETE(soft11, soft_i2c_init, soft_i2c_probe,
530 soft_i2c_read, soft_i2c_write, NULL,
531 CONFIG_SYS_I2C_SOFT_SPEED_12,
532 CONFIG_SYS_I2C_SOFT_SLAVE_12,
533 11)
534#endif