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Stefan Roese887e2ec2006-09-07 11:51:23 +02001/*
2 * Overview:
Scott Woodceee07b2016-05-30 13:57:58 -05003 * Platform independent driver for NDFC (NanD Flash Controller)
Stefan Roese5d841fa2009-05-20 10:58:01 +02004 * integrated into IBM/AMCC PPC4xx cores
Stefan Roese887e2ec2006-09-07 11:51:23 +02005 *
Stefan Roese5d841fa2009-05-20 10:58:01 +02006 * (C) Copyright 2006-2009
Stefan Roese887e2ec2006-09-07 11:51:23 +02007 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
9 * Based on original work by
10 * Thomas Gleixner
11 * Copyright 2006 IBM
12 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020013 * SPDX-License-Identifier: GPL-2.0+
Stefan Roese887e2ec2006-09-07 11:51:23 +020014 */
15
16#include <common.h>
Stefan Roese887e2ec2006-09-07 11:51:23 +020017#include <nand.h>
18#include <linux/mtd/ndfc.h>
Stefan Roese91da09c2007-06-01 15:15:12 +020019#include <linux/mtd/nand_ecc.h>
Stefan Roese887e2ec2006-09-07 11:51:23 +020020#include <asm/processor.h>
Stefan Roese91da09c2007-06-01 15:15:12 +020021#include <asm/io.h>
Stefan Roeseb36df562010-09-09 19:18:00 +020022#include <asm/ppc4xx.h>
Stefan Roese887e2ec2006-09-07 11:51:23 +020023
Alex Watermaneced4622011-05-19 15:08:36 -040024#ifndef CONFIG_SYS_NAND_BCR
25#define CONFIG_SYS_NAND_BCR 0x80002222
26#endif
27#ifndef CONFIG_SYS_NDFC_EBC0_CFG
28#define CONFIG_SYS_NDFC_EBC0_CFG 0xb8400000
29#endif
30
Stefan Roese3df2ece2008-01-05 16:47:58 +010031/*
32 * We need to store the info, which chip-select (CS) is used for the
33 * chip number. For example on Sequoia NAND chip #0 uses
34 * CS #3.
35 */
36static int ndfc_cs[NDFC_MAX_BANKS];
Stefan Roese887e2ec2006-09-07 11:51:23 +020037
William Juulcfa460a2007-10-31 13:53:06 +010038static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
Stefan Roese887e2ec2006-09-07 11:51:23 +020039{
Scott Wood17cb4b82016-05-30 13:57:56 -050040 struct nand_chip *this = mtd_to_nand(mtd);
Stefan Roese3df2ece2008-01-05 16:47:58 +010041 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese887e2ec2006-09-07 11:51:23 +020042
Stefan Roese3df2ece2008-01-05 16:47:58 +010043 if (cmd == NAND_CMD_NONE)
44 return;
Stefan Roese887e2ec2006-09-07 11:51:23 +020045
Stefan Roese3df2ece2008-01-05 16:47:58 +010046 if (ctrl & NAND_CLE)
47 out_8((u8 *)(base + NDFC_CMD), cmd & 0xFF);
48 else
49 out_8((u8 *)(base + NDFC_ALE), cmd & 0xFF);
Stefan Roese887e2ec2006-09-07 11:51:23 +020050}
51
52static int ndfc_dev_ready(struct mtd_info *mtdinfo)
53{
Scott Wood17cb4b82016-05-30 13:57:56 -050054 struct nand_chip *this = mtd_to_nand(mtdinfo);
Stefan Roese3df2ece2008-01-05 16:47:58 +010055 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese887e2ec2006-09-07 11:51:23 +020056
Stefan Roese3df2ece2008-01-05 16:47:58 +010057 return (in_be32((u32 *)(base + NDFC_STAT)) & NDFC_STAT_IS_READY);
Stefan Roese887e2ec2006-09-07 11:51:23 +020058}
59
Stefan Roese91da09c2007-06-01 15:15:12 +020060static void ndfc_enable_hwecc(struct mtd_info *mtdinfo, int mode)
61{
Scott Wood17cb4b82016-05-30 13:57:56 -050062 struct nand_chip *this = mtd_to_nand(mtdinfo);
Stefan Roese3df2ece2008-01-05 16:47:58 +010063 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese91da09c2007-06-01 15:15:12 +020064 u32 ccr;
65
66 ccr = in_be32((u32 *)(base + NDFC_CCR));
67 ccr |= NDFC_CCR_RESET_ECC;
68 out_be32((u32 *)(base + NDFC_CCR), ccr);
69}
70
71static int ndfc_calculate_ecc(struct mtd_info *mtdinfo,
72 const u_char *dat, u_char *ecc_code)
73{
Scott Wood17cb4b82016-05-30 13:57:56 -050074 struct nand_chip *this = mtd_to_nand(mtdinfo);
Stefan Roese3df2ece2008-01-05 16:47:58 +010075 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese91da09c2007-06-01 15:15:12 +020076 u32 ecc;
77 u8 *p = (u8 *)&ecc;
78
79 ecc = in_be32((u32 *)(base + NDFC_ECC));
80
81 /* The NDFC uses Smart Media (SMC) bytes order
82 */
Feng Kan68e74562009-08-21 10:59:42 -070083 ecc_code[0] = p[1];
84 ecc_code[1] = p[2];
Stefan Roese91da09c2007-06-01 15:15:12 +020085 ecc_code[2] = p[3];
86
87 return 0;
88}
Stefan Roese887e2ec2006-09-07 11:51:23 +020089
90/*
91 * Speedups for buffer read/write/verify
92 *
93 * NDFC allows 32bit read/write of data. So we can speed up the buffer
94 * functions. No further checking, as nand_base will always read/write
95 * page aligned.
96 */
97static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len)
98{
Scott Wood17cb4b82016-05-30 13:57:56 -050099 struct nand_chip *this = mtd_to_nand(mtdinfo);
Stefan Roese3df2ece2008-01-05 16:47:58 +0100100 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200101 uint32_t *p = (uint32_t *) buf;
102
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200103 for (;len > 0; len -= 4)
Stefan Roese91da09c2007-06-01 15:15:12 +0200104 *p++ = in_be32((u32 *)(base + NDFC_DATA));
Stefan Roese887e2ec2006-09-07 11:51:23 +0200105}
106
Stefan Roese91da09c2007-06-01 15:15:12 +0200107/*
108 * Don't use these speedup functions in NAND boot image, since the image
109 * has to fit into 4kByte.
110 */
Stefan Roese887e2ec2006-09-07 11:51:23 +0200111static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)
112{
Scott Wood17cb4b82016-05-30 13:57:56 -0500113 struct nand_chip *this = mtd_to_nand(mtdinfo);
Stefan Roese3df2ece2008-01-05 16:47:58 +0100114 ulong base = (ulong) this->IO_ADDR_W & 0xffffff00;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200115 uint32_t *p = (uint32_t *) buf;
116
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200117 for (; len > 0; len -= 4)
Stefan Roese91da09c2007-06-01 15:15:12 +0200118 out_be32((u32 *)(base + NDFC_DATA), *p++);
Stefan Roese887e2ec2006-09-07 11:51:23 +0200119}
120
Alex Watermaneced4622011-05-19 15:08:36 -0400121/*
122 * Read a byte from the NDFC.
123 */
124static uint8_t ndfc_read_byte(struct mtd_info *mtd)
125{
126
Scott Wood17cb4b82016-05-30 13:57:56 -0500127 struct nand_chip *chip = mtd_to_nand(mtd);
Alex Watermaneced4622011-05-19 15:08:36 -0400128
Fabio Estevam66bd1842013-04-11 09:35:34 +0000129#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
Alex Watermaneced4622011-05-19 15:08:36 -0400130 return (uint8_t) readw(chip->IO_ADDR_R);
131#else
132 return readb(chip->IO_ADDR_R);
Wolfgang Ocker52aef8f2008-08-26 19:55:23 +0200133#endif
134
Alex Watermaneced4622011-05-19 15:08:36 -0400135}
136
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200137void board_nand_select_device(struct nand_chip *nand, int chip)
138{
Stefan Roese7ade0c62006-10-24 18:06:48 +0200139 /*
140 * Don't use "chip" to address the NAND device,
141 * generate the cs from the address where it is encoded.
142 */
Stefan Roese3df2ece2008-01-05 16:47:58 +0100143 ulong base = (ulong)nand->IO_ADDR_W & 0xffffff00;
144 int cs = ndfc_cs[chip];
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200145
146 /* Set NandFlash Core Configuration Register */
Stefan Roese91da09c2007-06-01 15:15:12 +0200147 /* 1 col x 2 rows */
148 out_be32((u32 *)(base + NDFC_CCR), 0x00000000 | (cs << 24));
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149 out_be32((u32 *)(base + NDFC_BCFG0 + (cs << 2)), CONFIG_SYS_NAND_BCR);
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200150}
151
Stefan Roesec2b4b2e2008-08-29 11:56:49 +0200152static void ndfc_select_chip(struct mtd_info *mtd, int chip)
153{
154 /*
155 * Nothing to do here!
156 */
157}
158
Heiko Schocherfa230442006-12-21 17:17:02 +0100159int board_nand_init(struct nand_chip *nand)
Stefan Roese887e2ec2006-09-07 11:51:23 +0200160{
Stefan Roese7ade0c62006-10-24 18:06:48 +0200161 int cs = (ulong)nand->IO_ADDR_W & 0x00000003;
Stefan Roese3df2ece2008-01-05 16:47:58 +0100162 ulong base = (ulong)nand->IO_ADDR_W & 0xffffff00;
163 static int chip = 0;
Stefan Roese43a2b0e2006-10-20 14:28:52 +0200164
Stefan Roese3df2ece2008-01-05 16:47:58 +0100165 /*
166 * Save chip-select for this chip #
167 */
168 ndfc_cs[chip] = cs;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200169
Stefan Roese3df2ece2008-01-05 16:47:58 +0100170 /*
171 * Select required NAND chip in NDFC
172 */
173 board_nand_select_device(nand, chip);
174
175 nand->IO_ADDR_R = (void __iomem *)(base + NDFC_DATA);
176 nand->IO_ADDR_W = (void __iomem *)(base + NDFC_DATA);
177 nand->cmd_ctrl = ndfc_hwcontrol;
178 nand->chip_delay = 50;
179 nand->read_buf = ndfc_read_buf;
180 nand->dev_ready = ndfc_dev_ready;
William Juul5e1dae52007-11-09 13:32:30 +0100181 nand->ecc.correct = nand_correct_data;
182 nand->ecc.hwctl = ndfc_enable_hwecc;
183 nand->ecc.calculate = ndfc_calculate_ecc;
184 nand->ecc.mode = NAND_ECC_HW;
185 nand->ecc.size = 256;
186 nand->ecc.bytes = 3;
Sergey Lapindfe64e22013-01-14 03:46:50 +0000187 nand->ecc.strength = 1;
Stefan Roesec2b4b2e2008-08-29 11:56:49 +0200188 nand->select_chip = ndfc_select_chip;
Stefan Roese91da09c2007-06-01 15:15:12 +0200189
Fabio Estevam66bd1842013-04-11 09:35:34 +0000190#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
Alex Watermaneced4622011-05-19 15:08:36 -0400191 nand->options |= NAND_BUSWIDTH_16;
192#endif
193
Stefan Roese887e2ec2006-09-07 11:51:23 +0200194 nand->write_buf = ndfc_write_buf;
Alex Watermaneced4622011-05-19 15:08:36 -0400195 nand->read_byte = ndfc_read_byte;
Stefan Roesec5d02822010-11-23 14:32:48 +0100196
197 chip++;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200198
Heiko Schocherfa230442006-12-21 17:17:02 +0100199 return 0;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200200}