blob: 6133d3f1e71cbb47eeb69ca82731ef085a1e1d48 [file] [log] [blame]
Stephen Warren25734282015-08-13 22:34:22 -06001/*
2 * (C) Copyright 2013-2015
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef _P2371_2180_H
9#define _P2371_2180_H
10
11#include <linux/sizes.h>
12
13#include "tegra210-common.h"
14
15/* High-level configuration options */
Stephen Warren25734282015-08-13 22:34:22 -060016#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-2180"
17
18/* Board-specific serial config */
19#define CONFIG_TEGRA_ENABLE_UARTA
20
21/* I2C */
22#define CONFIG_SYS_I2C_TEGRA
Stephen Warren25734282015-08-13 22:34:22 -060023
24/* SD/MMC */
25#define CONFIG_MMC
26#define CONFIG_GENERIC_MMC
27#define CONFIG_TEGRA_MMC
Stephen Warren25734282015-08-13 22:34:22 -060028
29/* Environment in eMMC, at the end of 2nd "boot sector" */
30#define CONFIG_ENV_IS_IN_MMC
31#define CONFIG_SYS_MMC_ENV_DEV 0
32#define CONFIG_SYS_MMC_ENV_PART 2
33#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
34
35/* SPI */
Stephen Warren25734282015-08-13 22:34:22 -060036#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
37#define CONFIG_SF_DEFAULT_SPEED 24000000
Stephen Warren25734282015-08-13 22:34:22 -060038#define CONFIG_SPI_FLASH_SIZE (4 << 20)
39
40/* USB2.0 Host support */
41#define CONFIG_USB_EHCI
42#define CONFIG_USB_EHCI_TEGRA
Stephen Warren25734282015-08-13 22:34:22 -060043#define CONFIG_USB_STORAGE
Stephen Warren25734282015-08-13 22:34:22 -060044
45/* USB networking support */
46#define CONFIG_USB_HOST_ETHER
47#define CONFIG_USB_ETHER_ASIX
48
Stephen Warren019bc622015-10-05 17:02:40 -060049/* PCI host support */
50#define CONFIG_PCI
Stephen Warren019bc622015-10-05 17:02:40 -060051#define CONFIG_PCI_PNP
52#define CONFIG_CMD_PCI
Stephen Warren019bc622015-10-05 17:02:40 -060053
Stephen Warren25734282015-08-13 22:34:22 -060054/* General networking support */
Stephen Warren25734282015-08-13 22:34:22 -060055
56#include "tegra-common-usb-gadget.h"
57#include "tegra-common-post.h"
58
Stephen Warrenbfac0842015-08-19 15:15:41 -060059/* Crystal is 38.4MHz. clk_m runs at half that rate */
60#define COUNTER_FREQUENCY 19200000
Stephen Warren25734282015-08-13 22:34:22 -060061
62#endif /* _P2371_2180_H */