Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
Adam Ford | 1bf3301 | 2019-08-14 08:29:25 -0500 | [diff] [blame^] | 2 | CONFIG_ARCH_CPU_INIT=y |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 3 | CONFIG_ARCH_MVEBU=y |
Tom Rini | 278b90c | 2018-02-03 12:10:38 -0500 | [diff] [blame] | 4 | CONFIG_SYS_TEXT_BASE=0x00000000 |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 5 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
Konstantin Porotchkin | c5330ae | 2017-02-16 13:52:22 +0200 | [diff] [blame] | 6 | CONFIG_TARGET_MVEBU_ARMADA_37XX=y |
Tom Rini | d168bcb | 2019-04-29 15:54:04 -0400 | [diff] [blame] | 7 | CONFIG_NR_DRAM_BANKS=1 |
Tom Rini | 358b6a2 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 8 | CONFIG_DEBUG_UART_BASE=0xd0012000 |
9 | CONFIG_DEBUG_UART_CLOCK=25804800 | ||||
Tom Rini | fb82fe3 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 10 | CONFIG_DEBUG_UART=y |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 11 | CONFIG_AHCI=y |
Tom Rini | 7c8f00e | 2018-02-10 20:27:45 -0500 | [diff] [blame] | 12 | CONFIG_DISTRO_DEFAULTS=y |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 13 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
Simon Glass | 37304aa | 2019-07-20 20:51:14 -0600 | [diff] [blame] | 14 | CONFIG_USE_PREBOOT=y |
Simon Glass | f3f3eff | 2016-10-17 20:13:00 -0600 | [diff] [blame] | 15 | CONFIG_SYS_CONSOLE_INFO_QUIET=y |
Lokesh Vutla | 19a9747 | 2016-10-08 14:41:44 -0400 | [diff] [blame] | 16 | # CONFIG_DISPLAY_CPUINFO is not set |
Lokesh Vutla | 8435179 | 2016-10-11 21:33:46 -0400 | [diff] [blame] | 17 | # CONFIG_DISPLAY_BOARDINFO is not set |
Mario Six | 78eba69 | 2018-03-28 14:38:17 +0200 | [diff] [blame] | 18 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
Simon Glass | a421192 | 2017-01-23 13:31:19 -0700 | [diff] [blame] | 19 | CONFIG_ARCH_EARLY_INIT_R=y |
Simon Glass | a5d6754 | 2017-01-23 13:31:20 -0700 | [diff] [blame] | 20 | CONFIG_BOARD_EARLY_INIT_F=y |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 21 | # CONFIG_CMD_FLASH is not set |
Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 22 | CONFIG_CMD_GPIO=y |
23 | CONFIG_CMD_I2C=y | ||||
Stefan Roese | ff11d62 | 2016-12-09 15:13:35 +0100 | [diff] [blame] | 24 | CONFIG_CMD_MMC=y |
Ken Ma | 25db371 | 2018-03-26 15:57:32 +0800 | [diff] [blame] | 25 | CONFIG_CMD_PCI=y |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 26 | CONFIG_CMD_SF=y |
27 | CONFIG_CMD_SPI=y | ||||
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 28 | CONFIG_CMD_USB=y |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 29 | # CONFIG_CMD_SETEXPR is not set |
30 | CONFIG_CMD_TFTPPUT=y | ||||
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 31 | CONFIG_CMD_CACHE=y |
32 | CONFIG_CMD_TIME=y | ||||
Tom Rini | 2681e78 | 2017-05-01 11:41:11 -0400 | [diff] [blame] | 33 | CONFIG_CMD_MVEBU_BUBT=y |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 34 | CONFIG_CMD_EXT4_WRITE=y |
Patrick Delaunay | f18fa31 | 2017-01-27 11:00:36 +0100 | [diff] [blame] | 35 | CONFIG_MAC_PARTITION=y |
Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 36 | CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db" |
Tom Rini | 5dc4dfd | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 37 | CONFIG_ENV_IS_IN_SPI_FLASH=y |
Ken Ma | 6d7ea6d | 2018-05-25 15:49:27 +0800 | [diff] [blame] | 38 | CONFIG_AHCI_MVEBU=y |
Tom Rini | 358b6a2 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 39 | CONFIG_CLK=y |
40 | CONFIG_CLK_MVEBU=y | ||||
Stefan Roese | 7d19a24 | 2017-05-17 17:05:38 +0200 | [diff] [blame] | 41 | CONFIG_DM_GPIO=y |
42 | # CONFIG_MVEBU_GPIO is not set | ||||
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 43 | CONFIG_DM_I2C=y |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 44 | CONFIG_MISC=y |
Stefan Roese | ff11d62 | 2016-12-09 15:13:35 +0100 | [diff] [blame] | 45 | CONFIG_DM_MMC=y |
46 | CONFIG_MMC_SDHCI=y | ||||
47 | CONFIG_MMC_SDHCI_SDMA=y | ||||
48 | CONFIG_MMC_SDHCI_XENON=y | ||||
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 49 | CONFIG_SPI_FLASH=y |
Patrick Delaunay | 14453fb | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 50 | CONFIG_SF_DEFAULT_MODE=0 |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 51 | CONFIG_SPI_FLASH_MACRONIX=y |
52 | CONFIG_SPI_FLASH_SPANSION=y | ||||
53 | CONFIG_SPI_FLASH_STMICRO=y | ||||
54 | CONFIG_PHYLIB=y | ||||
Mario Six | a8ca5c8 | 2018-04-27 14:52:21 +0200 | [diff] [blame] | 55 | CONFIG_PHY_MARVELL=y |
Tom Rini | 1989374 | 2017-08-07 22:00:34 -0400 | [diff] [blame] | 56 | CONFIG_PHY_GIGE=y |
Ken Ma | 25db371 | 2018-03-26 15:57:32 +0800 | [diff] [blame] | 57 | CONFIG_E1000=y |
Wilson Ding | f38c098 | 2018-03-26 15:57:30 +0800 | [diff] [blame] | 58 | CONFIG_PCI=y |
59 | CONFIG_DM_PCI=y | ||||
60 | CONFIG_PCI_AARDVARK=y | ||||
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 61 | CONFIG_MVEBU_COMPHY_SUPPORT=y |
Stefan Roese | 7d19a24 | 2017-05-17 17:05:38 +0200 | [diff] [blame] | 62 | CONFIG_PINCTRL=y |
63 | CONFIG_PINCTRL_ARMADA_37XX=y | ||||
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 64 | # CONFIG_SPL_SERIAL_PRESENT is not set |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 65 | CONFIG_DEBUG_MVEBU_A3700_UART=y |
Stefan Roese | 01e62c7 | 2016-05-17 15:04:16 +0200 | [diff] [blame] | 66 | CONFIG_DEBUG_UART_SHIFT=2 |
67 | CONFIG_DEBUG_UART_ANNOUNCE=y | ||||
68 | CONFIG_MVEBU_A3700_UART=y | ||||
69 | CONFIG_MVEBU_A3700_SPI=y | ||||
70 | CONFIG_USB=y | ||||
71 | CONFIG_DM_USB=y | ||||
72 | CONFIG_USB_XHCI_HCD=y | ||||
73 | CONFIG_USB_EHCI_HCD=y | ||||
Chris Packham | ae35844 | 2017-08-28 20:50:45 +1200 | [diff] [blame] | 74 | CONFIG_USB_HOST_ETHER=y |
Chris Packham | f58ad98 | 2017-08-28 20:50:46 +1200 | [diff] [blame] | 75 | CONFIG_USB_ETHER_ASIX=y |
76 | CONFIG_USB_ETHER_MCS7830=y | ||||
77 | CONFIG_USB_ETHER_RTL8152=y | ||||
78 | CONFIG_USB_ETHER_SMSC95XX=y | ||||
Tom Rini | 2681e78 | 2017-05-01 11:41:11 -0400 | [diff] [blame] | 79 | CONFIG_SHA1=y |
80 | CONFIG_SHA256=y |