Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0+ |
Valentin Longchamp | 877bfe3 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 2 | # |
| 3 | # Copyright 2012 Freescale Semiconductor, Inc. |
Valentin Longchamp | 877bfe3 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 4 | # Refer docs/README.pblimage for more details about how-to configure |
| 5 | # and create PBL boot image |
| 6 | # |
| 7 | |
| 8 | #PBI commands |
Valentin Longchamp | 2846c43 | 2014-04-30 15:01:48 +0200 | [diff] [blame] | 9 | #Configure ALTCBAR for DCSR -> DCSR@89000000 |
| 10 | 091380c0 000009C4 |
Valentin Longchamp | fabb929 | 2014-01-27 11:49:07 +0100 | [diff] [blame] | 11 | 09000010 00000000 |
Valentin Longchamp | 2846c43 | 2014-04-30 15:01:48 +0200 | [diff] [blame] | 12 | 091380c0 000009C4 |
Valentin Longchamp | fabb929 | 2014-01-27 11:49:07 +0100 | [diff] [blame] | 13 | 09000014 00000000 |
Valentin Longchamp | 2846c43 | 2014-04-30 15:01:48 +0200 | [diff] [blame] | 14 | 091380c0 000009C4 |
Valentin Longchamp | fabb929 | 2014-01-27 11:49:07 +0100 | [diff] [blame] | 15 | 09000018 81d00000 |
Valentin Longchamp | 2846c43 | 2014-04-30 15:01:48 +0200 | [diff] [blame] | 16 | #Workaround for A-004849 |
| 17 | 091380c0 000009C4 |
| 18 | 890B0050 00000002 |
| 19 | 091380c0 000009C4 |
| 20 | 890B0054 00000002 |
| 21 | 091380c0 000009C4 |
| 22 | 890B0058 00000002 |
| 23 | 091380c0 000009C4 |
| 24 | 890B005C 00000002 |
| 25 | 091380c0 000009C4 |
| 26 | 890B0090 00000002 |
| 27 | 091380c0 000009C4 |
| 28 | 890B0094 00000002 |
| 29 | 091380c0 000009C4 |
| 30 | 890B0098 00000002 |
| 31 | 091380c0 000009C4 |
| 32 | 890B009C 00000002 |
| 33 | 091380c0 000009C4 |
| 34 | 890B0108 00000012 |
| 35 | 091380c0 000009C4 |
| 36 | #Workaround for A-006559 needed for rev 2.0 of P2041 silicon |
| 37 | 89021008 0000f000 |
| 38 | 091380c0 000009C4 |
| 39 | 89021028 0000f000 |
| 40 | 091380c0 000009C4 |
| 41 | 89021048 0000f000 |
| 42 | 091380c0 000009C4 |
| 43 | 89021068 0000f000 |
| 44 | 091380c0 000009C4 |
| 45 | #Flush PBL data |
| 46 | 09138000 00000000 |
| 47 | #Disable ALTCBAR |
Valentin Longchamp | fabb929 | 2014-01-27 11:49:07 +0100 | [diff] [blame] | 48 | 09000018 00000000 |
Valentin Longchamp | 2846c43 | 2014-04-30 15:01:48 +0200 | [diff] [blame] | 49 | 091380c0 000009C4 |
Valentin Longchamp | 877bfe3 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 50 | #Initialize CPC1 as 1MB SRAM |
| 51 | 09010000 00200400 |
| 52 | 09138000 00000000 |
| 53 | 091380c0 00000100 |
| 54 | 09010100 00000000 |
| 55 | 09010104 fff0000b |
| 56 | 09010f00 08000000 |
| 57 | 09010000 80000000 |
| 58 | #Configure LAW for CPC1 |
| 59 | 09000d00 00000000 |
| 60 | 09000d04 fff00000 |
| 61 | 09000d08 81000013 |
| 62 | 09000010 00000000 |
| 63 | 09000014 ff000000 |
| 64 | 09000018 81000000 |
| 65 | #Initialize eSPI controller, default configuration is slow for eSPI to |
| 66 | #load data, this configuration comes from u-boot eSPI driver. |
| 67 | 09110000 80000403 |
| 68 | 09110020 27170008 |
| 69 | 09110024 00100008 |
| 70 | 09110028 00100008 |
| 71 | 0911002c 00100008 |
| 72 | #Flush PBL data |
| 73 | 09138000 00000000 |
| 74 | 091380c0 00000000 |