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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +02002/*
3 * (C) Copyright 2016
Mario Sixd38826a2018-03-06 08:04:58 +01004 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +02005 *
6 * based on arch/powerpc/include/asm/mpc85xx_gpio.h, which is
7 *
8 * Copyright 2010 eXMeritus, A Boeing Company
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +02009 */
10
11#include <common.h>
12#include <dm.h>
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020013#include <mapmem.h>
Mario Sixf9c7fde2018-01-15 11:07:49 +010014#include <asm/gpio.h>
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020015
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020016struct ccsr_gpio {
17 u32 gpdir;
18 u32 gpodr;
19 u32 gpdat;
20 u32 gpier;
21 u32 gpimr;
22 u32 gpicr;
23};
24
Mario Six3c216832018-01-15 11:07:48 +010025struct mpc8xxx_gpio_data {
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020026 /* The bank's register base in memory */
27 struct ccsr_gpio __iomem *base;
28 /* The address of the registers; used to identify the bank */
29 ulong addr;
30 /* The GPIO count of the bank */
31 uint gpio_count;
32 /* The GPDAT register cannot be used to determine the value of output
33 * pins on MPC8572/MPC8536, so we shadow it and use the shadowed value
Mario Sixaadc5e62018-01-15 11:07:46 +010034 * for output pins
35 */
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020036 u32 dat_shadow;
Mario Sixf9c7fde2018-01-15 11:07:49 +010037 ulong type;
38};
39
40enum {
41 MPC8XXX_GPIO_TYPE,
42 MPC5121_GPIO_TYPE,
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020043};
44
Mario Sixaadc5e62018-01-15 11:07:46 +010045inline u32 gpio_mask(uint gpio)
46{
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020047 return (1U << (31 - (gpio)));
48}
49
Mario Six3c216832018-01-15 11:07:48 +010050static inline u32 mpc8xxx_gpio_get_val(struct ccsr_gpio *base, u32 mask)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020051{
52 return in_be32(&base->gpdat) & mask;
53}
54
Mario Six3c216832018-01-15 11:07:48 +010055static inline u32 mpc8xxx_gpio_get_dir(struct ccsr_gpio *base, u32 mask)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020056{
57 return in_be32(&base->gpdir) & mask;
58}
59
Mario Six3c216832018-01-15 11:07:48 +010060static inline int mpc8xxx_gpio_open_drain_val(struct ccsr_gpio *base, u32 mask)
mario.six@gdsys.cc51781782016-05-25 15:15:22 +020061{
62 return in_be32(&base->gpodr) & mask;
63}
64
Mario Six3c216832018-01-15 11:07:48 +010065static inline void mpc8xxx_gpio_open_drain_on(struct ccsr_gpio *base, u32
mario.six@gdsys.cc51781782016-05-25 15:15:22 +020066 gpios)
67{
68 /* GPODR register 1 -> open drain on */
69 setbits_be32(&base->gpodr, gpios);
70}
71
Mario Six3c216832018-01-15 11:07:48 +010072static inline void mpc8xxx_gpio_open_drain_off(struct ccsr_gpio *base,
mario.six@gdsys.cc51781782016-05-25 15:15:22 +020073 u32 gpios)
74{
75 /* GPODR register 0 -> open drain off (actively driven) */
76 clrbits_be32(&base->gpodr, gpios);
77}
78
Mario Six3c216832018-01-15 11:07:48 +010079static int mpc8xxx_gpio_direction_input(struct udevice *dev, uint gpio)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020080{
Mario Six3c216832018-01-15 11:07:48 +010081 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
Rasmus Villemoes1d7ad9f2020-01-28 12:04:33 +000082 u32 mask = gpio_mask(gpio);
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020083
Rasmus Villemoes1d7ad9f2020-01-28 12:04:33 +000084 /* GPDIR register 0 -> input */
85 clrbits_be32(&data->base->gpdir, mask);
86
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020087 return 0;
88}
89
Mario Six3c216832018-01-15 11:07:48 +010090static int mpc8xxx_gpio_set_value(struct udevice *dev, uint gpio, int value)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020091{
Mario Six3c216832018-01-15 11:07:48 +010092 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
Rasmus Villemoesdd4cf532020-01-28 12:04:34 +000093 struct ccsr_gpio *base = data->base;
94 u32 mask = gpio_mask(gpio);
95 u32 gpdir;
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020096
97 if (value) {
Rasmus Villemoesdd4cf532020-01-28 12:04:34 +000098 data->dat_shadow |= mask;
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +020099 } else {
Rasmus Villemoesdd4cf532020-01-28 12:04:34 +0000100 data->dat_shadow &= ~mask;
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200101 }
Rasmus Villemoesdd4cf532020-01-28 12:04:34 +0000102
103 gpdir = in_be32(&base->gpdir);
104 gpdir |= gpio_mask(gpio);
105 out_be32(&base->gpdat, gpdir & data->dat_shadow);
106 out_be32(&base->gpdir, gpdir);
107
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200108 return 0;
109}
110
Mario Six3c216832018-01-15 11:07:48 +0100111static int mpc8xxx_gpio_direction_output(struct udevice *dev, uint gpio,
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200112 int value)
113{
Mario Sixf9c7fde2018-01-15 11:07:49 +0100114 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
115
116 /* GPIO 28..31 are input only on MPC5121 */
117 if (data->type == MPC5121_GPIO_TYPE && gpio >= 28)
118 return -EINVAL;
119
Mario Six3c216832018-01-15 11:07:48 +0100120 return mpc8xxx_gpio_set_value(dev, gpio, value);
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200121}
122
Mario Six3c216832018-01-15 11:07:48 +0100123static int mpc8xxx_gpio_get_value(struct udevice *dev, uint gpio)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200124{
Mario Six3c216832018-01-15 11:07:48 +0100125 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200126
Mario Six3c216832018-01-15 11:07:48 +0100127 if (!!mpc8xxx_gpio_get_dir(data->base, gpio_mask(gpio))) {
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200128 /* Output -> use shadowed value */
129 return !!(data->dat_shadow & gpio_mask(gpio));
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200130 }
Mario Sixaadc5e62018-01-15 11:07:46 +0100131
132 /* Input -> read value from GPDAT register */
Mario Six3c216832018-01-15 11:07:48 +0100133 return !!mpc8xxx_gpio_get_val(data->base, gpio_mask(gpio));
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200134}
135
Mario Six3c216832018-01-15 11:07:48 +0100136static int mpc8xxx_gpio_get_function(struct udevice *dev, uint gpio)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200137{
Mario Six3c216832018-01-15 11:07:48 +0100138 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200139 int dir;
140
Mario Six3c216832018-01-15 11:07:48 +0100141 dir = !!mpc8xxx_gpio_get_dir(data->base, gpio_mask(gpio));
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200142 return dir ? GPIOF_OUTPUT : GPIOF_INPUT;
143}
144
Hamish Martin4b689f02016-06-14 10:17:05 +1200145#if CONFIG_IS_ENABLED(OF_CONTROL)
Mario Six3c216832018-01-15 11:07:48 +0100146static int mpc8xxx_gpio_ofdata_to_platdata(struct udevice *dev)
Mario Sixaadc5e62018-01-15 11:07:46 +0100147{
Mario Six3c216832018-01-15 11:07:48 +0100148 struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200149 fdt_addr_t addr;
Mario Sixf5ac4f22018-01-15 11:07:50 +0100150 u32 reg[2];
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200151
Mario Sixf5ac4f22018-01-15 11:07:50 +0100152 dev_read_u32_array(dev, "reg", reg, 2);
153 addr = dev_translate_address(dev, reg);
154
Hamish Martin4b689f02016-06-14 10:17:05 +1200155 plat->addr = addr;
Mario Sixf5ac4f22018-01-15 11:07:50 +0100156 plat->size = reg[1];
157 plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200158
Hamish Martin4b689f02016-06-14 10:17:05 +1200159 return 0;
160}
161#endif
162
Mario Six3c216832018-01-15 11:07:48 +0100163static int mpc8xxx_gpio_platdata_to_priv(struct udevice *dev)
Hamish Martin4b689f02016-06-14 10:17:05 +1200164{
Mario Six3c216832018-01-15 11:07:48 +0100165 struct mpc8xxx_gpio_data *priv = dev_get_priv(dev);
166 struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
Hamish Martin4b689f02016-06-14 10:17:05 +1200167 unsigned long size = plat->size;
Mario Sixf9c7fde2018-01-15 11:07:49 +0100168 ulong driver_data = dev_get_driver_data(dev);
Hamish Martin4b689f02016-06-14 10:17:05 +1200169
170 if (size == 0)
171 size = 0x100;
172
173 priv->addr = plat->addr;
Mario Sixf5ac4f22018-01-15 11:07:50 +0100174 priv->base = map_sysmem(plat->addr, size);
Hamish Martin4b689f02016-06-14 10:17:05 +1200175
176 if (!priv->base)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200177 return -ENOMEM;
178
Hamish Martin4b689f02016-06-14 10:17:05 +1200179 priv->gpio_count = plat->ngpios;
180 priv->dat_shadow = 0;
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200181
Mario Six3c216832018-01-15 11:07:48 +0100182 priv->type = driver_data;
183
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200184 return 0;
185}
186
Mario Six3c216832018-01-15 11:07:48 +0100187static int mpc8xxx_gpio_probe(struct udevice *dev)
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200188{
189 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Mario Six3c216832018-01-15 11:07:48 +0100190 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200191 char name[32], *str;
192
Mario Six3c216832018-01-15 11:07:48 +0100193 mpc8xxx_gpio_platdata_to_priv(dev);
Hamish Martin4b689f02016-06-14 10:17:05 +1200194
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200195 snprintf(name, sizeof(name), "MPC@%lx_", data->addr);
196 str = strdup(name);
197
198 if (!str)
199 return -ENOMEM;
200
201 uc_priv->bank_name = str;
202 uc_priv->gpio_count = data->gpio_count;
203
204 return 0;
205}
206
Mario Six3c216832018-01-15 11:07:48 +0100207static const struct dm_gpio_ops gpio_mpc8xxx_ops = {
208 .direction_input = mpc8xxx_gpio_direction_input,
209 .direction_output = mpc8xxx_gpio_direction_output,
210 .get_value = mpc8xxx_gpio_get_value,
211 .set_value = mpc8xxx_gpio_set_value,
Mario Six3c216832018-01-15 11:07:48 +0100212 .get_function = mpc8xxx_gpio_get_function,
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200213};
214
Mario Six3c216832018-01-15 11:07:48 +0100215static const struct udevice_id mpc8xxx_gpio_ids[] = {
Mario Sixf9c7fde2018-01-15 11:07:49 +0100216 { .compatible = "fsl,pq3-gpio", .data = MPC8XXX_GPIO_TYPE },
217 { .compatible = "fsl,mpc8308-gpio", .data = MPC8XXX_GPIO_TYPE },
218 { .compatible = "fsl,mpc8349-gpio", .data = MPC8XXX_GPIO_TYPE },
219 { .compatible = "fsl,mpc8572-gpio", .data = MPC8XXX_GPIO_TYPE},
220 { .compatible = "fsl,mpc8610-gpio", .data = MPC8XXX_GPIO_TYPE},
221 { .compatible = "fsl,mpc5121-gpio", .data = MPC5121_GPIO_TYPE, },
222 { .compatible = "fsl,qoriq-gpio", .data = MPC8XXX_GPIO_TYPE },
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200223 { /* sentinel */ }
224};
225
Mario Six3c216832018-01-15 11:07:48 +0100226U_BOOT_DRIVER(gpio_mpc8xxx) = {
227 .name = "gpio_mpc8xxx",
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200228 .id = UCLASS_GPIO,
Mario Six3c216832018-01-15 11:07:48 +0100229 .ops = &gpio_mpc8xxx_ops,
Hamish Martin4b689f02016-06-14 10:17:05 +1200230#if CONFIG_IS_ENABLED(OF_CONTROL)
Mario Six3c216832018-01-15 11:07:48 +0100231 .ofdata_to_platdata = mpc8xxx_gpio_ofdata_to_platdata,
232 .platdata_auto_alloc_size = sizeof(struct mpc8xxx_gpio_plat),
233 .of_match = mpc8xxx_gpio_ids,
Hamish Martin4b689f02016-06-14 10:17:05 +1200234#endif
Mario Six3c216832018-01-15 11:07:48 +0100235 .probe = mpc8xxx_gpio_probe,
236 .priv_auto_alloc_size = sizeof(struct mpc8xxx_gpio_data),
mario.six@gdsys.cc07d31f82016-05-25 15:15:20 +0200237};