blob: 0317ea26c7d9d278440b92884ddc290e7718f7e3 [file] [log] [blame]
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +09001/*
2 * board/renesas/gose/qos.c
3 * This file is gose QoS setting.
4 *
5 * Copyright (C) 2014 Renesas Electronics Corporation
6 *
7 * SPDX-License-Identifier: GPL-2.0
8 */
9
10#include <common.h>
11#include <asm/processor.h>
12#include <asm/mach-types.h>
13#include <asm/io.h>
14#include <asm/arch/rmobile.h>
15
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +090016#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +090017/* QoS version 0.311 */
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +090018enum {
19 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
20 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
21 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
22 DBSC3_15,
23 DBSC3_NR,
24};
25
26static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
27 [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
28 [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
29 [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
30 [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
31 [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
32 [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
33 [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
34 [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
35 [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
36 [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
37 [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
38 [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
39 [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
40 [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
41 [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
42 [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
43};
44
45static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
46 [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
47 [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
48 [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
49 [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
50 [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
51 [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
52 [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
53 [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
54 [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
55 [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
56 [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
57 [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
58 [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
59 [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
60 [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
61 [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
62};
63
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +090064#if defined(CONFIG_QOS_PRI_MEDIA)
65#define is_qos_pri_media() 1
66#else
67#define is_qos_pri_media() 0
68#endif
69
70#if defined(CONFIG_QOS_PRI_NORMAL)
71#define is_qos_pri_normal() 1
72#else
73#define is_qos_pri_normal() 0
74#endif
75
76#if defined(CONFIG_QOS_PRI_GFX)
77#define is_qos_pri_gfx() 1
78#else
79#define is_qos_pri_gfx() 0
80#endif
81
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +090082void qos_init(void)
83{
84 int i;
85 struct rcar_s3c *s3c;
86 struct rcar_s3c_qos *s3c_qos;
87 struct rcar_dbsc3_qos *qos_addr;
88 struct rcar_mxi *mxi;
89 struct rcar_mxi_qos *mxi_qos;
90 struct rcar_axi_qos *axi_qos;
91
92 /* DBSC DBADJ2 */
93 writel(0x20042004, DBSC3_0_DBADJ2);
94
95 /* S3C -QoS */
96 s3c = (struct rcar_s3c *)S3C_BASE;
97 writel(0x00000000, &s3c->s3cadsplcr);
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +090098 if (is_qos_pri_media()) {
99 writel(0x1F0B0604, &s3c->s3crorr);
100 writel(0x1F0E0705, &s3c->s3cworr);
101 } else if (is_qos_pri_normal()) {
102 writel(0x1F0B0908, &s3c->s3crorr);
103 writel(0x1F0C0A08, &s3c->s3cworr);
104 } else if (is_qos_pri_gfx()) {
105 writel(0x1F0B0B0B, &s3c->s3crorr);
106 writel(0x1F0E0C0C, &s3c->s3cworr);
107 }
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +0900108 /* QoS Control Registers */
109 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
110 writel(0x00890089, &s3c_qos->s3cqos0);
111 writel(0x20960010, &s3c_qos->s3cqos1);
112 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +0900113 if (is_qos_pri_media())
114 writel(0x20AA2300, &s3c_qos->s3cqos3);
115 else if (is_qos_pri_normal())
116 writel(0x20AA2200, &s3c_qos->s3cqos3);
117 else if (is_qos_pri_gfx())
118 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +0900119 writel(0x00002032, &s3c_qos->s3cqos4);
120 writel(0x20960010, &s3c_qos->s3cqos5);
121 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +0900122 if (is_qos_pri_media())
123 writel(0x20AA2300, &s3c_qos->s3cqos7);
124 else if (is_qos_pri_normal())
125 writel(0x20AA2200, &s3c_qos->s3cqos7);
126 else if (is_qos_pri_gfx())
127 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +0900128 writel(0x00002032, &s3c_qos->s3cqos8);
129
130 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
131 writel(0x00890089, &s3c_qos->s3cqos0);
132 writel(0x20960010, &s3c_qos->s3cqos1);
133 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +0900134 if (is_qos_pri_media())
135 writel(0x20AA2300, &s3c_qos->s3cqos3);
136 else if (is_qos_pri_normal())
137 writel(0x20AA2200, &s3c_qos->s3cqos3);
138 else if (is_qos_pri_gfx())
139 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +0900140 writel(0x00002032, &s3c_qos->s3cqos4);
141 writel(0x20960010, &s3c_qos->s3cqos5);
142 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +0900143 if (is_qos_pri_media())
144 writel(0x20AA2300, &s3c_qos->s3cqos7);
145 else if (is_qos_pri_normal())
146 writel(0x20AA2200, &s3c_qos->s3cqos7);
147 else if (is_qos_pri_gfx())
148 writel(0x20AA2100, &s3c_qos->s3cqos7);
149 writel(0x00002032, &s3c_qos->s3cqos4);
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +0900150 writel(0x00002032, &s3c_qos->s3cqos8);
151
152 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +0900153 writel(0x00820092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +0900154 writel(0x20960020, &s3c_qos->s3cqos1);
155 writel(0x20302030, &s3c_qos->s3cqos2);
156 writel(0x20AA20DC, &s3c_qos->s3cqos3);
157 writel(0x00002032, &s3c_qos->s3cqos4);
158 writel(0x20960020, &s3c_qos->s3cqos5);
159 writel(0x20302030, &s3c_qos->s3cqos6);
160 writel(0x20AA20DC, &s3c_qos->s3cqos7);
161 writel(0x00002032, &s3c_qos->s3cqos8);
162
163 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +0900164 writel(0x00820092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +0900165 writel(0x20960020, &s3c_qos->s3cqos1);
166 writel(0x20302030, &s3c_qos->s3cqos2);
167 writel(0x20AA20FA, &s3c_qos->s3cqos3);
168 writel(0x00002032, &s3c_qos->s3cqos4);
169 writel(0x20960020, &s3c_qos->s3cqos5);
170 writel(0x20302030, &s3c_qos->s3cqos6);
171 writel(0x20AA20FA, &s3c_qos->s3cqos7);
172 writel(0x00002032, &s3c_qos->s3cqos8);
173
174 /* DBSC -QoS */
175 /* DBSC0 - Read */
176 for (i = DBSC3_00; i < DBSC3_NR; i++) {
177 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
178 writel(0x00000002, &qos_addr->dblgcnt);
179 writel(0x00002096, &qos_addr->dbtmval0);
180 writel(0x00002064, &qos_addr->dbtmval1);
181 writel(0x00002032, &qos_addr->dbtmval2);
182 writel(0x00001FB0, &qos_addr->dbtmval3);
183 writel(0x00000001, &qos_addr->dbrqctr);
184 writel(0x00002078, &qos_addr->dbthres0);
185 writel(0x0000204B, &qos_addr->dbthres1);
186 writel(0x0000201E, &qos_addr->dbthres2);
187 writel(0x00000001, &qos_addr->dblgqon);
188 }
189
190 /* DBSC0 - Write */
191 for (i = DBSC3_00; i < DBSC3_NR; i++) {
192 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
193 writel(0x00000002, &qos_addr->dblgcnt);
194 writel(0x00002096, &qos_addr->dbtmval0);
195 writel(0x00002064, &qos_addr->dbtmval1);
196 writel(0x00002050, &qos_addr->dbtmval2);
197 writel(0x0000203A, &qos_addr->dbtmval3);
198 writel(0x00000001, &qos_addr->dbrqctr);
199 writel(0x00002078, &qos_addr->dbthres0);
200 writel(0x0000204B, &qos_addr->dbthres1);
201 writel(0x0000203C, &qos_addr->dbthres2);
202 writel(0x00000001, &qos_addr->dblgqon);
203 }
204
205 /* CCI-400 -QoS */
206 writel(0x20001000, CCI_400_MAXOT_1);
207 writel(0x20001000, CCI_400_MAXOT_2);
208 writel(0x0000000C, CCI_400_QOSCNTL_1);
209 writel(0x0000000C, CCI_400_QOSCNTL_2);
210
211 /* MXI -QoS */
212 /* Transaction Control (MXI) */
213 mxi = (struct rcar_mxi *)MXI_BASE;
214 writel(0x00000013, &mxi->mxrtcr);
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +0900215 writel(0x00000016, &mxi->mxwtcr);
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +0900216 writel(0x00200000, &mxi->mxs3cracr);
217 writel(0x00200000, &mxi->mxs3cwacr);
218 writel(0x00200000, &mxi->mxaxiracr);
219 writel(0x00200000, &mxi->mxaxiwacr);
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +0900220 writel(0x00780080, &mxi->mxsaar0);
221 writel(0x02000800, &mxi->mxsaar1);
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +0900222
223 /* QoS Control (MXI) */
224 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
225 writel(0x0000000C, &mxi_qos->vspdu0);
226 writel(0x0000000C, &mxi_qos->vspdu1);
227 writel(0x0000000E, &mxi_qos->du0);
228
229 /* AXI -QoS */
230 /* Transaction Control (MXI) */
231 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
232 writel(0x00000002, &axi_qos->qosconf);
233 writel(0x00002245, &axi_qos->qosctset0);
234 writel(0x00002096, &axi_qos->qosctset1);
235 writel(0x00002030, &axi_qos->qosctset2);
236 writel(0x00002030, &axi_qos->qosctset3);
237 writel(0x00000001, &axi_qos->qosreqctr);
238 writel(0x00002064, &axi_qos->qosthres0);
239 writel(0x00002004, &axi_qos->qosthres1);
240 writel(0x00000000, &axi_qos->qosthres2);
241 writel(0x00000001, &axi_qos->qosqon);
242
243 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
244 writel(0x00000000, &axi_qos->qosconf);
245 writel(0x000020A6, &axi_qos->qosctset0);
246 writel(0x00000001, &axi_qos->qosreqctr);
247 writel(0x00002064, &axi_qos->qosthres0);
248 writel(0x00002004, &axi_qos->qosthres1);
249 writel(0x00000000, &axi_qos->qosthres2);
250 writel(0x00000001, &axi_qos->qosqon);
251
252 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
253 writel(0x00000000, &axi_qos->qosconf);
254 writel(0x000020A6, &axi_qos->qosctset0);
255 writel(0x00000001, &axi_qos->qosreqctr);
256 writel(0x00002064, &axi_qos->qosthres0);
257 writel(0x00002004, &axi_qos->qosthres1);
258 writel(0x00000000, &axi_qos->qosthres2);
259 writel(0x00000001, &axi_qos->qosqon);
260
261 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
262 writel(0x00000000, &axi_qos->qosconf);
263 writel(0x00002021, &axi_qos->qosctset0);
264 writel(0x00000001, &axi_qos->qosreqctr);
265 writel(0x00002064, &axi_qos->qosthres0);
266 writel(0x00002004, &axi_qos->qosthres1);
267 writel(0x00000000, &axi_qos->qosthres2);
268 writel(0x00000001, &axi_qos->qosqon);
269
270 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
271 writel(0x00000000, &axi_qos->qosconf);
272 writel(0x00002037, &axi_qos->qosctset0);
273 writel(0x00000001, &axi_qos->qosreqctr);
274 writel(0x00002064, &axi_qos->qosthres0);
275 writel(0x00002004, &axi_qos->qosthres1);
276 writel(0x00000000, &axi_qos->qosthres2);
277 writel(0x00000001, &axi_qos->qosqon);
278
279 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
280 writel(0x00000002, &axi_qos->qosconf);
281 writel(0x00002245, &axi_qos->qosctset0);
282 writel(0x00002096, &axi_qos->qosctset1);
283 writel(0x00002030, &axi_qos->qosctset2);
284 writel(0x00002030, &axi_qos->qosctset3);
285 writel(0x00000001, &axi_qos->qosreqctr);
286 writel(0x00002064, &axi_qos->qosthres0);
287 writel(0x00002004, &axi_qos->qosthres1);
288 writel(0x00000000, &axi_qos->qosthres2);
289 writel(0x00000001, &axi_qos->qosqon);
290
291 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
292 writel(0x00000002, &axi_qos->qosconf);
293 writel(0x00002245, &axi_qos->qosctset0);
294 writel(0x00002096, &axi_qos->qosctset1);
295 writel(0x00002030, &axi_qos->qosctset2);
296 writel(0x00002030, &axi_qos->qosctset3);
297 writel(0x00000001, &axi_qos->qosreqctr);
298 writel(0x00002064, &axi_qos->qosthres0);
299 writel(0x00002004, &axi_qos->qosthres1);
300 writel(0x00000000, &axi_qos->qosthres2);
301 writel(0x00000001, &axi_qos->qosqon);
302
303 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
304 writel(0x00000002, &axi_qos->qosconf);
305 writel(0x00002245, &axi_qos->qosctset0);
306 writel(0x00002096, &axi_qos->qosctset1);
307 writel(0x00002030, &axi_qos->qosctset2);
308 writel(0x00002030, &axi_qos->qosctset3);
309 writel(0x00000001, &axi_qos->qosreqctr);
310 writel(0x00002064, &axi_qos->qosthres0);
311 writel(0x00002004, &axi_qos->qosthres1);
312 writel(0x00000000, &axi_qos->qosthres2);
313 writel(0x00000001, &axi_qos->qosqon);
314
315 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
316 writel(0x00000000, &axi_qos->qosconf);
317 writel(0x0000214C, &axi_qos->qosctset0);
318 writel(0x00000001, &axi_qos->qosreqctr);
319 writel(0x00002064, &axi_qos->qosthres0);
320 writel(0x00002004, &axi_qos->qosthres1);
321 writel(0x00000000, &axi_qos->qosthres2);
322 writel(0x00000001, &axi_qos->qosqon);
323
324 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
325 writel(0x00000001, &axi_qos->qosconf);
326 writel(0x00002004, &axi_qos->qosctset0);
327 writel(0x00002096, &axi_qos->qosctset1);
328 writel(0x00002030, &axi_qos->qosctset2);
329 writel(0x00002030, &axi_qos->qosctset3);
330 writel(0x00000001, &axi_qos->qosreqctr);
331 writel(0x00002064, &axi_qos->qosthres0);
332 writel(0x00002004, &axi_qos->qosthres1);
333 writel(0x00000000, &axi_qos->qosthres2);
334 writel(0x00000001, &axi_qos->qosqon);
335
336 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
337 writel(0x00000001, &axi_qos->qosconf);
338 writel(0x00002004, &axi_qos->qosctset0);
339 writel(0x00002096, &axi_qos->qosctset1);
340 writel(0x00002030, &axi_qos->qosctset2);
341 writel(0x00002030, &axi_qos->qosctset3);
342 writel(0x00000001, &axi_qos->qosreqctr);
343 writel(0x00002064, &axi_qos->qosthres0);
344 writel(0x00002004, &axi_qos->qosthres1);
345 writel(0x00000000, &axi_qos->qosthres2);
346 writel(0x00000001, &axi_qos->qosqon);
347
348 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
349 writel(0x00000001, &axi_qos->qosconf);
350 writel(0x00002004, &axi_qos->qosctset0);
351 writel(0x00002096, &axi_qos->qosctset1);
352 writel(0x00002030, &axi_qos->qosctset2);
353 writel(0x00002030, &axi_qos->qosctset3);
354 writel(0x00000001, &axi_qos->qosreqctr);
355 writel(0x00002064, &axi_qos->qosthres0);
356 writel(0x00002004, &axi_qos->qosthres1);
357 writel(0x00000000, &axi_qos->qosthres2);
358 writel(0x00000001, &axi_qos->qosqon);
359
360 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
361 writel(0x00000001, &axi_qos->qosconf);
362 writel(0x00002004, &axi_qos->qosctset0);
363 writel(0x00002096, &axi_qos->qosctset1);
364 writel(0x00002030, &axi_qos->qosctset2);
365 writel(0x00002030, &axi_qos->qosctset3);
366 writel(0x00000001, &axi_qos->qosreqctr);
367 writel(0x00002064, &axi_qos->qosthres0);
368 writel(0x00002004, &axi_qos->qosthres1);
369 writel(0x00000000, &axi_qos->qosthres2);
370 writel(0x00000001, &axi_qos->qosqon);
371
372 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
373 writel(0x00000001, &axi_qos->qosconf);
374 writel(0x00002004, &axi_qos->qosctset0);
375 writel(0x00002096, &axi_qos->qosctset1);
376 writel(0x00002030, &axi_qos->qosctset2);
377 writel(0x00002030, &axi_qos->qosctset3);
378 writel(0x00000001, &axi_qos->qosreqctr);
379 writel(0x00002064, &axi_qos->qosthres0);
380 writel(0x00002004, &axi_qos->qosthres1);
381 writel(0x00000000, &axi_qos->qosthres2);
382 writel(0x00000001, &axi_qos->qosqon);
383
384 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
385 writel(0x00000000, &axi_qos->qosconf);
386 writel(0x00002021, &axi_qos->qosctset0);
387 writel(0x00000001, &axi_qos->qosreqctr);
388 writel(0x00002064, &axi_qos->qosthres0);
389 writel(0x00002004, &axi_qos->qosthres1);
390 writel(0x00000000, &axi_qos->qosthres2);
391 writel(0x00000001, &axi_qos->qosqon);
392
393 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
394 writel(0x00000000, &axi_qos->qosconf);
395 writel(0x00002021, &axi_qos->qosctset0);
396 writel(0x00000001, &axi_qos->qosreqctr);
397 writel(0x00002064, &axi_qos->qosthres0);
398 writel(0x00002004, &axi_qos->qosthres1);
399 writel(0x00000000, &axi_qos->qosthres2);
400 writel(0x00000001, &axi_qos->qosqon);
401
402 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
403 writel(0x00000000, &axi_qos->qosconf);
404 writel(0x0000214C, &axi_qos->qosctset0);
405 writel(0x00000001, &axi_qos->qosreqctr);
406 writel(0x00002064, &axi_qos->qosthres0);
407 writel(0x00002004, &axi_qos->qosthres1);
408 writel(0x00000000, &axi_qos->qosthres2);
409 writel(0x00000001, &axi_qos->qosqon);
410
411 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
412 writel(0x00000002, &axi_qos->qosconf);
413 writel(0x00002245, &axi_qos->qosctset0);
414 writel(0x00002096, &axi_qos->qosctset1);
415 writel(0x00002030, &axi_qos->qosctset2);
416 writel(0x00002030, &axi_qos->qosctset3);
417 writel(0x00000001, &axi_qos->qosreqctr);
418 writel(0x00002064, &axi_qos->qosthres0);
419 writel(0x00002004, &axi_qos->qosthres1);
420 writel(0x00000000, &axi_qos->qosthres2);
421 writel(0x00000001, &axi_qos->qosqon);
422
423 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
424 writel(0x00000000, &axi_qos->qosconf);
425 writel(0x000020A6, &axi_qos->qosctset0);
426 writel(0x00000001, &axi_qos->qosreqctr);
427 writel(0x00002064, &axi_qos->qosthres0);
428 writel(0x00002004, &axi_qos->qosthres1);
429 writel(0x00000000, &axi_qos->qosthres2);
430 writel(0x00000001, &axi_qos->qosqon);
431
432 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
433 writel(0x00000000, &axi_qos->qosconf);
434 writel(0x000020A6, &axi_qos->qosctset0);
435 writel(0x00000001, &axi_qos->qosreqctr);
436 writel(0x00002064, &axi_qos->qosthres0);
437 writel(0x00002004, &axi_qos->qosthres1);
438 writel(0x00000000, &axi_qos->qosthres2);
439 writel(0x00000001, &axi_qos->qosqon);
440
441 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
442 writel(0x00000000, &axi_qos->qosconf);
443 writel(0x00002053, &axi_qos->qosctset0);
444 writel(0x00000001, &axi_qos->qosreqctr);
445 writel(0x00002064, &axi_qos->qosthres0);
446 writel(0x00002004, &axi_qos->qosthres1);
447 writel(0x00000000, &axi_qos->qosthres2);
448 writel(0x00000001, &axi_qos->qosqon);
449
450 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
451 writel(0x00000000, &axi_qos->qosconf);
452 writel(0x00002053, &axi_qos->qosctset0);
453 writel(0x00000001, &axi_qos->qosreqctr);
454 writel(0x00002064, &axi_qos->qosthres0);
455 writel(0x00002004, &axi_qos->qosthres1);
456 writel(0x00000000, &axi_qos->qosthres2);
457 writel(0x00000001, &axi_qos->qosqon);
458
459 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
460 writel(0x00000000, &axi_qos->qosconf);
461 writel(0x00002053, &axi_qos->qosctset0);
462 writel(0x00000001, &axi_qos->qosreqctr);
463 writel(0x00002064, &axi_qos->qosthres0);
464 writel(0x00002004, &axi_qos->qosthres1);
465 writel(0x00000000, &axi_qos->qosthres2);
466 writel(0x00000001, &axi_qos->qosqon);
467
468 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
469 writel(0x00000000, &axi_qos->qosconf);
470 writel(0x0000214C, &axi_qos->qosctset0);
471 writel(0x00000001, &axi_qos->qosreqctr);
472 writel(0x00002064, &axi_qos->qosthres0);
473 writel(0x00002004, &axi_qos->qosthres1);
474 writel(0x00000000, &axi_qos->qosthres2);
475 writel(0x00000001, &axi_qos->qosqon);
476
477 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
478 writel(0x00000002, &axi_qos->qosconf);
479 writel(0x00002245, &axi_qos->qosctset0);
480 writel(0x00000001, &axi_qos->qosreqctr);
481 writel(0x00002064, &axi_qos->qosthres0);
482 writel(0x00002004, &axi_qos->qosthres1);
483 writel(0x00000000, &axi_qos->qosthres2);
484 writel(0x00000001, &axi_qos->qosqon);
485
486 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
487 writel(0x00000000, &axi_qos->qosconf);
488 writel(0x00002029, &axi_qos->qosctset0);
489 writel(0x00000001, &axi_qos->qosreqctr);
490 writel(0x00002064, &axi_qos->qosthres0);
491 writel(0x00002004, &axi_qos->qosthres1);
492 writel(0x00000000, &axi_qos->qosthres2);
493 writel(0x00000001, &axi_qos->qosqon);
494
495 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
496 writel(0x00000002, &axi_qos->qosconf);
497 writel(0x00002245, &axi_qos->qosctset0);
498 writel(0x00000001, &axi_qos->qosreqctr);
499 writel(0x00002064, &axi_qos->qosthres0);
500 writel(0x00002004, &axi_qos->qosthres1);
501 writel(0x00000000, &axi_qos->qosthres2);
502 writel(0x00000001, &axi_qos->qosqon);
503
504 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
505 writel(0x00000000, &axi_qos->qosconf);
506 writel(0x00002053, &axi_qos->qosctset0);
507 writel(0x00000001, &axi_qos->qosreqctr);
508 writel(0x00002064, &axi_qos->qosthres0);
509 writel(0x00002004, &axi_qos->qosthres1);
510 writel(0x00000000, &axi_qos->qosthres2);
511 writel(0x00000001, &axi_qos->qosqon);
512
513 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
514 writel(0x00000000, &axi_qos->qosconf);
515 writel(0x000020A6, &axi_qos->qosctset0);
516 writel(0x00000001, &axi_qos->qosreqctr);
517 writel(0x00002064, &axi_qos->qosthres0);
518 writel(0x00002004, &axi_qos->qosthres1);
519 writel(0x00000000, &axi_qos->qosthres2);
520 writel(0x00000001, &axi_qos->qosqon);
521
522 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
523 writel(0x00000000, &axi_qos->qosconf);
524 writel(0x00002053, &axi_qos->qosctset0);
525 writel(0x00000001, &axi_qos->qosreqctr);
526 writel(0x00002064, &axi_qos->qosthres0);
527 writel(0x00002004, &axi_qos->qosthres1);
528 writel(0x00000000, &axi_qos->qosthres2);
529 writel(0x00000001, &axi_qos->qosqon);
530
531 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
532 writel(0x00000002, &axi_qos->qosconf);
533 writel(0x00002245, &axi_qos->qosctset0);
534 writel(0x00000001, &axi_qos->qosreqctr);
535 writel(0x00002064, &axi_qos->qosthres0);
536 writel(0x00002004, &axi_qos->qosthres1);
537 writel(0x00000000, &axi_qos->qosthres2);
538 writel(0x00000001, &axi_qos->qosqon);
539
540 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE;
541 writel(0x00000000, &axi_qos->qosconf);
542 writel(0x00002053, &axi_qos->qosctset0);
543 writel(0x00000001, &axi_qos->qosreqctr);
544 writel(0x00002064, &axi_qos->qosthres0);
545 writel(0x00002004, &axi_qos->qosthres1);
546 writel(0x00000000, &axi_qos->qosthres2);
547 writel(0x00000001, &axi_qos->qosqon);
548
549 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE;
550 writel(0x00000000, &axi_qos->qosconf);
551 writel(0x00002053, &axi_qos->qosctset0);
552 writel(0x00000001, &axi_qos->qosreqctr);
553 writel(0x00002064, &axi_qos->qosthres0);
554 writel(0x00002004, &axi_qos->qosthres1);
555 writel(0x00000000, &axi_qos->qosthres2);
556 writel(0x00000001, &axi_qos->qosqon);
557
558 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
559 writel(0x00000000, &axi_qos->qosconf);
560 writel(0x0000214C, &axi_qos->qosctset0);
561 writel(0x00000001, &axi_qos->qosreqctr);
562 writel(0x00002064, &axi_qos->qosthres0);
563 writel(0x00002004, &axi_qos->qosthres1);
564 writel(0x00000000, &axi_qos->qosthres2);
565 writel(0x00000001, &axi_qos->qosqon);
566
567 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
568 writel(0x00000000, &axi_qos->qosconf);
569 writel(0x0000214C, &axi_qos->qosctset0);
570 writel(0x00000001, &axi_qos->qosreqctr);
571 writel(0x00002064, &axi_qos->qosthres0);
572 writel(0x00002004, &axi_qos->qosthres1);
573 writel(0x00000000, &axi_qos->qosthres2);
574 writel(0x00000001, &axi_qos->qosqon);
575
576 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
577 writel(0x00000000, &axi_qos->qosconf);
578 writel(0x000020A6, &axi_qos->qosctset0);
579 writel(0x00000001, &axi_qos->qosreqctr);
580 writel(0x00002064, &axi_qos->qosthres0);
581 writel(0x00002004, &axi_qos->qosthres1);
582 writel(0x00000000, &axi_qos->qosthres2);
583 writel(0x00000001, &axi_qos->qosqon);
584
585 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
586 writel(0x00000000, &axi_qos->qosconf);
587 writel(0x00002053, &axi_qos->qosctset0);
588 writel(0x00000001, &axi_qos->qosreqctr);
589 writel(0x00002064, &axi_qos->qosthres0);
590 writel(0x00002004, &axi_qos->qosthres1);
591 writel(0x00000000, &axi_qos->qosthres2);
592 writel(0x00000001, &axi_qos->qosqon);
593
594 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
595 writel(0x00000000, &axi_qos->qosconf);
596 writel(0x00002053, &axi_qos->qosctset0);
597 writel(0x00000001, &axi_qos->qosreqctr);
598 writel(0x00002064, &axi_qos->qosthres0);
599 writel(0x00002004, &axi_qos->qosthres1);
600 writel(0x00000000, &axi_qos->qosthres2);
601 writel(0x00000001, &axi_qos->qosqon);
602
603 /* QoS Register (RT-AXI) */
604 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsu98c33222015-03-05 08:30:39 +0900605 writel(0x00000001, &axi_qos->qosconf);
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +0900606 writel(0x00002053, &axi_qos->qosctset0);
607 writel(0x00002096, &axi_qos->qosctset1);
608 writel(0x00002030, &axi_qos->qosctset2);
609 writel(0x00002030, &axi_qos->qosctset3);
610 writel(0x00000001, &axi_qos->qosreqctr);
611 writel(0x00002064, &axi_qos->qosthres0);
612 writel(0x00002004, &axi_qos->qosthres1);
613 writel(0x00000000, &axi_qos->qosthres2);
614 writel(0x00000001, &axi_qos->qosqon);
615
616 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
617 writel(0x00000000, &axi_qos->qosconf);
618 writel(0x00002053, &axi_qos->qosctset0);
619 writel(0x00002096, &axi_qos->qosctset1);
620 writel(0x00002030, &axi_qos->qosctset2);
621 writel(0x00002030, &axi_qos->qosctset3);
622 writel(0x00000001, &axi_qos->qosreqctr);
623 writel(0x00002064, &axi_qos->qosthres0);
624 writel(0x00002004, &axi_qos->qosthres1);
625 writel(0x00000000, &axi_qos->qosthres2);
626 writel(0x00000001, &axi_qos->qosqon);
627
628 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE;
629 writel(0x00000000, &axi_qos->qosconf);
630 writel(0x00002299, &axi_qos->qosctset0);
631 writel(0x00000001, &axi_qos->qosreqctr);
632 writel(0x00002064, &axi_qos->qosthres0);
633 writel(0x00002004, &axi_qos->qosthres1);
634 writel(0x00000000, &axi_qos->qosthres2);
635 writel(0x00000001, &axi_qos->qosqon);
636
637 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
638 writel(0x00000000, &axi_qos->qosconf);
639 writel(0x00002029, &axi_qos->qosctset0);
640 writel(0x00000001, &axi_qos->qosreqctr);
641 writel(0x00002064, &axi_qos->qosthres0);
642 writel(0x00002004, &axi_qos->qosthres1);
643 writel(0x00000000, &axi_qos->qosthres2);
644 writel(0x00000001, &axi_qos->qosqon);
645
646 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
647 writel(0x00000002, &axi_qos->qosconf);
648 writel(0x00002245, &axi_qos->qosctset0);
649 writel(0x00002096, &axi_qos->qosctset1);
650 writel(0x00002030, &axi_qos->qosctset2);
651 writel(0x00002030, &axi_qos->qosctset3);
652 writel(0x00000001, &axi_qos->qosreqctr);
653 writel(0x00002064, &axi_qos->qosthres0);
654 writel(0x00002004, &axi_qos->qosthres1);
655 writel(0x00000000, &axi_qos->qosthres2);
656 writel(0x00000001, &axi_qos->qosqon);
657
658 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
659 writel(0x00000000, &axi_qos->qosconf);
660 writel(0x00002029, &axi_qos->qosctset0);
661 writel(0x00002096, &axi_qos->qosctset1);
662 writel(0x00002030, &axi_qos->qosctset2);
663 writel(0x00002030, &axi_qos->qosctset3);
664 writel(0x00000001, &axi_qos->qosreqctr);
665 writel(0x00002064, &axi_qos->qosthres0);
666 writel(0x00002004, &axi_qos->qosthres1);
667 writel(0x00000000, &axi_qos->qosthres2);
668 writel(0x00000001, &axi_qos->qosqon);
669
670 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
671 writel(0x00000002, &axi_qos->qosconf);
672 writel(0x00002245, &axi_qos->qosctset0);
673 writel(0x00000001, &axi_qos->qosreqctr);
674 writel(0x00002064, &axi_qos->qosthres0);
675 writel(0x00002004, &axi_qos->qosthres1);
676 writel(0x00000000, &axi_qos->qosthres2);
677 writel(0x00000001, &axi_qos->qosqon);
678
679 /* QoS Register (MP-AXI) */
680 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
681 writel(0x00000000, &axi_qos->qosconf);
682 writel(0x00002037, &axi_qos->qosctset0);
683 writel(0x00000001, &axi_qos->qosreqctr);
684 writel(0x00002064, &axi_qos->qosthres0);
685 writel(0x00002004, &axi_qos->qosthres1);
686 writel(0x00000000, &axi_qos->qosthres2);
687 writel(0x00000001, &axi_qos->qosqon);
688
689 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
690 writel(0x00000001, &axi_qos->qosconf);
691 writel(0x00002014, &axi_qos->qosctset0);
692 writel(0x00000040, &axi_qos->qosreqctr);
693 writel(0x00002064, &axi_qos->qosthres0);
694 writel(0x00002004, &axi_qos->qosthres1);
695 writel(0x00000000, &axi_qos->qosthres2);
696 writel(0x00000001, &axi_qos->qosqon);
697
698 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
699 writel(0x00000001, &axi_qos->qosconf);
700 writel(0x00002014, &axi_qos->qosctset0);
701 writel(0x00000040, &axi_qos->qosreqctr);
702 writel(0x00002064, &axi_qos->qosthres0);
703 writel(0x00002004, &axi_qos->qosthres1);
704 writel(0x00000000, &axi_qos->qosthres2);
705 writel(0x00000001, &axi_qos->qosqon);
706
707 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
708 writel(0x00000001, &axi_qos->qosconf);
709 writel(0x00001FF0, &axi_qos->qosctset0);
710 writel(0x00000020, &axi_qos->qosreqctr);
711 writel(0x00002064, &axi_qos->qosthres0);
712 writel(0x00002004, &axi_qos->qosthres1);
713 writel(0x00002001, &axi_qos->qosthres2);
714 writel(0x00000001, &axi_qos->qosqon);
715
716 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
717 writel(0x00000001, &axi_qos->qosconf);
718 writel(0x00002004, &axi_qos->qosctset0);
719 writel(0x00002096, &axi_qos->qosctset1);
720 writel(0x00002030, &axi_qos->qosctset2);
721 writel(0x00002030, &axi_qos->qosctset3);
722 writel(0x00000001, &axi_qos->qosreqctr);
723 writel(0x00002064, &axi_qos->qosthres0);
724 writel(0x00002004, &axi_qos->qosthres1);
725 writel(0x00000000, &axi_qos->qosthres2);
726 writel(0x00000001, &axi_qos->qosqon);
727
728 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
729 writel(0x00000000, &axi_qos->qosconf);
730 writel(0x00002053, &axi_qos->qosctset0);
731 writel(0x00000001, &axi_qos->qosreqctr);
732 writel(0x00002064, &axi_qos->qosthres0);
733 writel(0x00002004, &axi_qos->qosthres1);
734 writel(0x00000000, &axi_qos->qosthres2);
735 writel(0x00000001, &axi_qos->qosqon);
736
737 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
738 writel(0x00000000, &axi_qos->qosconf);
739 writel(0x0000206E, &axi_qos->qosctset0);
740 writel(0x00000001, &axi_qos->qosreqctr);
741 writel(0x00002064, &axi_qos->qosthres0);
742 writel(0x00002004, &axi_qos->qosthres1);
743 writel(0x00000000, &axi_qos->qosthres2);
744 writel(0x00000001, &axi_qos->qosqon);
745
746 /* QoS Register (SYS-AXI256) */
747 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
748 writel(0x00000002, &axi_qos->qosconf);
749 writel(0x000020EB, &axi_qos->qosctset0);
750 writel(0x00002096, &axi_qos->qosctset1);
751 writel(0x00002030, &axi_qos->qosctset2);
752 writel(0x00002030, &axi_qos->qosctset3);
753 writel(0x00000001, &axi_qos->qosreqctr);
754 writel(0x00002064, &axi_qos->qosthres0);
755 writel(0x00002004, &axi_qos->qosthres1);
756 writel(0x00000000, &axi_qos->qosthres2);
757 writel(0x00000001, &axi_qos->qosqon);
758
759 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
760 writel(0x00000002, &axi_qos->qosconf);
761 writel(0x000020EB, &axi_qos->qosctset0);
762 writel(0x00002096, &axi_qos->qosctset1);
763 writel(0x00002030, &axi_qos->qosctset2);
764 writel(0x00002030, &axi_qos->qosctset3);
765 writel(0x00000001, &axi_qos->qosreqctr);
766 writel(0x00002064, &axi_qos->qosthres0);
767 writel(0x00002004, &axi_qos->qosthres1);
768 writel(0x00000000, &axi_qos->qosthres2);
769 writel(0x00000001, &axi_qos->qosqon);
770
771 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
772 writel(0x00000002, &axi_qos->qosconf);
773 writel(0x000020EB, &axi_qos->qosctset0);
774 writel(0x00002096, &axi_qos->qosctset1);
775 writel(0x00002030, &axi_qos->qosctset2);
776 writel(0x00002030, &axi_qos->qosctset3);
777 writel(0x00000001, &axi_qos->qosreqctr);
778 writel(0x00002064, &axi_qos->qosthres0);
779 writel(0x00002004, &axi_qos->qosthres1);
780 writel(0x00000000, &axi_qos->qosthres2);
781 writel(0x00000001, &axi_qos->qosqon);
782
783 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
784 writel(0x00000002, &axi_qos->qosconf);
785 writel(0x000020EB, &axi_qos->qosctset0);
786 writel(0x00002096, &axi_qos->qosctset1);
787 writel(0x00002030, &axi_qos->qosctset2);
788 writel(0x00002030, &axi_qos->qosctset3);
789 writel(0x00000001, &axi_qos->qosreqctr);
790 writel(0x00002064, &axi_qos->qosthres0);
791 writel(0x00002004, &axi_qos->qosthres1);
792 writel(0x00000000, &axi_qos->qosthres2);
793 writel(0x00000001, &axi_qos->qosqon);
794
795 /* QoS Register (CCI-AXI) */
796 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
797 writel(0x00000001, &axi_qos->qosconf);
798 writel(0x00002004, &axi_qos->qosctset0);
799 writel(0x00002096, &axi_qos->qosctset1);
800 writel(0x00002030, &axi_qos->qosctset2);
801 writel(0x00002030, &axi_qos->qosctset3);
802 writel(0x00000001, &axi_qos->qosreqctr);
803 writel(0x00002064, &axi_qos->qosthres0);
804 writel(0x00002004, &axi_qos->qosthres1);
805 writel(0x00000000, &axi_qos->qosthres2);
806 writel(0x00000001, &axi_qos->qosqon);
807
808 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
809 writel(0x00000002, &axi_qos->qosconf);
810 writel(0x00002245, &axi_qos->qosctset0);
811 writel(0x00002096, &axi_qos->qosctset1);
812 writel(0x00002030, &axi_qos->qosctset2);
813 writel(0x00002030, &axi_qos->qosctset3);
814 writel(0x00000001, &axi_qos->qosreqctr);
815 writel(0x00002064, &axi_qos->qosthres0);
816 writel(0x00002004, &axi_qos->qosthres1);
817 writel(0x00000000, &axi_qos->qosthres2);
818 writel(0x00000001, &axi_qos->qosqon);
819
820 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
821 writel(0x00000001, &axi_qos->qosconf);
822 writel(0x00002004, &axi_qos->qosctset0);
823 writel(0x00002096, &axi_qos->qosctset1);
824 writel(0x00002030, &axi_qos->qosctset2);
825 writel(0x00002030, &axi_qos->qosctset3);
826 writel(0x00000001, &axi_qos->qosreqctr);
827 writel(0x00002064, &axi_qos->qosthres0);
828 writel(0x00002004, &axi_qos->qosthres1);
829 writel(0x00000000, &axi_qos->qosthres2);
830 writel(0x00000001, &axi_qos->qosqon);
831
832 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
833 writel(0x00000001, &axi_qos->qosconf);
834 writel(0x00002004, &axi_qos->qosctset0);
835 writel(0x00002096, &axi_qos->qosctset1);
836 writel(0x00002030, &axi_qos->qosctset2);
837 writel(0x00002030, &axi_qos->qosctset3);
838 writel(0x00000001, &axi_qos->qosreqctr);
839 writel(0x00002064, &axi_qos->qosthres0);
840 writel(0x00002004, &axi_qos->qosthres1);
841 writel(0x00000000, &axi_qos->qosthres2);
842 writel(0x00000001, &axi_qos->qosqon);
843
844 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
845 writel(0x00000001, &axi_qos->qosconf);
846 writel(0x00002004, &axi_qos->qosctset0);
847 writel(0x00002096, &axi_qos->qosctset1);
848 writel(0x00002030, &axi_qos->qosctset2);
849 writel(0x00002030, &axi_qos->qosctset3);
850 writel(0x00000001, &axi_qos->qosreqctr);
851 writel(0x00002064, &axi_qos->qosthres0);
852 writel(0x00002004, &axi_qos->qosthres1);
853 writel(0x00000000, &axi_qos->qosthres2);
854 writel(0x00000001, &axi_qos->qosqon);
855
856 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
857 writel(0x00000002, &axi_qos->qosconf);
858 writel(0x00002245, &axi_qos->qosctset0);
859 writel(0x00002096, &axi_qos->qosctset1);
860 writel(0x00002030, &axi_qos->qosctset2);
861 writel(0x00002030, &axi_qos->qosctset3);
862 writel(0x00000001, &axi_qos->qosreqctr);
863 writel(0x00002064, &axi_qos->qosthres0);
864 writel(0x00002004, &axi_qos->qosthres1);
865 writel(0x00000000, &axi_qos->qosthres2);
866 writel(0x00000001, &axi_qos->qosqon);
867
868 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
869 writel(0x00000001, &axi_qos->qosconf);
870 writel(0x00002004, &axi_qos->qosctset0);
871 writel(0x00002096, &axi_qos->qosctset1);
872 writel(0x00002030, &axi_qos->qosctset2);
873 writel(0x00002030, &axi_qos->qosctset3);
874 writel(0x00000001, &axi_qos->qosreqctr);
875 writel(0x00002064, &axi_qos->qosthres0);
876 writel(0x00002004, &axi_qos->qosthres1);
877 writel(0x00000000, &axi_qos->qosthres2);
878 writel(0x00000001, &axi_qos->qosqon);
879
880 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
881 writel(0x00000001, &axi_qos->qosconf);
882 writel(0x00002004, &axi_qos->qosctset0);
883 writel(0x00002096, &axi_qos->qosctset1);
884 writel(0x00002030, &axi_qos->qosctset2);
885 writel(0x00002030, &axi_qos->qosctset3);
886 writel(0x00000001, &axi_qos->qosreqctr);
887 writel(0x00002064, &axi_qos->qosthres0);
888 writel(0x00002004, &axi_qos->qosthres1);
889 writel(0x00000000, &axi_qos->qosthres2);
890 writel(0x00000001, &axi_qos->qosqon);
891
892 /* QoS Register (Media-AXI) */
893 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
894 writel(0x00000002, &axi_qos->qosconf);
895 writel(0x000020DC, &axi_qos->qosctset0);
896 writel(0x00002096, &axi_qos->qosctset1);
897 writel(0x00002030, &axi_qos->qosctset2);
898 writel(0x00002030, &axi_qos->qosctset3);
899 writel(0x00000020, &axi_qos->qosreqctr);
900 writel(0x000020AA, &axi_qos->qosthres0);
901 writel(0x00002032, &axi_qos->qosthres1);
902 writel(0x00000001, &axi_qos->qosthres2);
903
904 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
905 writel(0x00000002, &axi_qos->qosconf);
906 writel(0x000020DC, &axi_qos->qosctset0);
907 writel(0x00002096, &axi_qos->qosctset1);
908 writel(0x00002030, &axi_qos->qosctset2);
909 writel(0x00002030, &axi_qos->qosctset3);
910 writel(0x00000020, &axi_qos->qosreqctr);
911 writel(0x000020AA, &axi_qos->qosthres0);
912 writel(0x00002032, &axi_qos->qosthres1);
913 writel(0x00000001, &axi_qos->qosthres2);
914
915 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
916 writel(0x00000001, &axi_qos->qosconf);
917 writel(0x00002190, &axi_qos->qosctset0);
918 writel(0x00000020, &axi_qos->qosreqctr);
919 writel(0x00002064, &axi_qos->qosthres0);
920 writel(0x00002004, &axi_qos->qosthres1);
921 writel(0x00000001, &axi_qos->qosthres2);
922 writel(0x00000001, &axi_qos->qosqon);
923
924 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
925 writel(0x00000001, &axi_qos->qosconf);
926 writel(0x00002190, &axi_qos->qosctset0);
927 writel(0x00000020, &axi_qos->qosreqctr);
928 writel(0x00000001, &axi_qos->qosthres0);
929 writel(0x00000001, &axi_qos->qosthres1);
930 writel(0x00000001, &axi_qos->qosthres2);
931 writel(0x00000001, &axi_qos->qosqon);
932
933 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
934 writel(0x00000001, &axi_qos->qosconf);
935 writel(0x00002190, &axi_qos->qosctset0);
936 writel(0x00000020, &axi_qos->qosreqctr);
937 writel(0x00002064, &axi_qos->qosthres0);
938 writel(0x00002004, &axi_qos->qosthres1);
939 writel(0x00000001, &axi_qos->qosthres2);
940 writel(0x00000001, &axi_qos->qosqon);
941
942 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
943 writel(0x00000001, &axi_qos->qosconf);
944 writel(0x00002190, &axi_qos->qosctset0);
945 writel(0x00000020, &axi_qos->qosreqctr);
946 writel(0x00000001, &axi_qos->qosthres0);
947 writel(0x00000001, &axi_qos->qosthres1);
948 writel(0x00000001, &axi_qos->qosthres2);
949 writel(0x00000001, &axi_qos->qosqon);
950
951 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
952 writel(0x00000001, &axi_qos->qosconf);
953 writel(0x00002190, &axi_qos->qosctset0);
954 writel(0x00000020, &axi_qos->qosreqctr);
955 writel(0x00002064, &axi_qos->qosthres0);
956 writel(0x00002004, &axi_qos->qosthres1);
957 writel(0x00000001, &axi_qos->qosthres2);
958 writel(0x00000001, &axi_qos->qosqon);
959
960 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
961 writel(0x00000001, &axi_qos->qosconf);
962 writel(0x00002190, &axi_qos->qosctset0);
963 writel(0x00000020, &axi_qos->qosreqctr);
964 writel(0x00000001, &axi_qos->qosthres0);
965 writel(0x00000001, &axi_qos->qosthres1);
966 writel(0x00000001, &axi_qos->qosthres2);
967 writel(0x00000001, &axi_qos->qosqon);
968
969 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
970 writel(0x00000001, &axi_qos->qosconf);
971 writel(0x00002190, &axi_qos->qosctset0);
972 writel(0x00000020, &axi_qos->qosreqctr);
973 writel(0x00002064, &axi_qos->qosthres0);
974 writel(0x00002004, &axi_qos->qosthres1);
975 writel(0x00000001, &axi_qos->qosthres2);
976 writel(0x00000001, &axi_qos->qosqon);
977
978 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
979 writel(0x00000001, &axi_qos->qosconf);
980 writel(0x00002190, &axi_qos->qosctset0);
981 writel(0x00000020, &axi_qos->qosreqctr);
982 writel(0x00000001, &axi_qos->qosthres0);
983 writel(0x00000001, &axi_qos->qosthres1);
984 writel(0x00000001, &axi_qos->qosthres2);
985 writel(0x00000001, &axi_qos->qosqon);
986
987 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
988 writel(0x00000001, &axi_qos->qosconf);
989 writel(0x00002190, &axi_qos->qosctset0);
990 writel(0x00000020, &axi_qos->qosreqctr);
991 writel(0x00002064, &axi_qos->qosthres0);
992 writel(0x00002004, &axi_qos->qosthres1);
993 writel(0x00000001, &axi_qos->qosthres2);
994 writel(0x00000001, &axi_qos->qosqon);
995
996 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
997 writel(0x00000001, &axi_qos->qosconf);
998 writel(0x00002190, &axi_qos->qosctset0);
999 writel(0x00000020, &axi_qos->qosreqctr);
1000 writel(0x00000001, &axi_qos->qosthres0);
1001 writel(0x00000001, &axi_qos->qosthres1);
1002 writel(0x00000001, &axi_qos->qosthres2);
1003 writel(0x00000001, &axi_qos->qosqon);
1004
1005 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
1006 writel(0x00000001, &axi_qos->qosconf);
1007 writel(0x00001FF0, &axi_qos->qosctset0);
1008 writel(0x00000020, &axi_qos->qosreqctr);
1009 writel(0x00002064, &axi_qos->qosthres0);
1010 writel(0x00002004, &axi_qos->qosthres1);
1011 writel(0x00002001, &axi_qos->qosthres2);
1012 writel(0x00000001, &axi_qos->qosqon);
1013
1014 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
1015 writel(0x00000001, &axi_qos->qosconf);
1016 writel(0x000020C8, &axi_qos->qosctset0);
1017 writel(0x00000020, &axi_qos->qosreqctr);
1018 writel(0x00002064, &axi_qos->qosthres0);
1019 writel(0x00002004, &axi_qos->qosthres1);
1020 writel(0x00000001, &axi_qos->qosthres2);
1021 writel(0x00000001, &axi_qos->qosqon);
1022
1023 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
1024 writel(0x00000001, &axi_qos->qosconf);
1025 writel(0x000020C8, &axi_qos->qosctset0);
1026 writel(0x00000020, &axi_qos->qosreqctr);
1027 writel(0x00000001, &axi_qos->qosthres0);
1028 writel(0x00000001, &axi_qos->qosthres1);
1029 writel(0x00000001, &axi_qos->qosthres2);
1030 writel(0x00000001, &axi_qos->qosqon);
1031
1032 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
1033 writel(0x00000001, &axi_qos->qosconf);
1034 writel(0x000020C8, &axi_qos->qosctset0);
1035 writel(0x00000020, &axi_qos->qosreqctr);
1036 writel(0x00002064, &axi_qos->qosthres0);
1037 writel(0x00002004, &axi_qos->qosthres1);
1038 writel(0x00000001, &axi_qos->qosthres2);
1039 writel(0x00000001, &axi_qos->qosqon);
1040
1041 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
1042 writel(0x00000001, &axi_qos->qosconf);
1043 writel(0x000020C8, &axi_qos->qosctset0);
1044 writel(0x00000020, &axi_qos->qosreqctr);
1045 writel(0x00002064, &axi_qos->qosthres0);
1046 writel(0x00002004, &axi_qos->qosthres1);
1047 writel(0x00000001, &axi_qos->qosthres2);
1048 writel(0x00000001, &axi_qos->qosqon);
1049
1050 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
1051 writel(0x00000001, &axi_qos->qosconf);
1052 writel(0x000020C8, &axi_qos->qosctset0);
1053 writel(0x00000020, &axi_qos->qosreqctr);
1054 writel(0x00002064, &axi_qos->qosthres0);
1055 writel(0x00002004, &axi_qos->qosthres1);
1056 writel(0x00000001, &axi_qos->qosthres2);
1057 writel(0x00000001, &axi_qos->qosqon);
1058
1059 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
1060 writel(0x00000001, &axi_qos->qosconf);
1061 writel(0x000020C8, &axi_qos->qosctset0);
1062 writel(0x00000020, &axi_qos->qosreqctr);
1063 writel(0x00000001, &axi_qos->qosthres0);
1064 writel(0x00000001, &axi_qos->qosthres1);
1065 writel(0x00000001, &axi_qos->qosthres2);
1066 writel(0x00000001, &axi_qos->qosqon);
1067
1068 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
1069 writel(0x00000001, &axi_qos->qosconf);
1070 writel(0x000020C8, &axi_qos->qosctset0);
1071 writel(0x00000020, &axi_qos->qosreqctr);
1072 writel(0x00002064, &axi_qos->qosthres0);
1073 writel(0x00002004, &axi_qos->qosthres1);
1074 writel(0x00000001, &axi_qos->qosthres2);
1075 writel(0x00000001, &axi_qos->qosqon);
1076
1077 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
1078 writel(0x00000001, &axi_qos->qosconf);
1079 writel(0x000020C8, &axi_qos->qosctset0);
1080 writel(0x00000020, &axi_qos->qosreqctr);
1081 writel(0x00000001, &axi_qos->qosthres0);
1082 writel(0x00000001, &axi_qos->qosthres1);
1083 writel(0x00000001, &axi_qos->qosthres2);
1084 writel(0x00000001, &axi_qos->qosqon);
1085
1086 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
1087 writel(0x00000001, &axi_qos->qosconf);
1088 writel(0x000020C8, &axi_qos->qosctset0);
1089 writel(0x00000020, &axi_qos->qosreqctr);
1090 writel(0x00002064, &axi_qos->qosthres0);
1091 writel(0x00002004, &axi_qos->qosthres1);
1092 writel(0x00000001, &axi_qos->qosthres2);
1093 writel(0x00000001, &axi_qos->qosqon);
1094
1095 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
1096 writel(0x00000001, &axi_qos->qosconf);
1097 writel(0x000020C8, &axi_qos->qosctset0);
1098 writel(0x00000020, &axi_qos->qosreqctr);
1099 writel(0x00002064, &axi_qos->qosthres0);
1100 writel(0x00002004, &axi_qos->qosthres1);
1101 writel(0x00000001, &axi_qos->qosthres2);
1102 writel(0x00000001, &axi_qos->qosqon);
1103
1104 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
1105 writel(0x00000003, &axi_qos->qosconf);
1106 writel(0x000020C8, &axi_qos->qosctset0);
1107 writel(0x00002064, &axi_qos->qosthres0);
1108 writel(0x00002004, &axi_qos->qosthres1);
1109 writel(0x00000001, &axi_qos->qosthres2);
1110 writel(0x00000001, &axi_qos->qosqon);
1111
1112 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
1113 writel(0x00000003, &axi_qos->qosconf);
1114 writel(0x000020C8, &axi_qos->qosctset0);
1115 writel(0x00002064, &axi_qos->qosthres0);
1116 writel(0x00002004, &axi_qos->qosthres1);
1117 writel(0x00000001, &axi_qos->qosthres2);
1118 writel(0x00000001, &axi_qos->qosqon);
1119
1120 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
1121 writel(0x00000003, &axi_qos->qosconf);
1122 writel(0x000020C8, &axi_qos->qosctset0);
1123 writel(0x00002064, &axi_qos->qosthres0);
1124 writel(0x00002004, &axi_qos->qosthres1);
1125 writel(0x00000001, &axi_qos->qosthres2);
1126 writel(0x00000001, &axi_qos->qosqon);
1127
1128 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
1129 writel(0x00000003, &axi_qos->qosconf);
1130 writel(0x000020C8, &axi_qos->qosctset0);
1131 writel(0x00002064, &axi_qos->qosthres0);
1132 writel(0x00002004, &axi_qos->qosthres1);
1133 writel(0x00000001, &axi_qos->qosthres2);
1134 writel(0x00000001, &axi_qos->qosqon);
1135
1136 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
1137 writel(0x00000003, &axi_qos->qosconf);
1138 writel(0x00002063, &axi_qos->qosctset0);
1139 writel(0x00000001, &axi_qos->qosreqctr);
1140 writel(0x00002064, &axi_qos->qosthres0);
1141 writel(0x00002004, &axi_qos->qosthres1);
1142 writel(0x00000001, &axi_qos->qosthres2);
1143 writel(0x00000001, &axi_qos->qosqon);
1144
1145 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
1146 writel(0x00000003, &axi_qos->qosconf);
1147 writel(0x00002063, &axi_qos->qosctset0);
1148 writel(0x00000001, &axi_qos->qosreqctr);
1149 writel(0x00002064, &axi_qos->qosthres0);
1150 writel(0x00002004, &axi_qos->qosthres1);
1151 writel(0x00000001, &axi_qos->qosthres2);
1152 writel(0x00000001, &axi_qos->qosqon);
1153
1154 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
1155 writel(0x00000001, &axi_qos->qosconf);
1156 writel(0x00002073, &axi_qos->qosctset0);
1157 writel(0x00000020, &axi_qos->qosreqctr);
1158 writel(0x00002064, &axi_qos->qosthres0);
1159 writel(0x00002004, &axi_qos->qosthres1);
1160 writel(0x00000001, &axi_qos->qosthres2);
1161 writel(0x00000001, &axi_qos->qosqon);
1162
1163 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
1164 writel(0x00000001, &axi_qos->qosconf);
1165 writel(0x00002073, &axi_qos->qosctset0);
1166 writel(0x00000020, &axi_qos->qosreqctr);
1167 writel(0x00000001, &axi_qos->qosthres0);
1168 writel(0x00000001, &axi_qos->qosthres1);
1169 writel(0x00000001, &axi_qos->qosthres2);
1170 writel(0x00000001, &axi_qos->qosqon);
1171
1172 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
1173 writel(0x00000001, &axi_qos->qosconf);
1174 writel(0x00002073, &axi_qos->qosctset0);
1175 writel(0x00000020, &axi_qos->qosreqctr);
1176 writel(0x00002064, &axi_qos->qosthres0);
1177 writel(0x00002004, &axi_qos->qosthres1);
1178 writel(0x00000001, &axi_qos->qosthres2);
1179 writel(0x00000001, &axi_qos->qosqon);
1180
1181 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
1182 writel(0x00000001, &axi_qos->qosconf);
1183 writel(0x00002073, &axi_qos->qosctset0);
1184 writel(0x00000020, &axi_qos->qosreqctr);
1185 writel(0x00000001, &axi_qos->qosthres0);
1186 writel(0x00000001, &axi_qos->qosthres1);
1187 writel(0x00000001, &axi_qos->qosthres2);
1188 writel(0x00000001, &axi_qos->qosqon);
1189
1190 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
1191 writel(0x00000001, &axi_qos->qosconf);
1192 writel(0x00002073, &axi_qos->qosctset0);
1193 writel(0x00000020, &axi_qos->qosreqctr);
1194 writel(0x00002064, &axi_qos->qosthres0);
1195 writel(0x00002004, &axi_qos->qosthres1);
1196 writel(0x00000001, &axi_qos->qosthres2);
1197 writel(0x00000001, &axi_qos->qosqon);
1198}
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +09001199#else /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */
Nobuhiro Iwamatsu6a994e52014-11-06 15:39:28 +09001200void qos_init(void)
1201{
1202}
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +09001203#endif /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */