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Hideyuki Sano1a31ca42012-06-27 10:35:35 +09001/*
2 * Configuation settings for the bonito board
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Hideyuki Sano1a31ca42012-06-27 10:35:35 +09007 */
8
9#ifndef __ARMADILLO_800EVA_H
10#define __ARMADILLO_800EVA_H
11
12#undef DEBUG
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090013#define CONFIG_R8A7740
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +090014#define CONFIG_ARCH_RMOBILE_BOARD_STRING "Armadillo-800EVA Board\n"
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090015#define CONFIG_SH_GPIO_PFC
16
17#include <asm/arch/rmobile.h>
18
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090019#define CONFIG_CMD_DFL
20#define CONFIG_CMD_SDRAM
Nobuhiro Iwamatsu09a3be02012-08-09 15:38:47 +090021
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090022#define BOARD_LATE_INIT
23
24#define CONFIG_BAUDRATE 115200
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090025#define CONFIG_BOOTARGS ""
26
27#define CONFIG_VERSION_VARIABLE
28#undef CONFIG_SHOW_BOOT_PROGRESS
29
30#define CONFIG_ARCH_CPU_INIT
31#define CONFIG_DISPLAY_CPUINFO
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090032#define CONFIG_DISPLAY_BOARDINFO
33#define CONFIG_BOARD_EARLY_INIT_F
34#define CONFIG_USE_ARCH_MEMSET
35#define CONFIG_USE_ARCH_MEMCPY
36#define CONFIG_TMU_TIMER
37#define CONFIG_SYS_DCACHE_OFF
38
39/* STACK */
40#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000
41#define STACK_AREA_SIZE 0xC000
42#define LOW_LEVEL_MERAM_STACK \
43 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
44
45/* MEMORY */
46#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
47#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
48
49#define CONFIG_SYS_LONGHELP
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090050#define CONFIG_SYS_CBSIZE 256
51#define CONFIG_SYS_PBSIZE 256
52#define CONFIG_SYS_MAXARGS 16
53#define CONFIG_SYS_BARGSIZE 512
54#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
55
56/* SCIF */
57#define CONFIG_SCIF_CONSOLE
58#define CONFIG_CONS_SCIF1
59#define SCIF0_BASE 0xe6c40000
60#define SCIF1_BASE 0xe6c50000
61#define SCIF2_BASE 0xe6c60000
62#define SCIF4_BASE 0xe6c80000
63#define CONFIG_SCIF_A
64#undef CONFIG_SYS_CONSOLE_INFO_QUIET
65#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
66#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
67
68#define CONFIG_SYS_MEMTEST_START (ARMADILLO_800EVA_SDRAM_BASE)
69#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
70 504 * 1024 * 1024)
71#undef CONFIG_SYS_ALT_MEMTEST
72#undef CONFIG_SYS_MEMTEST_SCRATCH
73#undef CONFIG_SYS_LOADS_BAUD_CHANGE
74
75#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
76#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE)
77#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
78 64 * 1024 * 1024)
79#define CONFIG_NR_DRAM_BANKS 1
80
81#define CONFIG_SYS_MONITOR_BASE 0x00000000
82#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
83#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Hideyuki Sano1a31ca42012-06-27 10:35:35 +090084#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
85#define CONFIG_SYS_TEXT_BASE 0xE80C0000
86
87/* FLASH */
88#define CONFIG_SYS_NO_FLASH
89#define CONFIG_SYS_FLASH_CFI
90#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
91#define CONFIG_SYS_FLASH_BASE 0x00000000
92#define CONFIG_SYS_MAX_FLASH_SECT 512
93#define CONFIG_SYS_MAX_FLASH_BANKS 1
94#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
95
96#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
97#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
98#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
99#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
100
101/* ENV setting */
102#define CONFIG_ENV_IS_IN_FLASH
103#define CONFIG_ENV_OVERWRITE 1
104#define CONFIG_ENV_SECT_SIZE (128 * 1024)
105#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
106 CONFIG_SYS_MONITOR_LEN)
107#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
108#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
109#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
110
111/* SH Ether */
Hideyuki Sano1a31ca42012-06-27 10:35:35 +0900112#define CONFIG_SH_ETHER
113#define CONFIG_SH_ETHER_USE_PORT 0
114#define CONFIG_SH_ETHER_PHY_ADDR 0x0
115#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
116#define CONFIG_SH_ETHER_SH7734_MII (0x01)
117#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
118#define CONFIG_PHYLIB
119#define CONFIG_PHY_SMSC
120#define CONFIG_BITBANGMII
121#define CONFIG_BITBANGMII_MULTI
122
123/* Board Clock */
124#define CONFIG_SYS_CLK_FREQ 50000000
Nobuhiro Iwamatsu717ceb62013-09-30 10:30:41 +0900125#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
126#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Hideyuki Sano1a31ca42012-06-27 10:35:35 +0900127#define CONFIG_SYS_TMU_CLK_DIV 4
Hideyuki Sano1a31ca42012-06-27 10:35:35 +0900128
129#endif /* __ARMADILLO_800EVA_H */