Purna Chandra Mandal | be961fa | 2016-01-28 15:30:16 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2015 Microchip Technology, Inc. |
| 3 | * Purna Chandra Mandal, <purna.mandal@microchip.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #include <dt-bindings/interrupt-controller/irq.h> |
| 9 | #include <dt-bindings/clock/microchip,clock.h> |
| 10 | #include <dt-bindings/gpio/gpio.h> |
| 11 | #include "skeleton.dtsi" |
| 12 | |
| 13 | / { |
| 14 | compatible = "microchip,pic32mzda", "microchip,pic32mz"; |
| 15 | |
| 16 | aliases { |
| 17 | gpio0 = &gpioA; |
| 18 | gpio1 = &gpioB; |
| 19 | gpio2 = &gpioC; |
| 20 | gpio3 = &gpioD; |
| 21 | gpio4 = &gpioE; |
| 22 | gpio5 = &gpioF; |
| 23 | gpio6 = &gpioG; |
| 24 | gpio7 = &gpioH; |
| 25 | gpio8 = &gpioJ; |
| 26 | gpio9 = &gpioK; |
| 27 | }; |
| 28 | |
| 29 | cpus { |
| 30 | cpu@0 { |
| 31 | compatible = "mips,mips14kc"; |
| 32 | }; |
| 33 | }; |
| 34 | |
| 35 | clock: clk@1f801200 { |
| 36 | compatible = "microchip,pic32mzda-clk"; |
| 37 | reg = <0x1f801200 0x1000>; |
| 38 | #clock-cells = <1>; |
| 39 | }; |
| 40 | |
| 41 | uart1: serial@1f822000 { |
| 42 | compatible = "microchip,pic32mzda-uart"; |
| 43 | reg = <0x1f822000 0x50>; |
| 44 | interrupts = <112 IRQ_TYPE_LEVEL_HIGH>; |
| 45 | status = "disabled"; |
| 46 | clocks = <&clock PB2CLK>; |
| 47 | }; |
| 48 | |
| 49 | uart2: serial@1f822200 { |
| 50 | compatible = "microchip,pic32mzda-uart"; |
| 51 | reg = <0x1f822200 0x50>; |
| 52 | interrupts = <145 IRQ_TYPE_LEVEL_HIGH>; |
| 53 | clocks = <&clock PB2CLK>; |
| 54 | status = "disabled"; |
| 55 | }; |
| 56 | |
| 57 | uart6: serial@1f822a00 { |
| 58 | compatible = "microchip,pic32mzda-uart"; |
| 59 | reg = <0x1f822a00 0x50>; |
| 60 | interrupts = <188 IRQ_TYPE_LEVEL_HIGH>; |
| 61 | clocks = <&clock PB2CLK>; |
| 62 | status = "disabled"; |
| 63 | }; |
| 64 | |
| 65 | evic: interrupt-controller@1f810000 { |
| 66 | compatible = "microchip,pic32mzda-evic"; |
| 67 | interrupt-controller; |
| 68 | #interrupt-cells = <2>; |
| 69 | reg = <0x1f810000 0x1000>; |
| 70 | }; |
| 71 | |
| 72 | pinctrl: pinctrl@1f801400 { |
| 73 | compatible = "microchip,pic32mzda-pinctrl"; |
| 74 | reg = <0x1f801400 0x100>, /* in */ |
| 75 | <0x1f801500 0x200>, /* out */ |
| 76 | <0x1f860000 0xa00>; /* port */ |
| 77 | reg-names = "ppsin","ppsout","port"; |
| 78 | status = "disabled"; |
| 79 | |
| 80 | ranges = <0 0x1f860000 0xa00>; |
| 81 | #address-cells = <1>; |
| 82 | #size-cells = <1>; |
| 83 | gpioA: gpio0@0 { |
| 84 | compatible = "microchip,pic32mzda-gpio"; |
| 85 | reg = <0x000 0x48>; |
| 86 | gpio-controller; |
| 87 | #gpio-cells = <2>; |
| 88 | }; |
| 89 | |
| 90 | gpioB: gpio1@100 { |
| 91 | compatible = "microchip,pic32mzda-gpio"; |
| 92 | reg = <0x100 0x48>; |
| 93 | gpio-controller; |
| 94 | #gpio-cells = <2>; |
| 95 | }; |
| 96 | |
| 97 | gpioC: gpio2@200 { |
| 98 | compatible = "microchip,pic32mzda-gpio"; |
| 99 | reg = <0x200 0x48>; |
| 100 | gpio-controller; |
| 101 | #gpio-cells = <2>; |
| 102 | }; |
| 103 | |
| 104 | gpioD: gpio3@300 { |
| 105 | compatible = "microchip,pic32mzda-gpio"; |
| 106 | reg = <0x300 0x48>; |
| 107 | gpio-controller; |
| 108 | #gpio-cells = <2>; |
| 109 | }; |
| 110 | |
| 111 | gpioE: gpio4@400 { |
| 112 | compatible = "microchip,pic32mzda-gpio"; |
| 113 | reg = <0x400 0x48>; |
| 114 | gpio-controller; |
| 115 | #gpio-cells = <2>; |
| 116 | }; |
| 117 | |
| 118 | gpioF: gpio5@500 { |
| 119 | compatible = "microchip,pic32mzda-gpio"; |
| 120 | reg = <0x500 0x48>; |
| 121 | gpio-controller; |
| 122 | #gpio-cells = <2>; |
| 123 | }; |
| 124 | |
| 125 | gpioG: gpio6@600 { |
| 126 | compatible = "microchip,pic32mzda-gpio"; |
| 127 | reg = <0x600 0x48>; |
| 128 | gpio-controller; |
| 129 | #gpio-cells = <2>; |
| 130 | }; |
| 131 | |
| 132 | gpioH: gpio7@700 { |
| 133 | compatible = "microchip,pic32mzda-gpio"; |
| 134 | reg = <0x700 0x48>; |
| 135 | gpio-controller; |
| 136 | #gpio-cells = <2>; |
| 137 | }; |
| 138 | |
| 139 | gpioJ: gpio8@800 { |
| 140 | compatible = "microchip,pic32mzda-gpio"; |
| 141 | reg = <0x800 0x48>; |
| 142 | gpio-controller; |
| 143 | #gpio-cells = <2>; |
| 144 | }; |
| 145 | |
| 146 | gpioK: gpio9@900 { |
| 147 | compatible = "microchip,pic32mzda-gpio"; |
| 148 | reg = <0x900 0x48>; |
| 149 | gpio-controller; |
| 150 | #gpio-cells = <2>; |
| 151 | }; |
| 152 | }; |
Purna Chandra Mandal | c76eb72 | 2016-01-28 15:30:19 +0530 | [diff] [blame] | 153 | |
| 154 | sdhci: sdhci@1f8ec000 { |
| 155 | compatible = "microchip,pic32mzda-sdhci"; |
| 156 | reg = <0x1f8ec000 0x100>; |
| 157 | interrupts = <191 IRQ_TYPE_LEVEL_HIGH>; |
| 158 | clocks = <&clock REF4CLK>, <&clock PB5CLK>; |
| 159 | clock-names = "base_clk", "sys_clk"; |
| 160 | clock-freq-min-max = <25000000>,<25000000>; |
| 161 | bus-width = <4>; |
| 162 | status = "disabled"; |
| 163 | }; |
Purna Chandra Mandal | 7d514a7 | 2016-01-28 15:30:22 +0530 | [diff] [blame] | 164 | |
| 165 | ethernet: ethernet@1f882000 { |
| 166 | compatible = "microchip,pic32mzda-eth"; |
| 167 | reg = <0x1f882000 0x1000>; |
| 168 | interrupts = <153 IRQ_TYPE_LEVEL_HIGH>; |
| 169 | clocks = <&clock PB5CLK>; |
| 170 | status = "disabled"; |
| 171 | #address-cells = <1>; |
| 172 | #size-cells = <0>; |
| 173 | }; |
Purna Chandra Mandal | ac7eef7 | 2016-03-21 13:05:43 +0530 | [diff] [blame] | 174 | |
| 175 | usb: musb@1f8e3000 { |
| 176 | compatible = "microchip,pic32mzda-usb"; |
| 177 | reg = <0x1f8e3000 0x1000>, |
| 178 | <0x1f884000 0x1000>; |
| 179 | reg-names = "mc", "control"; |
| 180 | interrupts = <132 IRQ_TYPE_EDGE_RISING>, |
| 181 | <133 IRQ_TYPE_LEVEL_HIGH>; |
| 182 | clocks = <&clock PB5CLK>; |
| 183 | clock-names = "usb_clk"; |
| 184 | status = "disabled"; |
| 185 | }; |
Purna Chandra Mandal | be961fa | 2016-01-28 15:30:16 +0530 | [diff] [blame] | 186 | }; |