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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: Intel */
Bin Meng38ad43e2015-02-05 23:42:23 +08002/*
3 * Copyright (C) 2013, Intel Corporation
4 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
5 *
6 * Ported from Intel released Quark UEFI BIOS
7 * QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei
Bin Meng38ad43e2015-02-05 23:42:23 +08008 */
9
10#ifndef _HTE_H_
11#define _HTE_H_
12
13enum {
14 MRC_MEM_INIT,
15 MRC_MEM_TEST
16};
17
18enum {
19 READ_TRAIN,
20 WRITE_TRAIN
21};
22
23/*
24 * EXP_LOOP_CNT field of HTE_CMD_CTL
25 *
26 * This CANNOT be less than 4!
27 */
28#define HTE_LOOP_CNT 5
29
30/* random seed for victim */
Bin Meng312cc392015-03-10 18:31:20 +080031#define HTE_LFSR_VICTIM_SEED 0xf294ba21
Bin Meng38ad43e2015-02-05 23:42:23 +080032
33/* random seed for aggressor */
Bin Meng312cc392015-03-10 18:31:20 +080034#define HTE_LFSR_AGRESSOR_SEED 0xeba7492d
Bin Meng38ad43e2015-02-05 23:42:23 +080035
36u32 hte_mem_init(struct mrc_params *mrc_params, u8 flag);
37u16 hte_basic_write_read(struct mrc_params *mrc_params, u32 addr,
38 u8 first_run, u8 mode);
39u16 hte_write_stress_bit_lanes(struct mrc_params *mrc_params,
40 u32 addr, u8 first_run);
41void hte_mem_op(u32 addr, u8 first_run, u8 is_write);
42
43#endif /* _HTE_H_ */