blob: 875e5a1a8a8e307cbeadaddb9a514cc68caddeee [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ian Campbellcba69ee2014-05-05 11:52:26 +01002/*
3 * (C) Copyright 2007-2011
4 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
5 * Tom Cubie <tangliang@allwinnertech.com>
Ian Campbellcba69ee2014-05-05 11:52:26 +01006 */
7
8#include <common.h>
Simon Glass691d7192020-05-10 11:40:02 -06009#include <init.h>
Ian Campbellcba69ee2014-05-05 11:52:26 +010010#include <asm/io.h>
11#include <asm/arch/cpu.h>
Hans de Goede10191ed2014-11-15 22:55:53 +010012#include <asm/arch/clock.h>
Hans de Goede6944aff2015-10-03 15:18:33 +020013#include <axp_pmic.h>
Hans de Goede1871a8c2015-01-13 19:25:06 +010014#include <errno.h>
Hans de Goede10191ed2014-11-15 22:55:53 +010015
16#ifdef CONFIG_MACH_SUN6I
17int sunxi_get_ss_bonding_id(void)
18{
19 struct sunxi_ccm_reg * const ccm =
20 (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
21 static int bonding_id = -1;
22
23 if (bonding_id != -1)
24 return bonding_id;
25
26 /* Enable Security System */
27 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_SS);
28 setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_SS);
29
30 bonding_id = readl(SUNXI_SS_BASE);
31 bonding_id = (bonding_id >> 16) & 0x7;
32
33 /* Disable Security System again */
34 clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_SS);
35 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_SS);
36
37 return bonding_id;
38}
39#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +010040
Hans de Goedec74384c2016-03-24 22:38:23 +010041#ifdef CONFIG_MACH_SUN8I
42uint sunxi_get_sram_id(void)
43{
44 uint id;
45
46 /* Unlock sram info reg, read it, relock */
47 setbits_le32(SUNXI_SRAMC_BASE + 0x24, (1 << 15));
48 id = readl(SUNXI_SRAMC_BASE + 0x24) >> 16;
49 clrbits_le32(SUNXI_SRAMC_BASE + 0x24, (1 << 15));
50
51 return id;
52}
53#endif
54
Ian Campbellcba69ee2014-05-05 11:52:26 +010055#ifdef CONFIG_DISPLAY_CPUINFO
56int print_cpuinfo(void)
57{
Ian Campbelled41e622014-10-24 21:20:47 +010058#ifdef CONFIG_MACH_SUN4I
Hans de Goede745325a2014-06-09 11:36:57 +020059 puts("CPU: Allwinner A10 (SUN4I)\n");
Ian Campbelled41e622014-10-24 21:20:47 +010060#elif defined CONFIG_MACH_SUN5I
Hans de Goedef84269c2014-06-09 11:36:58 +020061 u32 val = readl(SUNXI_SID_BASE + 0x08);
62 switch ((val >> 12) & 0xf) {
63 case 0: puts("CPU: Allwinner A12 (SUN5I)\n"); break;
64 case 3: puts("CPU: Allwinner A13 (SUN5I)\n"); break;
65 case 7: puts("CPU: Allwinner A10s (SUN5I)\n"); break;
66 default: puts("CPU: Allwinner A1X (SUN5I)\n");
67 }
Ian Campbelled41e622014-10-24 21:20:47 +010068#elif defined CONFIG_MACH_SUN6I
Hans de Goede10191ed2014-11-15 22:55:53 +010069 switch (sunxi_get_ss_bonding_id()) {
70 case SUNXI_SS_BOND_ID_A31:
71 puts("CPU: Allwinner A31 (SUN6I)\n");
72 break;
73 case SUNXI_SS_BOND_ID_A31S:
74 puts("CPU: Allwinner A31s (SUN6I)\n");
75 break;
76 default:
77 printf("CPU: Allwinner A31? (SUN6I, id: %d)\n",
78 sunxi_get_ss_bonding_id());
79 }
Ian Campbelled41e622014-10-24 21:20:47 +010080#elif defined CONFIG_MACH_SUN7I
Ian Campbellcba69ee2014-05-05 11:52:26 +010081 puts("CPU: Allwinner A20 (SUN7I)\n");
Hans de Goede5e6bacd2015-04-06 20:55:39 +020082#elif defined CONFIG_MACH_SUN8I_A23
Hans de Goedec74384c2016-03-24 22:38:23 +010083 printf("CPU: Allwinner A23 (SUN8I %04x)\n", sunxi_get_sram_id());
Vishnu Patekar8c3dacf2015-03-01 23:47:48 +053084#elif defined CONFIG_MACH_SUN8I_A33
Hans de Goedec74384c2016-03-24 22:38:23 +010085 printf("CPU: Allwinner A33 (SUN8I %04x)\n", sunxi_get_sram_id());
86#elif defined CONFIG_MACH_SUN8I_A83T
87 printf("CPU: Allwinner A83T (SUN8I %04x)\n", sunxi_get_sram_id());
Jens Kuske1c27b7d2015-11-17 15:12:58 +010088#elif defined CONFIG_MACH_SUN8I_H3
Hans de Goedec74384c2016-03-24 22:38:23 +010089 printf("CPU: Allwinner H3 (SUN8I %04x)\n", sunxi_get_sram_id());
Chen-Yu Tsai379feba2016-11-30 14:57:32 +080090#elif defined CONFIG_MACH_SUN8I_R40
91 printf("CPU: Allwinner R40 (SUN8I %04x)\n", sunxi_get_sram_id());
Icenowy Zhengc1994892017-04-08 15:30:12 +080092#elif defined CONFIG_MACH_SUN8I_V3S
93 printf("CPU: Allwinner V3s (SUN8I %04x)\n", sunxi_get_sram_id());
Hans de Goede1871a8c2015-01-13 19:25:06 +010094#elif defined CONFIG_MACH_SUN9I
95 puts("CPU: Allwinner A80 (SUN9I)\n");
Siarhei Siamashkad96ebc42016-03-29 17:29:10 +020096#elif defined CONFIG_MACH_SUN50I
97 puts("CPU: Allwinner A64 (SUN50I)\n");
Andre Przywara997bde62017-02-16 01:20:28 +000098#elif defined CONFIG_MACH_SUN50I_H5
99 puts("CPU: Allwinner H5 (SUN50I)\n");
Icenowy Zheng6f796a92018-07-21 16:20:31 +0800100#elif defined CONFIG_MACH_SUN50I_H6
101 puts("CPU: Allwinner H6 (SUN50I)\n");
Hans de Goede745325a2014-06-09 11:36:57 +0200102#else
103#warning Please update cpu_info.c with correct CPU information
104 puts("CPU: SUNXI Family\n");
105#endif
Ian Campbellcba69ee2014-05-05 11:52:26 +0100106 return 0;
107}
108#endif
Hans de Goedecac5b1c2014-11-26 00:04:24 +0100109
Icenowy Zheng65d2d4f2016-12-20 02:03:36 +0800110#ifdef CONFIG_MACH_SUN8I_H3
111
112#define SIDC_PRCTL 0x40
113#define SIDC_RDKEY 0x60
114
115#define SIDC_OP_LOCK 0xAC
116
117uint32_t sun8i_efuse_read(uint32_t offset)
118{
119 uint32_t reg_val;
120
121 reg_val = readl(SUNXI_SIDC_BASE + SIDC_PRCTL);
122 reg_val &= ~(((0x1ff) << 16) | 0x3);
123 reg_val |= (offset << 16);
124 writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);
125
126 reg_val &= ~(((0xff) << 8) | 0x3);
127 reg_val |= (SIDC_OP_LOCK << 8) | 0x2;
128 writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);
129
130 while (readl(SUNXI_SIDC_BASE + SIDC_PRCTL) & 0x2);
131
132 reg_val &= ~(((0x1ff) << 16) | ((0xff) << 8) | 0x3);
133 writel(reg_val, SUNXI_SIDC_BASE + SIDC_PRCTL);
134
135 reg_val = readl(SUNXI_SIDC_BASE + SIDC_RDKEY);
136 return reg_val;
137}
138#endif
139
Hans de Goedecac5b1c2014-11-26 00:04:24 +0100140int sunxi_get_sid(unsigned int *sid)
141{
Hans de Goedecac5b1c2014-11-26 00:04:24 +0100142#ifdef CONFIG_AXP221_POWER
Hans de Goede6944aff2015-10-03 15:18:33 +0200143 return axp_get_sid(sid);
Icenowy Zheng65d2d4f2016-12-20 02:03:36 +0800144#elif defined CONFIG_MACH_SUN8I_H3
145 /*
146 * H3 SID controller has a bug, which makes the initial value of
147 * SUNXI_SID_BASE at boot wrong.
148 * Read the value directly from SID controller, in order to get
149 * the correct value, and also refresh the wrong value at
150 * SUNXI_SID_BASE.
151 */
152 int i;
153
154 for (i = 0; i< 4; i++)
155 sid[i] = sun8i_efuse_read(i * 4);
156
157 return 0;
Hans de Goede813598e2015-05-19 23:34:00 +0200158#elif defined SUNXI_SID_BASE
Hans de Goedecac5b1c2014-11-26 00:04:24 +0100159 int i;
160
161 for (i = 0; i< 4; i++)
Alexander Graf0ea5a042016-03-29 17:29:09 +0200162 sid[i] = readl((ulong)SUNXI_SID_BASE + 4 * i);
Hans de Goedecac5b1c2014-11-26 00:04:24 +0100163
164 return 0;
Hans de Goede813598e2015-05-19 23:34:00 +0200165#else
166 return -ENODEV;
Hans de Goedecac5b1c2014-11-26 00:04:24 +0100167#endif
168}