Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
| 4 | * Copyright (C) 2012 Renesas Solutions Corp. |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __KZM9G_H |
| 8 | #define __KZM9G_H |
| 9 | |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 10 | #define CONFIG_SH73A0 |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 11 | |
| 12 | #include <asm/arch/rmobile.h> |
| 13 | |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 14 | /* MEMORY */ |
| 15 | #define KZM_SDRAM_BASE (0x40000000) |
| 16 | #define PHYS_SDRAM KZM_SDRAM_BASE |
| 17 | #define PHYS_SDRAM_SIZE (512 * 1024 * 1024) |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 18 | |
| 19 | /* NOR Flash */ |
| 20 | #define KZM_FLASH_BASE (0x00000000) |
| 21 | #define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE) |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 22 | |
| 23 | /* prompt */ |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 24 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } |
| 25 | |
| 26 | /* SCIF */ |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 27 | |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 28 | #undef CONFIG_SYS_LOADS_BAUD_CHANGE |
| 29 | |
| 30 | #define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */ |
| 31 | #define CONFIG_SYS_INIT_RAM_SIZE (0x10000) |
| 32 | #define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4) |
Tetsuyuki Kobayashi | 9415cf9 | 2012-07-05 01:43:44 +0000 | [diff] [blame] | 33 | #define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024) |
| 34 | #define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT) |
| 35 | #define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT) |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 36 | |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 37 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
| 38 | |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 39 | #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000 |
| 40 | |
| 41 | /* FLASH */ |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 42 | #undef CONFIG_SYS_FLASH_QUIET_TEST |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 43 | #define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */ |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 44 | |
| 45 | /* Timeout for Flash erase operations (in ms) */ |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 46 | /* Timeout for Flash write operations (in ms) */ |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 47 | /* Timeout for Flash set sector lock bit operations (in ms) */ |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 48 | /* Timeout for Flash clear lock bit operations (in ms) */ |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 49 | |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 50 | /* GPIO / PFC */ |
| 51 | #define CONFIG_SH_GPIO_PFC |
| 52 | |
| 53 | /* Clock */ |
Nobuhiro Iwamatsu | eae6c8a | 2012-08-03 13:56:52 +0900 | [diff] [blame] | 54 | #define CONFIG_GLOBAL_TIMER |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 55 | #define CONFIG_SYS_CPU_CLK (1196000000) |
| 56 | #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 57 | |
Nobuhiro Iwamatsu | 8d811ca | 2012-06-21 14:55:07 +0900 | [diff] [blame] | 58 | #endif /* __KZM9G_H */ |