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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 1dd181ff2b3009405d12ad0b3782176490da2446 / . / include / configs / 3c120_devboard.h
blob: e64f6d8503fc39c982577d7a1b46f632146ec5e4 [file] [log] [blame]
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]1/*
2 * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
3 * Scott McNutt <smcnutt@psyent.com>
4 * (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw>
5 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +0200[diff] [blame]6 * SPDX-License-Identifier: GPL-2.0+
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/*
13 * BOARD/CPU
14 */
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]15
16/*
17 * SERIAL
18 */
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]19
20/*
Thomas Chou6168dc62015-10-23 14:55:36 +0800[diff] [blame]21 * CFI Flash
22 */
Thomas Chou6168dc62015-10-23 14:55:36 +0800[diff] [blame]23#define CONFIG_FLASH_CFI_DRIVER
24#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */
25#define CONFIG_SYS_FLASH_CFI
26#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
27#define CONFIG_SYS_FLASH_PROTECTION
Thomas Chouaf54c182015-10-28 15:10:39 +0800[diff] [blame]28#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
Thomas Chou6168dc62015-10-23 14:55:36 +0800[diff] [blame]29#define CONFIG_SYS_MAX_FLASH_SECT 512
30
31/*
Thomas Chouc3c44952015-11-05 16:37:33 +0800[diff] [blame]32 * NET options
Thomas Chou96fa1e42015-10-22 15:29:11 +0800[diff] [blame]33 */
Thomas Chouc3c44952015-11-05 16:37:33 +0800[diff] [blame]34#define CONFIG_SYS_RX_ETH_BUFFER 0
Thomas Choue07eee32015-10-29 16:43:46 +0800[diff] [blame]35#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
36#define CONFIG_PHY_MARVELL
Thomas Chou96fa1e42015-10-22 15:29:11 +0800[diff] [blame]37
38/*
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]39 * BOOTP options
40 */
41#define CONFIG_BOOTP_BOOTFILESIZE
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]42
43/*
Thomas Chouca1d80c2015-08-26 21:24:35 +0800[diff] [blame]44 * FDT options
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]45 */
Thomas Chou857b9cb2014-08-30 17:45:23 +0800[diff] [blame]46#define CONFIG_LMB
47
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]48/*
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]49 * MEMORY ORGANIZATION
Thomas Chou7dfb0602012-04-23 10:55:02 +0800[diff] [blame]50 * -Monitor at top of sdram.
51 * -The heap is placed below the monitor
52 * -The stack is placed below the heap (&grows down).
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]53 */
Thomas Chou6168dc62015-10-23 14:55:36 +0800[diff] [blame]54#define CONFIG_SYS_SDRAM_BASE 0xD0000000
55#define CONFIG_SYS_SDRAM_SIZE 0x08000000
Thomas Chou744b57b2015-10-27 10:21:06 +0800[diff] [blame]56#define CONFIG_NR_DRAM_BANKS 1
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]57#define CONFIG_MONITOR_IS_IN_RAM
Marek Vasut7ef051e2015-12-15 03:09:23 +0100[diff] [blame]58#define CONFIG_SYS_MONITOR_LEN 0x80000 /* Reserve 512k */
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]59#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \
60 CONFIG_SYS_SDRAM_SIZE - \
61 CONFIG_SYS_MONITOR_LEN)
Thomas Chou2925e2b2015-11-04 13:28:29 +0800[diff] [blame]62#define CONFIG_SYS_MALLOC_LEN 0x20000
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]63
64/*
Marek Vasut2aee06a2015-12-15 03:09:22 +0100[diff] [blame]65 * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
66 * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the
67 * reset address, no? This will keep the environment in user region
68 * of flash. NOTE: the monitor length must be multiple of sector size
69 * (which is common practice).
70 */
Marek Vasut2aee06a2015-12-15 03:09:22 +0100[diff] [blame]71
72#define CONFIG_ENV_SIZE 0x20000 /* 128k, 1 sector */
73#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
74#define CONFIG_ENV_ADDR (0xe2800000 + CONFIG_SYS_MONITOR_LEN)
75
76/*
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]77 * MISC
78 */
Marek Vasutbc3abe12015-12-15 03:09:24 +0100[diff] [blame]79#define CONFIG_SYS_LOAD_ADDR 0xd4000000 /* Half of RAM */
80#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]81#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
Thomas Chou540bb542015-11-04 13:25:20 +0800[diff] [blame]82#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MONITOR_BASE - \
83 CONFIG_ENV_SIZE - \
84 CONFIG_SYS_MALLOC_LEN - \
85 0x10000)
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]86
Thomas Chou8cbb0dd2010-04-21 08:40:59 +0800[diff] [blame]87#endif /* __CONFIG_H */