blob: 8aa47a2583b2985276ae7f3685237b2afdac0f6e [file] [log] [blame]
William Zhangadb34dd2022-08-01 11:39:22 -07001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2022 Broadcom Ltd.
4 */
5
6#include <dt-bindings/interrupt-controller/arm-gic.h>
7#include <dt-bindings/interrupt-controller/irq.h>
8
9/ {
10 compatible = "brcm,bcm6846", "brcm,bcmbca";
11 #address-cells = <1>;
12 #size-cells = <1>;
13
14 interrupt-parent = <&gic>;
15
16 cpus {
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 CA7_0: cpu@0 {
21 device_type = "cpu";
22 compatible = "arm,cortex-a7";
23 reg = <0x0>;
24 next-level-cache = <&L2_0>;
25 enable-method = "psci";
26 };
27
28 CA7_1: cpu@1 {
29 device_type = "cpu";
30 compatible = "arm,cortex-a7";
31 reg = <0x1>;
32 next-level-cache = <&L2_0>;
33 enable-method = "psci";
34 };
35
36 L2_0: l2-cache0 {
37 compatible = "cache";
38 };
39 };
40
41 timer {
42 compatible = "arm,armv7-timer";
43 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
44 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
45 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
46 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
47 arm,cpu-registers-not-fw-configured;
48 };
49
50 pmu: pmu {
51 compatible = "arm,cortex-a7-pmu";
52 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
53 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
54 interrupt-affinity = <&CA7_0>, <&CA7_1>;
55 };
56
57 clocks: clocks {
58 periph_clk: periph-clk {
59 compatible = "fixed-clock";
60 #clock-cells = <0>;
61 clock-frequency = <200000000>;
62 };
63 };
64
65 psci {
66 compatible = "arm,psci-0.2";
67 method = "smc";
68 };
69
70 axi@81000000 {
71 compatible = "simple-bus";
72 #address-cells = <1>;
73 #size-cells = <1>;
74 ranges = <0 0x81000000 0x8000>;
75
76 gic: interrupt-controller@1000 {
77 compatible = "arm,cortex-a7-gic";
78 #interrupt-cells = <3>;
79 interrupt-controller;
80 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
81 reg = <0x1000 0x1000>,
82 <0x2000 0x2000>,
83 <0x4000 0x2000>,
84 <0x6000 0x2000>;
85 };
86 };
87
88 bus@ff800000 {
89 compatible = "simple-bus";
90 #address-cells = <1>;
91 #size-cells = <1>;
92 ranges = <0 0xff800000 0x800000>;
93
94 uart0: serial@640 {
95 compatible = "brcm,bcm6345-uart";
96 reg = <0x640 0x1b>;
97 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
98 clocks = <&periph_clk>;
99 clock-names = "refclk";
100 status = "disabled";
101 };
102 };
103};