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Michal Simek051a8ad2018-03-27 13:43:05 +02001// SPDX-License-Identifier: GPL-2.0+
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +05302/*
3 * Xilinx ZC770 XM013 board DTS
4 *
5 * Copyright (C) 2013 Xilinx, Inc.
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +05306 */
7/dts-v1/;
8#include "zynq-7000.dtsi"
9
10/ {
Luis Araneda9896dc62018-07-12 00:10:20 -040011 model = "Xilinx ZC770 XM013 board";
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +053012 compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090013
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090014 aliases {
Michal Simek5c45b162015-07-22 11:36:32 +020015 ethernet0 = &gem1;
16 i2c0 = &i2c1;
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090017 serial0 = &uart0;
Michal Simek74720dc2016-04-07 13:08:35 +020018 spi0 = &qspi;
19 spi1 = &spi0;
Masahiro Yamada9f9d41b2014-05-15 20:37:55 +090020 };
21
Michal Simek5c45b162015-07-22 11:36:32 +020022 chosen {
Michal Simek936bbc52016-04-07 11:15:00 +020023 bootargs = "";
Michal Simek46919412016-01-12 13:56:44 +010024 stdout-path = "serial0:115200n8";
Masahiro Yamada7d34c5d2014-05-15 20:37:54 +090025 };
Michal Simek5c45b162015-07-22 11:36:32 +020026
Michal Simekcc7978b2016-11-11 13:11:37 +010027 memory@0 {
Michal Simek5c45b162015-07-22 11:36:32 +020028 device_type = "memory";
29 reg = <0x0 0x40000000>;
30 };
31};
32
Michal Simek5c45b162015-07-22 11:36:32 +020033&can1 {
34 status = "okay";
35};
36
37&gem1 {
38 status = "okay";
39 phy-mode = "rgmii-id";
40 phy-handle = <&ethernet_phy>;
41
42 ethernet_phy: ethernet-phy@7 {
43 reg = <7>;
Sai Pavan Boddu5fad1ab2017-03-06 18:17:19 +053044 device_type = "ethernet-phy";
Michal Simek5c45b162015-07-22 11:36:32 +020045 };
46};
47
48&i2c1 {
49 status = "okay";
50 clock-frequency = <400000>;
51
52 si570: clock-generator@55 {
53 #clock-cells = <0>;
54 compatible = "silabs,si570";
55 temperature-stability = <50>;
56 reg = <0x55>;
57 factory-fout = <156250000>;
58 clock-frequency = <148500000>;
59 };
60};
61
Michal Simek74720dc2016-04-07 13:08:35 +020062&qspi {
63 status = "okay";
64};
65
Michal Simek7ebf67a2016-01-14 13:09:16 +010066&spi0 {
67 status = "okay";
68 num-cs = <4>;
69 is-decoded-cs = <0>;
Michal Simekd4fb2d12019-09-26 12:53:09 +020070 eeprom: eeprom@2 {
Michal Simek7ebf67a2016-01-14 13:09:16 +010071 at25,byte-len = <8192>;
72 at25,addr-mode = <2>;
73 at25,page-size = <32>;
74
75 compatible = "atmel,at25";
76 reg = <2>;
77 spi-max-frequency = <1000000>;
78 };
79};
80
Michal Simek5c45b162015-07-22 11:36:32 +020081&uart0 {
Simon Glass035c6b22015-10-17 19:41:24 -060082 u-boot,dm-pre-reloc;
Michal Simek5c45b162015-07-22 11:36:32 +020083 status = "okay";
Jagannadha Sutradharudu Teki9e0802b2014-01-09 01:48:29 +053084};