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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Felipe Balbi8f8a12d2017-07-05 20:33:20 +03002/*
3 * Copyright (c) 2017 Intel Corporation
Felipe Balbi8f8a12d2017-07-05 20:33:20 +03004 */
5#include <common.h>
Andy Shevchenkoc974a3d2019-06-21 13:28:08 +03006#include <dm.h>
7#include <wdt.h>
8#include <div64.h>
Felipe Balbi8f8a12d2017-07-05 20:33:20 +03009#include <asm/scu.h>
10
11/* Hardware timeout in seconds */
12#define WDT_PRETIMEOUT 15
13#define WDT_TIMEOUT_MIN (1 + WDT_PRETIMEOUT)
14#define WDT_TIMEOUT_MAX 170
Andy Shevchenko8b295a22019-06-21 13:28:07 +030015
16/*
17 * Note, firmware chooses 90 seconds as a default timeout for watchdog on
18 * Intel Tangier SoC. It means that without handling it in the running code
19 * the reboot will happen.
20 */
Felipe Balbi8f8a12d2017-07-05 20:33:20 +030021
Felipe Balbi8f8a12d2017-07-05 20:33:20 +030022enum {
23 SCU_WATCHDOG_START = 0,
24 SCU_WATCHDOG_STOP = 1,
25 SCU_WATCHDOG_KEEPALIVE = 2,
26 SCU_WATCHDOG_SET_ACTION_ON_TIMEOUT = 3,
27};
28
Andy Shevchenkoc974a3d2019-06-21 13:28:08 +030029static int tangier_wdt_reset(struct udevice *dev)
Felipe Balbi8f8a12d2017-07-05 20:33:20 +030030{
Andy Shevchenkoc974a3d2019-06-21 13:28:08 +030031 scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_KEEPALIVE);
32 return 0;
Felipe Balbi8f8a12d2017-07-05 20:33:20 +030033}
34
Andy Shevchenkoc974a3d2019-06-21 13:28:08 +030035static int tangier_wdt_stop(struct udevice *dev)
Felipe Balbi8f8a12d2017-07-05 20:33:20 +030036{
37 return scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_STOP);
38}
39
Andy Shevchenkoc974a3d2019-06-21 13:28:08 +030040static int tangier_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
Felipe Balbi8f8a12d2017-07-05 20:33:20 +030041{
Andy Shevchenkoc974a3d2019-06-21 13:28:08 +030042 u32 timeout_sec;
Felipe Balbi8f8a12d2017-07-05 20:33:20 +030043 int in_size;
44 struct ipc_wd_start {
45 u32 pretimeout;
46 u32 timeout;
Andy Shevchenkoc974a3d2019-06-21 13:28:08 +030047 } ipc_wd_start;
48
49 /* Calculate timeout in seconds and restrict to min and max value */
50 do_div(timeout_ms, 1000);
51 timeout_sec = clamp_t(u32, timeout_ms, WDT_TIMEOUT_MIN, WDT_TIMEOUT_MAX);
52
53 /* Update values in the IPC request */
54 ipc_wd_start.pretimeout = timeout_sec - WDT_PRETIMEOUT;
55 ipc_wd_start.timeout = timeout_sec;
Felipe Balbi8f8a12d2017-07-05 20:33:20 +030056
57 /*
58 * SCU expects the input size for watchdog IPC
59 * to be based on 4 bytes
60 */
61 in_size = DIV_ROUND_UP(sizeof(ipc_wd_start), 4);
62
63 scu_ipc_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_START,
64 (u32 *)&ipc_wd_start, in_size, NULL, 0);
Andy Shevchenkoc974a3d2019-06-21 13:28:08 +030065
66 return 0;
Felipe Balbi8f8a12d2017-07-05 20:33:20 +030067}
Andy Shevchenkoc974a3d2019-06-21 13:28:08 +030068
69static const struct wdt_ops tangier_wdt_ops = {
70 .reset = tangier_wdt_reset,
71 .start = tangier_wdt_start,
72 .stop = tangier_wdt_stop,
73};
74
75static const struct udevice_id tangier_wdt_ids[] = {
76 { .compatible = "intel,tangier-wdt" },
77 { /* sentinel */ }
78};
79
80static int tangier_wdt_probe(struct udevice *dev)
81{
82 debug("%s: Probing wdt%u\n", __func__, dev->seq);
83 return 0;
84}
85
86U_BOOT_DRIVER(wdt_tangier) = {
87 .name = "wdt_tangier",
88 .id = UCLASS_WDT,
89 .of_match = tangier_wdt_ids,
90 .ops = &tangier_wdt_ops,
91 .probe = tangier_wdt_probe,
92};