blob: db80517e53d1debf4bd12632a662a99026ebbee8 [file] [log] [blame]
Alessandro Rubini3e446cb2009-12-05 13:39:31 +01001/*
2 * Register definitions for the AMBA CLCD logic cell.
3 *
4 * derived from David A Rusling, although rearranged as a C structure
5 * linux/include/asm-arm/hardware/amba_clcd.h -- Integrator LCD panel.
6 *
7 * Copyright (C) 2001 ARM Limited
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file COPYING in the main directory of this archive
11 * for more details.
12 */
13
14/*
15 * CLCD Controller Internal Register addresses
16 */
17struct clcd_registers {
18 u32 tim0; /* 0x00 */
19 u32 tim1;
20 u32 tim2;
21 u32 tim3;
22 u32 ubas; /* 0x10 */
23 u32 lbas;
24#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW)
25 u32 ienb;
26 u32 cntl;
27#else /* Someone rearranged these two registers on the Versatile */
28 u32 cntl;
29 u32 ienb;
30#endif
31 u32 stat; /* 0x20 */
32 u32 intr;
33 u32 ucur;
34 u32 lcur;
35 u32 unused[0x74]; /* 0x030..0x1ff */
36 u32 palette[0x80]; /* 0x200..0x3ff */
37};
38
39/* Bit definition for TIM2 */
40#define TIM2_CLKSEL (1 << 5)
41#define TIM2_IVS (1 << 11)
42#define TIM2_IHS (1 << 12)
43#define TIM2_IPC (1 << 13)
44#define TIM2_IOE (1 << 14)
45#define TIM2_BCD (1 << 26)
46
47/* Bit definitions for control register */
48#define CNTL_LCDEN (1 << 0)
49#define CNTL_LCDBPP1 (0 << 1)
50#define CNTL_LCDBPP2 (1 << 1)
51#define CNTL_LCDBPP4 (2 << 1)
52#define CNTL_LCDBPP8 (3 << 1)
53#define CNTL_LCDBPP16 (4 << 1)
54#define CNTL_LCDBPP16_565 (6 << 1)
55#define CNTL_LCDBPP24 (5 << 1)
56#define CNTL_LCDBW (1 << 4)
57#define CNTL_LCDTFT (1 << 5)
58#define CNTL_LCDMONO8 (1 << 6)
59#define CNTL_LCDDUAL (1 << 7)
60#define CNTL_BGR (1 << 8)
61#define CNTL_BEBO (1 << 9)
62#define CNTL_BEPO (1 << 10)
63#define CNTL_LCDPWR (1 << 11)
64#define CNTL_LCDVCOMP(x) ((x) << 12)
65#define CNTL_LDMAFIFOTIME (1 << 15)
66#define CNTL_WATERMARK (1 << 16)
67
68/* u-boot specific: information passed by the board file */
69struct clcd_config {
70 struct clcd_registers *address;
71 u32 tim0;
72 u32 tim1;
73 u32 tim2;
74 u32 tim3;
75 u32 cntl;
76 unsigned long pixclock;
77};