blob: 7bcd713a862627e6c43372de6121df8115d6abab [file] [log] [blame]
Marek Vasut19953732020-01-24 18:39:16 +01001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4 */
5
6#include <common.h>
7#include <adc.h>
8#include <asm/arch/stm32.h>
9#include <asm/arch/sys_proto.h>
10#include <asm/gpio.h>
11#include <asm/io.h>
12#include <bootm.h>
13#include <clk.h>
14#include <config.h>
15#include <dm.h>
16#include <dm/device.h>
17#include <dm/uclass.h>
18#include <env.h>
19#include <env_internal.h>
20#include <g_dnl.h>
21#include <generic-phy.h>
22#include <hang.h>
23#include <i2c.h>
24#include <i2c_eeprom.h>
25#include <init.h>
26#include <led.h>
27#include <memalign.h>
28#include <misc.h>
29#include <mtd.h>
30#include <mtd_node.h>
31#include <netdev.h>
32#include <phy.h>
33#include <power/regulator.h>
34#include <remoteproc.h>
35#include <reset.h>
36#include <syscon.h>
37#include <usb.h>
38#include <usb/dwc2_udc.h>
39#include <watchdog.h>
40
41/* SYSCFG registers */
42#define SYSCFG_BOOTR 0x00
43#define SYSCFG_PMCSETR 0x04
44#define SYSCFG_IOCTRLSETR 0x18
45#define SYSCFG_ICNR 0x1C
46#define SYSCFG_CMPCR 0x20
47#define SYSCFG_CMPENSETR 0x24
48#define SYSCFG_PMCCLRR 0x44
49
50#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
51#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
52
53#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
54#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
55#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
56#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
57#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
58
59#define SYSCFG_CMPCR_SW_CTRL BIT(1)
60#define SYSCFG_CMPCR_READY BIT(8)
61
62#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
63
64#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
65#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
66
67#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
68
69#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
70#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
71#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
72#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
73
74/*
75 * Get a global data pointer
76 */
77DECLARE_GLOBAL_DATA_PTR;
78
79int setup_mac_address(void)
80{
Marek Vasut19953732020-01-24 18:39:16 +010081 unsigned char enetaddr[6];
Marek Vasutf19312e2020-03-31 19:51:29 +020082 struct udevice *dev;
83 int off, ret;
Marek Vasut19953732020-01-24 18:39:16 +010084
85 ret = eth_env_get_enetaddr("ethaddr", enetaddr);
86 if (ret) /* ethaddr is already set */
87 return 0;
88
Marek Vasutf19312e2020-03-31 19:51:29 +020089 off = fdt_path_offset(gd->fdt_blob, "eeprom0");
90 if (off < 0) {
91 printf("%s: No eeprom0 path offset\n", __func__);
92 return off;
Marek Vasut19953732020-01-24 18:39:16 +010093 }
94
Marek Vasutf19312e2020-03-31 19:51:29 +020095 ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev);
Marek Vasut19953732020-01-24 18:39:16 +010096 if (ret) {
97 printf("Cannot find EEPROM!\n");
98 return ret;
99 }
100
101 ret = i2c_eeprom_read(dev, 0xfa, enetaddr, 0x6);
102 if (ret) {
103 printf("Error reading configuration EEPROM!\n");
104 return ret;
105 }
106
107 if (is_valid_ethaddr(enetaddr))
108 eth_env_set_enetaddr("ethaddr", enetaddr);
109
110 return 0;
111}
112
113int checkboard(void)
114{
115 char *mode;
116 const char *fdt_compat;
117 int fdt_compat_len;
118
119 if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
120 mode = "trusted with OP-TEE";
121 else if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
122 mode = "trusted";
123 else
124 mode = "basic";
125
126 printf("Board: stm32mp1 in %s mode", mode);
127 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
128 &fdt_compat_len);
129 if (fdt_compat && fdt_compat_len)
130 printf(" (%s)", fdt_compat);
131 puts("\n");
132
133 return 0;
134}
135
136static void board_key_check(void)
137{
138#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
139 ofnode node;
140 struct gpio_desc gpio;
141 enum forced_boot_mode boot_mode = BOOT_NORMAL;
142
143 node = ofnode_path("/config");
144 if (!ofnode_valid(node)) {
145 debug("%s: no /config node?\n", __func__);
146 return;
147 }
148#ifdef CONFIG_FASTBOOT
149 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
150 &gpio, GPIOD_IS_IN)) {
151 debug("%s: could not find a /config/st,fastboot-gpios\n",
152 __func__);
153 } else {
154 if (dm_gpio_get_value(&gpio)) {
155 puts("Fastboot key pressed, ");
156 boot_mode = BOOT_FASTBOOT;
157 }
158
159 dm_gpio_free(NULL, &gpio);
160 }
161#endif
162#ifdef CONFIG_CMD_STM32PROG
163 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
164 &gpio, GPIOD_IS_IN)) {
165 debug("%s: could not find a /config/st,stm32prog-gpios\n",
166 __func__);
167 } else {
168 if (dm_gpio_get_value(&gpio)) {
169 puts("STM32Programmer key pressed, ");
170 boot_mode = BOOT_STM32PROG;
171 }
172 dm_gpio_free(NULL, &gpio);
173 }
174#endif
175
176 if (boot_mode != BOOT_NORMAL) {
177 puts("entering download mode...\n");
178 clrsetbits_le32(TAMP_BOOT_CONTEXT,
179 TAMP_BOOT_FORCED_MASK,
180 boot_mode);
181 }
182#endif
183}
184
185#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
186
187#include <usb/dwc2_udc.h>
188int g_dnl_board_usb_cable_connected(void)
189{
190 struct udevice *dwc2_udc_otg;
191 int ret;
192
193 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
194 DM_GET_DRIVER(dwc2_udc_otg),
195 &dwc2_udc_otg);
196 if (!ret)
197 debug("dwc2_udc_otg init failed\n");
198
199 return dwc2_udc_B_session_valid(dwc2_udc_otg);
200}
201
202#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
203#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
204
205int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
206{
207 if (!strcmp(name, "usb_dnl_dfu"))
208 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
209 else if (!strcmp(name, "usb_dnl_fastboot"))
210 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
211 &dev->idProduct);
212 else
213 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
214
215 return 0;
216}
217
218#endif /* CONFIG_USB_GADGET */
219
220#ifdef CONFIG_LED
221static int get_led(struct udevice **dev, char *led_string)
222{
223 char *led_name;
224 int ret;
225
226 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
227 if (!led_name) {
228 pr_debug("%s: could not find %s config string\n",
229 __func__, led_string);
230 return -ENOENT;
231 }
232 ret = led_get_by_label(led_name, dev);
233 if (ret) {
234 debug("%s: get=%d\n", __func__, ret);
235 return ret;
236 }
237
238 return 0;
239}
240
241static int setup_led(enum led_state_t cmd)
242{
243 struct udevice *dev;
244 int ret;
245
246 ret = get_led(&dev, "u-boot,boot-led");
247 if (ret)
248 return ret;
249
250 ret = led_set_state(dev, cmd);
251 return ret;
252}
253#endif
254
255static void __maybe_unused led_error_blink(u32 nb_blink)
256{
257#ifdef CONFIG_LED
258 int ret;
259 struct udevice *led;
260 u32 i;
261#endif
262
263 if (!nb_blink)
264 return;
265
266#ifdef CONFIG_LED
267 ret = get_led(&led, "u-boot,error-led");
268 if (!ret) {
269 /* make u-boot,error-led blinking */
270 /* if U32_MAX and 125ms interval, for 17.02 years */
271 for (i = 0; i < 2 * nb_blink; i++) {
272 led_set_state(led, LEDST_TOGGLE);
273 mdelay(125);
274 WATCHDOG_RESET();
275 }
276 }
277#endif
278
279 /* infinite: the boot process must be stopped */
280 if (nb_blink == U32_MAX)
281 hang();
282}
283
284static void sysconf_init(void)
285{
286#ifndef CONFIG_STM32MP1_TRUSTED
287 u8 *syscfg;
288#ifdef CONFIG_DM_REGULATOR
289 struct udevice *pwr_dev;
290 struct udevice *pwr_reg;
291 struct udevice *dev;
292 int ret;
293 u32 otp = 0;
294#endif
295 u32 bootr;
296
297 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
298
299 /* interconnect update : select master using the port 1 */
300 /* LTDC = AXI_M9 */
301 /* GPU = AXI_M8 */
302 /* today information is hardcoded in U-Boot */
303 writel(BIT(9), syscfg + SYSCFG_ICNR);
304
305 /* disable Pull-Down for boot pin connected to VDD */
306 bootr = readl(syscfg + SYSCFG_BOOTR);
307 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
308 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
309 writel(bootr, syscfg + SYSCFG_BOOTR);
310
311#ifdef CONFIG_DM_REGULATOR
312 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
313 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
314 * The customer will have to disable this for low frequencies
315 * or if AFMUX is selected but the function not used, typically for
316 * TRACE. Otherwise, impact on power consumption.
317 *
318 * WARNING:
319 * enabling High Speed mode while VDD>2.7V
320 * with the OTP product_below_2v5 (OTP 18, BIT 13)
321 * erroneously set to 1 can damage the IC!
322 * => U-Boot set the register only if VDD < 2.7V (in DT)
323 * but this value need to be consistent with board design
324 */
325 ret = uclass_get_device_by_driver(UCLASS_PMIC,
326 DM_GET_DRIVER(stm32mp_pwr_pmic),
327 &pwr_dev);
328 if (!ret) {
329 ret = uclass_get_device_by_driver(UCLASS_MISC,
330 DM_GET_DRIVER(stm32mp_bsec),
331 &dev);
332 if (ret) {
333 pr_err("Can't find stm32mp_bsec driver\n");
334 return;
335 }
336
337 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
338 if (ret > 0)
339 otp = otp & BIT(13);
340
341 /* get VDD = vdd-supply */
342 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
343 &pwr_reg);
344
345 /* check if VDD is Low Voltage */
346 if (!ret) {
347 if (regulator_get_value(pwr_reg) < 2700000) {
348 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
349 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
350 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
351 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
352 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
353 syscfg + SYSCFG_IOCTRLSETR);
354
355 if (!otp)
356 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
357 } else {
358 if (otp)
359 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
360 }
361 } else {
362 debug("VDD unknown");
363 }
364 }
365#endif
366
367 /* activate automatic I/O compensation
368 * warning: need to ensure CSI enabled and ready in clock driver
369 */
370 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
371
372 while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
373 ;
374 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
375#endif
376}
377
378/* board dependent setup after realloc */
379int board_init(void)
380{
381 struct udevice *dev;
382
383 /* address of boot parameters */
384 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
385
386 /* probe all PINCTRL for hog */
387 for (uclass_first_device(UCLASS_PINCTRL, &dev);
388 dev;
389 uclass_next_device(&dev)) {
390 pr_debug("probe pincontrol = %s\n", dev->name);
391 }
392
393 board_key_check();
394
395#ifdef CONFIG_DM_REGULATOR
396 regulators_enable_boot_on(_DEBUG);
397#endif
398
399 sysconf_init();
400
401 if (CONFIG_IS_ENABLED(CONFIG_LED))
402 led_default_state();
403
404 return 0;
405}
406
407int board_late_init(void)
408{
409 char *boot_device;
410#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
411 const void *fdt_compat;
412 int fdt_compat_len;
413
414 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
415 &fdt_compat_len);
416 if (fdt_compat && fdt_compat_len) {
417 if (strncmp(fdt_compat, "st,", 3) != 0)
418 env_set("board_name", fdt_compat);
419 else
420 env_set("board_name", fdt_compat + 3);
421 }
422#endif
423
424 /* Check the boot-source to disable bootdelay */
425 boot_device = env_get("boot_device");
426 if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
427 env_set("bootdelay", "0");
428
429 return 0;
430}
431
432void board_quiesce_devices(void)
433{
434#ifdef CONFIG_LED
435 setup_led(LEDST_OFF);
436#endif
437}
438
439/* eth init function : weak called in eqos driver */
440int board_interface_eth_init(struct udevice *dev,
441 phy_interface_t interface_type)
442{
443 u8 *syscfg;
444 u32 value;
445 bool eth_clk_sel_reg = false;
446 bool eth_ref_clk_sel_reg = false;
447
448 /* Gigabit Ethernet 125MHz clock selection. */
449 eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
450
451 /* Ethernet 50Mhz RMII clock selection */
452 eth_ref_clk_sel_reg =
453 dev_read_bool(dev, "st,eth_ref_clk_sel");
454
455 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
456
457 if (!syscfg)
458 return -ENODEV;
459
460 switch (interface_type) {
461 case PHY_INTERFACE_MODE_MII:
462 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
463 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
464 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
465 break;
466 case PHY_INTERFACE_MODE_GMII:
467 if (eth_clk_sel_reg)
468 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
469 SYSCFG_PMCSETR_ETH_CLK_SEL;
470 else
471 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
472 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
473 break;
474 case PHY_INTERFACE_MODE_RMII:
475 if (eth_ref_clk_sel_reg)
476 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
477 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
478 else
479 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
480 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
481 break;
482 case PHY_INTERFACE_MODE_RGMII:
483 case PHY_INTERFACE_MODE_RGMII_ID:
484 case PHY_INTERFACE_MODE_RGMII_RXID:
485 case PHY_INTERFACE_MODE_RGMII_TXID:
486 if (eth_clk_sel_reg)
487 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
488 SYSCFG_PMCSETR_ETH_CLK_SEL;
489 else
490 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
491 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
492 break;
493 default:
494 debug("%s: Do not manage %d interface\n",
495 __func__, interface_type);
496 /* Do not manage others interfaces */
497 return -EINVAL;
498 }
499
500 /* clear and set ETH configuration bits */
501 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
502 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
503 syscfg + SYSCFG_PMCCLRR);
504 writel(value, syscfg + SYSCFG_PMCSETR);
505
506 return 0;
507}
508
509enum env_location env_get_location(enum env_operation op, int prio)
510{
511 if (prio)
512 return ENVL_UNKNOWN;
513
514#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
515 return ENVL_SPI_FLASH;
516#else
517 return ENVL_NOWHERE;
518#endif
519}
520
521#ifdef CONFIG_SYS_MTDPARTS_RUNTIME
522
523#define MTDPARTS_LEN 256
524#define MTDIDS_LEN 128
525
526/**
527 * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
528 * If we need to access it before the env is relocated, then we need
529 * to use our own stack buffer. gd->env_buf will be too small.
530 *
531 * @param buf temporary buffer pointer MTDPARTS_LEN long
532 * @return mtdparts variable string, NULL if not found
533 */
534static const char *env_get_mtdparts(const char *str, char *buf)
535{
536 if (gd->flags & GD_FLG_ENV_READY)
537 return env_get(str);
538 if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
539 return buf;
540
541 return NULL;
542}
543
544/**
545 * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
546 */
547static void board_get_mtdparts(const char *dev,
548 char *mtdids,
549 char *mtdparts)
550{
551 char env_name[32] = "mtdparts_";
552 char tmp_mtdparts[MTDPARTS_LEN];
553 const char *tmp;
554
555 /* name of env variable to read = mtdparts_<dev> */
556 strcat(env_name, dev);
557 tmp = env_get_mtdparts(env_name, tmp_mtdparts);
558 if (tmp) {
559 /* mtdids: "<dev>=<dev>, ...." */
560 if (mtdids[0] != '\0')
561 strcat(mtdids, ",");
562 strcat(mtdids, dev);
563 strcat(mtdids, "=");
564 strcat(mtdids, dev);
565
566 /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
567 if (mtdparts[0] != '\0')
568 strncat(mtdparts, ";", MTDPARTS_LEN);
569 else
570 strcat(mtdparts, "mtdparts=");
571 strncat(mtdparts, dev, MTDPARTS_LEN);
572 strncat(mtdparts, ":", MTDPARTS_LEN);
573 strncat(mtdparts, tmp, MTDPARTS_LEN);
574 }
575}
576
577void board_mtdparts_default(const char **mtdids, const char **mtdparts)
578{
579 struct udevice *dev;
580 static char parts[3 * MTDPARTS_LEN + 1];
581 static char ids[MTDIDS_LEN + 1];
582 static bool mtd_initialized;
583
584 if (mtd_initialized) {
585 *mtdids = ids;
586 *mtdparts = parts;
587 return;
588 }
589
590 memset(parts, 0, sizeof(parts));
591 memset(ids, 0, sizeof(ids));
592
593 /* probe all MTD devices */
594 for (uclass_first_device(UCLASS_MTD, &dev);
595 dev;
596 uclass_next_device(&dev)) {
597 pr_debug("mtd device = %s\n", dev->name);
598 }
599
600 if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
601 board_get_mtdparts("nor0", ids, parts);
602
603 mtd_initialized = true;
604 *mtdids = ids;
605 *mtdparts = parts;
606 debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
607}
608#endif
609
610#if defined(CONFIG_OF_BOARD_SETUP)
611int ft_board_setup(void *blob, bd_t *bd)
612{
613 return 0;
614}
615#endif
616
617#ifdef CONFIG_SET_DFU_ALT_INFO
618#define DFU_ALT_BUF_LEN SZ_1K
619
620static void board_get_alt_info(const char *dev, char *buff)
621{
622 char var_name[32] = "dfu_alt_info_";
623 int ret;
624
625 ALLOC_CACHE_ALIGN_BUFFER(char, tmp_alt, DFU_ALT_BUF_LEN);
626
627 /* name of env variable to read = dfu_alt_info_<dev> */
628 strcat(var_name, dev);
629 ret = env_get_f(var_name, tmp_alt, DFU_ALT_BUF_LEN);
630 if (ret) {
631 if (buff[0] != '\0')
632 strcat(buff, "&");
633 strncat(buff, tmp_alt, DFU_ALT_BUF_LEN);
634 }
635}
636
637void set_dfu_alt_info(char *interface, char *devstr)
638{
639 struct udevice *dev;
640
641 ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
642
643 if (env_get("dfu_alt_info"))
644 return;
645
646 memset(buf, 0, sizeof(buf));
647
648 /* probe all MTD devices */
649 mtd_probe_devices();
650
651 board_get_alt_info("ram", buf);
652
653 if (!uclass_get_device(UCLASS_MMC, 0, &dev))
654 board_get_alt_info("mmc0", buf);
655
656 if (!uclass_get_device(UCLASS_MMC, 1, &dev))
657 board_get_alt_info("mmc1", buf);
658
659 if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
660 board_get_alt_info("nor0", buf);
661
662 env_set("dfu_alt_info", buf);
663 puts("DFU alt info setting: done\n");
664}
665#endif
666
667static void board_copro_image_process(ulong fw_image, size_t fw_size)
668{
669 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
670
671 if (!rproc_is_initialized())
672 if (rproc_init()) {
673 printf("Remote Processor %d initialization failed\n",
674 id);
675 return;
676 }
677
678 ret = rproc_load(id, fw_image, fw_size);
679 printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
680 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
681
682 if (!ret) {
683 rproc_start(id);
684 env_set("copro_state", "booted");
685 }
686}
687
688U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);