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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Andy Fleming5f184712011-04-08 02:10:27 -05002/*
3 * Copyright 2011 Freescale Semiconductor, Inc.
Andy Flemingb21f87a32014-07-25 17:39:08 -05004 * Andy Fleming <afleming@gmail.com>
Andy Fleming5f184712011-04-08 02:10:27 -05005 *
Andy Fleming5f184712011-04-08 02:10:27 -05006 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
7 */
8
9#ifndef _PHY_H
10#define _PHY_H
11
Simon Glass2a64ada2020-07-19 10:15:39 -060012#include <log.h>
13#include <phy_interface.h>
14#include <dm/ofnode.h>
15#include <dm/read.h>
Simon Glassf2176512020-02-03 07:36:17 -070016#include <linux/errno.h>
Andy Fleming5f184712011-04-08 02:10:27 -050017#include <linux/list.h>
18#include <linux/mii.h>
19#include <linux/ethtool.h>
20#include <linux/mdio.h>
Simon Glass2a64ada2020-07-19 10:15:39 -060021
22struct udevice;
Andy Fleming5f184712011-04-08 02:10:27 -050023
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +010024#define PHY_FIXED_ID 0xa5a55a5a
Samuel Mendoza-Jonasf641a8a2019-06-18 11:37:17 +100025#define PHY_NCSI_ID 0xbeefcafe
26
Siva Durga Prasad Paladuguf41e5882018-11-27 11:49:11 +053027/*
28 * There is no actual id for this.
29 * This is just a dummy id for gmii2rgmmi converter.
30 */
31#define PHY_GMII2RGMII_ID 0x5a5a5a5a
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +010032
Andy Fleming5f184712011-04-08 02:10:27 -050033#define PHY_MAX_ADDR 32
34
Shaohui Xieddcd1f32016-01-28 15:55:46 +080035#define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
36
Florian Fainelli4dae6102016-01-13 16:59:33 +030037#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
Andy Fleming5f184712011-04-08 02:10:27 -050038 SUPPORTED_TP | \
39 SUPPORTED_MII)
40
Florian Fainelli4dae6102016-01-13 16:59:33 +030041#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
42 SUPPORTED_10baseT_Full)
43
44#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
45 SUPPORTED_100baseT_Full)
46
47#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
Andy Fleming5f184712011-04-08 02:10:27 -050048 SUPPORTED_1000baseT_Full)
49
Florian Fainelli4dae6102016-01-13 16:59:33 +030050#define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
51 PHY_100BT_FEATURES | \
52 PHY_DEFAULT_FEATURES)
53
Radu Pirea (NXP OSS)3ef20502021-06-18 21:58:30 +030054#define PHY_100BT1_FEATURES (SUPPORTED_TP | \
55 SUPPORTED_MII | \
56 SUPPORTED_100baseT_Full)
57
Florian Fainelli4dae6102016-01-13 16:59:33 +030058#define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
59 PHY_1000BT_FEATURES)
60
Andy Fleming5f184712011-04-08 02:10:27 -050061#define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
62 SUPPORTED_10000baseT_Full)
63
Stefan Roese4fb3f0c2014-10-22 12:13:15 +020064#ifndef PHY_ANEG_TIMEOUT
Andy Fleming5f184712011-04-08 02:10:27 -050065#define PHY_ANEG_TIMEOUT 4000
Stefan Roese4fb3f0c2014-10-22 12:13:15 +020066#endif
Andy Fleming5f184712011-04-08 02:10:27 -050067
68
Andy Fleming5f184712011-04-08 02:10:27 -050069struct phy_device;
70
71#define MDIO_NAME_LEN 32
72
73struct mii_dev {
74 struct list_head link;
75 char name[MDIO_NAME_LEN];
76 void *priv;
77 int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
78 int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
79 u16 val);
80 int (*reset)(struct mii_dev *bus);
81 struct phy_device *phymap[PHY_MAX_ADDR];
82 u32 phy_mask;
83};
84
85/* struct phy_driver: a structure which defines PHY behavior
86 *
87 * uid will contain a number which represents the PHY. During
88 * startup, the driver will poll the PHY to find out what its
89 * UID--as defined by registers 2 and 3--is. The 32-bit result
90 * gotten from the PHY will be masked to
91 * discard any bits which may change based on revision numbers
92 * unimportant to functionality
93 *
94 */
95struct phy_driver {
96 char *name;
97 unsigned int uid;
98 unsigned int mask;
99 unsigned int mmds;
100
101 u32 features;
102
103 /* Called to do any driver startup necessities */
104 /* Will be called during phy_connect */
105 int (*probe)(struct phy_device *phydev);
106
107 /* Called to configure the PHY, and modify the controller
108 * based on the results. Should be called after phy_connect */
109 int (*config)(struct phy_device *phydev);
110
111 /* Called when starting up the controller */
112 int (*startup)(struct phy_device *phydev);
113
114 /* Called when bringing down the controller */
115 int (*shutdown)(struct phy_device *phydev);
116
Stefano Babicb71841b2013-09-02 15:42:30 +0200117 int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
118 int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
119 u16 val);
Carlo Caione4f6746d2019-02-08 17:25:06 +0000120
121 /* Phy specific driver override for reading a MMD register */
122 int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
123
124 /* Phy specific driver override for writing a MMD register */
125 int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
126 u16 val);
127
Alex Margineand718b692019-11-14 18:28:29 +0200128 /* driver private data */
129 ulong data;
Andy Fleming5f184712011-04-08 02:10:27 -0500130};
131
132struct phy_device {
133 /* Information about the PHY type */
134 /* And management functions */
135 struct mii_dev *bus;
136 struct phy_driver *drv;
137 void *priv;
138
Simon Glassc74c8e62015-04-05 16:07:39 -0600139 struct udevice *dev;
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500140 ofnode node;
Andy Fleming5f184712011-04-08 02:10:27 -0500141
142 /* forced speed & duplex (no autoneg)
143 * partner speed & duplex & pause (autoneg)
144 */
145 int speed;
146 int duplex;
147
148 /* The most recently read link state */
149 int link;
150 int port;
151 phy_interface_t interface;
152
153 u32 advertising;
154 u32 supported;
155 u32 mmds;
156
157 int autoneg;
158 int addr;
159 int pause;
160 int asym_pause;
161 u32 phy_id;
Pankaj Bansalb3eabd82018-11-16 06:26:18 +0000162 bool is_c45;
Andy Fleming5f184712011-04-08 02:10:27 -0500163 u32 flags;
164};
165
Shaohui Xief55a7762013-11-14 19:00:31 +0800166struct fixed_link {
167 int phy_id;
168 int duplex;
169 int link_speed;
170 int pause;
171 int asym_pause;
172};
173
Alex Margineanc38ac282019-07-11 18:32:56 +0300174/**
175 * phy_init() - Initializes the PHY drivers
Alex Margineanc38ac282019-07-11 18:32:56 +0300176 * This function registers all available PHY drivers
177 *
Dan Murphyea756fb2020-05-04 16:14:37 -0500178 * @return: 0 if OK, -ve on error
Alex Margineanc38ac282019-07-11 18:32:56 +0300179 */
Andy Fleming5f184712011-04-08 02:10:27 -0500180int phy_init(void);
Alex Margineanc38ac282019-07-11 18:32:56 +0300181
182/**
183 * phy_reset() - Resets the specified PHY
Alex Margineanc38ac282019-07-11 18:32:56 +0300184 * Issues a reset of the PHY and waits for it to complete
185 *
186 * @phydev: PHY to reset
Dan Murphyea756fb2020-05-04 16:14:37 -0500187 * @return: 0 if OK, -ve on error
Alex Margineanc38ac282019-07-11 18:32:56 +0300188 */
Andy Fleming5f184712011-04-08 02:10:27 -0500189int phy_reset(struct phy_device *phydev);
Alex Margineanc38ac282019-07-11 18:32:56 +0300190
191/**
192 * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
Alex Margineanc38ac282019-07-11 18:32:56 +0300193 * The function checks the PHY addresses flagged in phy_mask and returns a
194 * phy_device pointer if it detects a PHY.
195 * This function should only be called if just one PHY is expected to be present
196 * in the set of addresses flagged in phy_mask. If multiple PHYs are present,
197 * it is undefined which of these PHYs is returned.
198 *
199 * @bus: MII/MDIO bus to scan
200 * @phy_mask: bitmap of PYH addresses to scan
Dan Murphyea756fb2020-05-04 16:14:37 -0500201 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Margineanc38ac282019-07-11 18:32:56 +0300202 */
Marek BehĂșne24b58f2022-04-07 00:33:08 +0200203struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask);
Alex Margineanc38ac282019-07-11 18:32:56 +0300204
Vladimir Olteand0781c92021-01-25 14:23:52 +0200205#ifdef CONFIG_PHY_FIXED
206
207/**
208 * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
209 * @node: OF node for the container of the fixed-link node
210 *
211 * Description: Creates a struct phy_device based on a fixed-link of_node
212 * description. Can be used without phy_connect by drivers which do not expose
213 * a UCLASS_ETH udevice.
214 */
215struct phy_device *fixed_phy_create(ofnode node);
216
217#else
218
219static inline struct phy_device *fixed_phy_create(ofnode node)
220{
221 return NULL;
222}
223
224#endif
225
Alex Margineanc38ac282019-07-11 18:32:56 +0300226/**
Alex Margineanc38ac282019-07-11 18:32:56 +0300227 * phy_connect() - Creates a PHY device for the Ethernet interface
Alex Margineanc38ac282019-07-11 18:32:56 +0300228 * Creates a PHY device for the PHY at the given address, if one doesn't exist
229 * already, and associates it with the Ethernet device.
230 * The function may be called with addr <= 0, in this case addr value is ignored
231 * and the bus is scanned to detect a PHY. Scanning should only be used if only
232 * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
233 * which PHY is returned.
234 *
235 * @bus: MII/MDIO bus that hosts the PHY
236 * @addr: PHY address on MDIO bus
237 * @dev: Ethernet device to associate to the PHY
238 * @interface: type of MAC-PHY interface
Dan Murphyea756fb2020-05-04 16:14:37 -0500239 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
Alex Margineanc38ac282019-07-11 18:32:56 +0300240 */
Simon Glassc74c8e62015-04-05 16:07:39 -0600241struct phy_device *phy_connect(struct mii_dev *bus, int addr,
242 struct udevice *dev,
243 phy_interface_t interface);
Michal Simek32491162022-02-23 15:45:41 +0100244/**
245 * phy_device_create() - Create a PHY device
246 *
247 * @bus: MII/MDIO bus that hosts the PHY
248 * @addr: PHY address on MDIO bus
249 * @phy_id: where to store the ID retrieved
250 * @is_c45: Device Identifiers if is_c45
Michal Simek32491162022-02-23 15:45:41 +0100251 * @return: pointer to phy_device if a PHY is found, or NULL otherwise
252 */
253struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
Marek BehĂșne24b58f2022-04-07 00:33:08 +0200254 u32 phy_id, bool is_c45);
Alex Margineanc38ac282019-07-11 18:32:56 +0300255
Michal Simeka744a282022-02-23 15:45:42 +0100256/**
257 * phy_connect_phy_id() - Connect to phy device by reading PHY id
258 * from phy node.
259 *
260 * @bus: MII/MDIO bus that hosts the PHY
261 * @dev: Ethernet device to associate to the PHY
Michal Simeka744a282022-02-23 15:45:42 +0100262 * @return: pointer to phy_device if a PHY is found,
263 * or NULL otherwise
264 */
265struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
Tom Rini7f418ea2022-04-15 08:09:52 -0400266 int phyaddr);
Michal Simeka744a282022-02-23 15:45:42 +0100267
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500268static inline ofnode phy_get_ofnode(struct phy_device *phydev)
269{
270 if (ofnode_valid(phydev->node))
271 return phydev->node;
272 else
273 return dev_ofnode(phydev->dev);
274}
Ramon Fried65f22662022-06-05 03:44:15 +0300275
Marek Vasut1f614d52023-03-19 18:08:08 +0100276/**
277 * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
278 * condition is met or a timeout occurs
279 *
280 * @phydev: The phy_device struct
281 * @devaddr: The MMD to read from
282 * @regnum: The register on the MMD to read
283 * @val: Variable to read the register into
284 * @cond: Break condition (usually involving @val)
285 * @sleep_us: Maximum time to sleep between reads in us (0
286 * tight-loops). Should be less than ~20ms since usleep_range
287 * is used (see Documentation/timers/timers-howto.rst).
288 * @timeout_us: Timeout in us, 0 means never timeout
289 * @sleep_before_read: if it is true, sleep @sleep_us before read.
290 * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
291 * case, the last read value at @args is stored in @val. Must not
292 * be called from atomic context if sleep_us or timeout_us are used.
293 */
294#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
295 sleep_us, timeout_us, sleep_before_read) \
296({ \
297 int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
298 sleep_us, timeout_us, \
299 phydev, devaddr, regnum); \
300 if (val < 0) \
301 __ret = val; \
302 if (__ret) \
303 dev_err(phydev->dev, "%s failed: %d\n", __func__, __ret); \
304 __ret; \
305})
306
Ramon Fried65f22662022-06-05 03:44:15 +0300307int phy_read(struct phy_device *phydev, int devad, int regnum);
308int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val);
309void phy_mmd_start_indirect(struct phy_device *phydev, int devad, int regnum);
310int phy_read_mmd(struct phy_device *phydev, int devad, int regnum);
311int phy_write_mmd(struct phy_device *phydev, int devad, int regnum, u16 val);
312int phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
313int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
Marek Vasut87b75022023-03-19 18:08:07 +0100314int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
315 u16 mask, u16 set);
316int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
317 u16 mask, u16 set);
Ramon Fried65f22662022-06-05 03:44:15 +0300318
Andy Fleming5f184712011-04-08 02:10:27 -0500319int phy_startup(struct phy_device *phydev);
320int phy_config(struct phy_device *phydev);
321int phy_shutdown(struct phy_device *phydev);
Alexey Brodkinb18acb02016-01-13 16:59:34 +0300322int phy_set_supported(struct phy_device *phydev, u32 max_speed);
Ariel D'Alessandro087baf82022-04-12 10:31:36 -0300323int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
324 u16 set);
Andy Fleming5f184712011-04-08 02:10:27 -0500325int genphy_config_aneg(struct phy_device *phydev);
Troy Kisky8682aba2012-02-07 14:08:48 +0000326int genphy_restart_aneg(struct phy_device *phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500327int genphy_update_link(struct phy_device *phydev);
Yegor Yefremove2043f52012-11-28 11:15:17 +0100328int genphy_parse_link(struct phy_device *phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500329int genphy_config(struct phy_device *phydev);
330int genphy_startup(struct phy_device *phydev);
331int genphy_shutdown(struct phy_device *phydev);
332int gen10g_config(struct phy_device *phydev);
333int gen10g_startup(struct phy_device *phydev);
334int gen10g_shutdown(struct phy_device *phydev);
335int gen10g_discover_mmds(struct phy_device *phydev);
336
Marek Vasut7940a932023-03-19 18:02:42 +0100337/**
338 * U_BOOT_PHY_DRIVER() - Declare a new U-Boot driver
339 * @__name: name of the driver
340 */
341#define U_BOOT_PHY_DRIVER(__name) \
342 ll_entry_declare(struct phy_driver, __name, phy_driver)
343
Fabio Estevam2fb63962014-02-15 14:52:00 -0200344int board_phy_config(struct phy_device *phydev);
Shengzhou Liu5707d5f2015-04-07 18:46:32 +0800345int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
Fabio Estevam2fb63962014-02-15 14:52:00 -0200346
Simon Glassc74c8e62015-04-05 16:07:39 -0600347/**
Dan Murphy3ab72fe2016-05-02 15:46:00 -0500348 * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
349 * is RGMII (all variants)
350 * @phydev: the phy_device struct
Dan Murphyea756fb2020-05-04 16:14:37 -0500351 * @return: true if MII bus is RGMII or false if it is not
Dan Murphy3ab72fe2016-05-02 15:46:00 -0500352 */
353static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
354{
Nishanth Menon09005c22023-04-14 17:06:45 -0500355 switch (phydev->interface) {
356 case PHY_INTERFACE_MODE_RGMII:
357 case PHY_INTERFACE_MODE_RGMII_ID:
358 case PHY_INTERFACE_MODE_RGMII_RXID:
359 case PHY_INTERFACE_MODE_RGMII_TXID:
360 return 1;
361 default:
362 return 0;
363 }
Dan Murphy3ab72fe2016-05-02 15:46:00 -0500364}
365
Samuel Mendoza-Jonas09bd3d02022-08-08 21:46:03 +0930366bool phy_interface_is_ncsi(void);
367
Timur Tabia8366262011-10-18 18:44:34 -0500368/* PHY UIDs for various PHYs that are referenced in external code */
Wolfgang Denk0cf207e2021-09-27 17:42:39 +0200369#define PHY_UID_CS4340 0x13e51002
370#define PHY_UID_CS4223 0x03e57003
Priyanka Jain1ddcf5e2018-10-11 04:47:05 +0000371#define PHY_UID_TN2020 0x00a19410
372#define PHY_UID_IN112525_S03 0x02107440
Timur Tabia8366262011-10-18 18:44:34 -0500373
Andy Fleming5f184712011-04-08 02:10:27 -0500374#endif