blob: 74f77f1ea1c494094f079ad38293e2433d28010f [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
14#include <linux/compiler.h>
15#include <version.h>
16#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060017#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000018#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000019#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000020#if defined(CONFIG_CMD_IDE)
21#include <ide.h>
22#endif
23#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000024#include <initcall.h>
25#include <logbuff.h>
Simon Glassfb5cf7f2015-02-27 22:06:36 -070026#include <malloc.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050027#include <mapmem.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000028
29/* TODO: Can we move these into arch/ headers? */
30#ifdef CONFIG_8xx
31#include <mpc8xx.h>
32#endif
33#ifdef CONFIG_5xx
34#include <mpc5xx.h>
35#endif
36#ifdef CONFIG_MPC5xxx
37#include <mpc5xxx.h>
38#endif
Gabriel Huauec3b4822014-09-03 13:57:54 -070039#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Gabriel Huaua76df702014-07-26 11:35:43 -070040#include <asm/mp.h>
41#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +000042
Simon Glassa733b062013-04-26 02:53:43 +000043#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000044#include <post.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000045#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020046#include <status_led.h>
Simon Glass71c52db2013-06-11 11:14:42 -070047#include <trace.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000048#include <watchdog.h>
Simon Glassa733b062013-04-26 02:53:43 +000049#include <asm/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000050#include <asm/io.h>
51#include <asm/sections.h>
Alexey Brodkin3fb80162015-02-24 19:40:36 +030052#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +000053#include <asm/init_helpers.h>
54#include <asm/relocate.h>
55#endif
Simon Glassa733b062013-04-26 02:53:43 +000056#ifdef CONFIG_SANDBOX
57#include <asm/state.h>
58#endif
Simon Glassab7cd622014-07-23 06:55:04 -060059#include <dm/root.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000060#include <linux/compiler.h>
61
62/*
63 * Pointer to initial global data area
64 *
65 * Here we initialize it if needed.
66 */
67#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
68#undef XTRN_DECLARE_GLOBAL_DATA_PTR
69#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
70DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
71#else
72DECLARE_GLOBAL_DATA_PTR;
73#endif
74
75/*
Simon Glass4c509342015-04-28 20:25:03 -060076 * TODO(sjg@chromium.org): IMO this code should be
Simon Glass1938f4a2013-03-11 06:49:53 +000077 * refactored to a single function, something like:
78 *
79 * void led_set_state(enum led_colour_t colour, int on);
80 */
81/************************************************************************
82 * Coloured LED functionality
83 ************************************************************************
84 * May be supplied by boards if desired
85 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020086__weak void coloured_LED_init(void) {}
87__weak void red_led_on(void) {}
88__weak void red_led_off(void) {}
89__weak void green_led_on(void) {}
90__weak void green_led_off(void) {}
91__weak void yellow_led_on(void) {}
92__weak void yellow_led_off(void) {}
93__weak void blue_led_on(void) {}
94__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000095
96/*
97 * Why is gd allocated a register? Prior to reloc it might be better to
98 * just pass it around to each function in this file?
99 *
100 * After reloc one could argue that it is hardly used and doesn't need
101 * to be in a register. Or if it is it should perhaps hold pointers to all
102 * global data for all modules, so that post-reloc we can avoid the massive
103 * literal pool we get on ARM. Or perhaps just encourage each module to use
104 * a structure...
105 */
106
107/*
108 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
109 */
110
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800111#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000112static int init_func_watchdog_init(void)
113{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800114# if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
115 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Stefan Roese14a380a2015-03-10 08:04:36 +0100116 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
117 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800118 hw_watchdog_init();
119# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000120 puts(" Watchdog enabled\n");
121 WATCHDOG_RESET();
122
123 return 0;
124}
125
126int init_func_watchdog_reset(void)
127{
128 WATCHDOG_RESET();
129
130 return 0;
131}
132#endif /* CONFIG_WATCHDOG */
133
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200134__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000135{
136 /* please define platform specific board_add_ram_info() */
137}
138
Simon Glass1938f4a2013-03-11 06:49:53 +0000139static int init_baud_rate(void)
140{
141 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
142 return 0;
143}
144
145static int display_text_info(void)
146{
Ben Stoltz9b217492015-07-31 09:31:37 -0600147#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100148 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000149
Simon Glass632efa72013-03-11 07:06:48 +0000150 bss_start = (ulong)&__bss_start;
151 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100152
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800153#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100154 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800155#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100156 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800157#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100158
159 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
160 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000161#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000162
163#ifdef CONFIG_MODEM_SUPPORT
164 debug("Modem Support enabled\n");
165#endif
166#ifdef CONFIG_USE_IRQ
167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
169#endif
170
171 return 0;
172}
173
174static int announce_dram_init(void)
175{
176 puts("DRAM: ");
177 return 0;
178}
179
angelo@sysam.ite310b932015-02-12 01:40:17 +0100180#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000181static int init_func_ram(void)
182{
183#ifdef CONFIG_BOARD_TYPES
184 int board_type = gd->board_type;
185#else
186 int board_type = 0; /* use dummy arg */
187#endif
188
189 gd->ram_size = initdram(board_type);
190
191 if (gd->ram_size > 0)
192 return 0;
193
194 puts("*** failed ***\n");
195 return 1;
196}
197#endif
198
Simon Glass1938f4a2013-03-11 06:49:53 +0000199static int show_dram_config(void)
200{
York Sunfa39ffe2014-05-02 17:28:05 -0700201 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000202
203#ifdef CONFIG_NR_DRAM_BANKS
204 int i;
205
206 debug("\nRAM Configuration:\n");
207 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
208 size += gd->bd->bi_dram[i].size;
Bin Meng715f5992015-08-06 01:31:20 -0700209 debug("Bank #%d: %llx ", i,
210 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glass1938f4a2013-03-11 06:49:53 +0000211#ifdef DEBUG
212 print_size(gd->bd->bi_dram[i].size, "\n");
213#endif
214 }
215 debug("\nDRAM: ");
216#else
217 size = gd->ram_size;
218#endif
219
Simon Glasse4fef6c2013-03-11 14:30:42 +0000220 print_size(size, "");
221 board_add_ram_info(0);
222 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000223
224 return 0;
225}
226
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200227__weak void dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000228{
229#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
230 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
231 gd->bd->bi_dram[0].size = get_effective_memsize();
232#endif
233}
234
Heiko Schocherea818db2013-01-29 08:53:15 +0100235#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000236static int init_func_i2c(void)
237{
238 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200239#ifdef CONFIG_SYS_I2C
240 i2c_init_all();
241#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000242 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200243#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000244 puts("ready\n");
245 return 0;
246}
247#endif
248
249#if defined(CONFIG_HARD_SPI)
250static int init_func_spi(void)
251{
252 puts("SPI: ");
253 spi_init();
254 puts("ready\n");
255 return 0;
256}
257#endif
258
259__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000260static int zero_global_data(void)
261{
262 memset((void *)gd, '\0', sizeof(gd_t));
263
264 return 0;
265}
266
267static int setup_mon_len(void)
268{
Michal Simeke945f6d2014-05-08 16:08:44 +0200269#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100270 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Ben Stoltz9b217492015-07-31 09:31:37 -0600271#elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
Simon Glassa733b062013-04-26 02:53:43 +0000272 gd->mon_len = (ulong)&_end - (ulong)_init;
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800273#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800274 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Simon Glass632efa72013-03-11 07:06:48 +0000275#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000276 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
277 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000278#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000279 return 0;
280}
281
282__weak int arch_cpu_init(void)
283{
284 return 0;
285}
286
Simon Glassa733b062013-04-26 02:53:43 +0000287#ifdef CONFIG_SANDBOX
288static int setup_ram_buf(void)
289{
Simon Glass5c2859c2013-11-10 10:27:03 -0700290 struct sandbox_state *state = state_get_current();
291
292 gd->arch.ram_buf = state->ram_buf;
293 gd->ram_size = state->ram_size;
Simon Glassa733b062013-04-26 02:53:43 +0000294
295 return 0;
296}
297#endif
298
Simon Glass1938f4a2013-03-11 06:49:53 +0000299/* Get the top of usable RAM */
300__weak ulong board_get_usable_ram_top(ulong total_size)
301{
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700302#ifdef CONFIG_SYS_SDRAM_BASE
303 /*
Simon Glass4c509342015-04-28 20:25:03 -0600304 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700305 * 32-bit address space. If so, clip the usable RAM so it doesn't.
306 */
307 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
308 /*
309 * Will wrap back to top of 32-bit space when reservations
310 * are made.
311 */
312 return 0;
313#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000314 return gd->ram_top;
315}
316
317static int setup_dest_addr(void)
318{
319 debug("Monitor len: %08lX\n", gd->mon_len);
320 /*
321 * Ram is setup, size stored in gd !!
322 */
323 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
324#if defined(CONFIG_SYS_MEM_TOP_HIDE)
325 /*
326 * Subtract specified amount of memory to hide so that it won't
327 * get "touched" at all by U-Boot. By fixing up gd->ram_size
328 * the Linux kernel should now get passed the now "corrected"
329 * memory size and won't touch it either. This should work
330 * for arch/ppc and arch/powerpc. Only Linux board ports in
331 * arch/powerpc with bootwrapper support, that recalculate the
332 * memory size from the SDRAM controller setup will have to
333 * get fixed.
334 */
335 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
336#endif
337#ifdef CONFIG_SYS_SDRAM_BASE
338 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
339#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000340 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000341 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000342 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000343 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700344#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000345 /*
346 * We need to make sure the location we intend to put secondary core
347 * boot code is reserved and not used by any part of u-boot
348 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000349 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
350 gd->relocaddr = determine_mp_bootpg(NULL);
351 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000352 }
353#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000354 return 0;
355}
356
357#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
358static int reserve_logbuffer(void)
359{
360 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000361 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000362 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000363 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000364 return 0;
365}
366#endif
367
368#ifdef CONFIG_PRAM
369/* reserve protected RAM */
370static int reserve_pram(void)
371{
372 ulong reg;
373
374 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000375 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000376 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000377 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000378 return 0;
379}
380#endif /* CONFIG_PRAM */
381
382/* Round memory pointer down to next 4 kB limit */
383static int reserve_round_4k(void)
384{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000385 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000386 return 0;
387}
388
389#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
390 defined(CONFIG_ARM)
391static int reserve_mmu(void)
392{
393 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800394 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000395 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000396
397 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000398 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000399
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000400 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000401 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
402 gd->arch.tlb_addr + gd->arch.tlb_size);
403 return 0;
404}
405#endif
406
407#ifdef CONFIG_LCD
408static int reserve_lcd(void)
409{
410#ifdef CONFIG_FB_ADDR
411 gd->fb_base = CONFIG_FB_ADDR;
412#else
413 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000414 gd->relocaddr = lcd_setmem(gd->relocaddr);
415 gd->fb_base = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000416#endif /* CONFIG_FB_ADDR */
417 return 0;
418}
419#endif /* CONFIG_LCD */
420
Simon Glass71c52db2013-06-11 11:14:42 -0700421static int reserve_trace(void)
422{
423#ifdef CONFIG_TRACE
424 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
425 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
426 debug("Reserving %dk for trace data at: %08lx\n",
427 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
428#endif
429
430 return 0;
431}
432
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800433#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
434 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
angelo@sysam.it944ab342015-03-28 11:34:52 +0100435 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000436static int reserve_video(void)
437{
438 /* reserve memory for video display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000439 gd->relocaddr = video_setmem(gd->relocaddr);
440 gd->fb_base = gd->relocaddr;
Simon Glasse4fef6c2013-03-11 14:30:42 +0000441
442 return 0;
443}
444#endif
445
Simon Glass1938f4a2013-03-11 06:49:53 +0000446static int reserve_uboot(void)
447{
448 /*
449 * reserve memory for U-Boot code, data & bss
450 * round down to next 4 kB limit
451 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000452 gd->relocaddr -= gd->mon_len;
453 gd->relocaddr &= ~(4096 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000454#ifdef CONFIG_E500
455 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000456 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000457#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000458
459 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000460 gd->relocaddr);
461
462 gd->start_addr_sp = gd->relocaddr;
463
Simon Glass1938f4a2013-03-11 06:49:53 +0000464 return 0;
465}
466
Simon Glass8cae8a62013-03-05 14:39:45 +0000467#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000468/* reserve memory for malloc() area */
469static int reserve_malloc(void)
470{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000471 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000472 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000473 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000474 return 0;
475}
476
477/* (permanently) allocate a Board Info struct */
478static int reserve_board(void)
479{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800480 if (!gd->bd) {
481 gd->start_addr_sp -= sizeof(bd_t);
482 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
483 memset(gd->bd, '\0', sizeof(bd_t));
484 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
485 sizeof(bd_t), gd->start_addr_sp);
486 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000487 return 0;
488}
Simon Glass8cae8a62013-03-05 14:39:45 +0000489#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000490
491static int setup_machine(void)
492{
493#ifdef CONFIG_MACH_TYPE
494 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
495#endif
496 return 0;
497}
498
499static int reserve_global_data(void)
500{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000501 gd->start_addr_sp -= sizeof(gd_t);
Simon Glass2afddae2015-08-10 20:44:29 -0600502 gd->start_addr_sp &= ~0xf;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000503 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000504 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000505 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000506 return 0;
507}
508
509static int reserve_fdt(void)
510{
511 /*
Simon Glass4c509342015-04-28 20:25:03 -0600512 * If the device tree is sitting immediately above our image then we
Simon Glass1938f4a2013-03-11 06:49:53 +0000513 * must relocate it. If it is embedded in the data section, then it
514 * will be relocated with other data.
515 */
516 if (gd->fdt_blob) {
517 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
518
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000519 gd->start_addr_sp -= gd->fdt_size;
520 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000521 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000522 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000523 }
524
525 return 0;
526}
527
Andreas Bießmann68145d42015-02-06 23:06:45 +0100528int arch_reserve_stacks(void)
529{
530 return 0;
531}
532
Simon Glass1938f4a2013-03-11 06:49:53 +0000533static int reserve_stacks(void)
534{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100535 /* make stack pointer 16-byte aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000536 gd->start_addr_sp -= 16;
537 gd->start_addr_sp &= ~0xf;
Simon Glass1938f4a2013-03-11 06:49:53 +0000538
539 /*
Simon Glass4c509342015-04-28 20:25:03 -0600540 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann68145d42015-02-06 23:06:45 +0100541 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000542 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100543 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000544}
545
546static int display_new_sp(void)
547{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000548 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000549
550 return 0;
551}
552
angelo@sysam.ite310b932015-02-12 01:40:17 +0100553#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000554static int setup_board_part1(void)
555{
556 bd_t *bd = gd->bd;
557
558 /*
559 * Save local variables to board info struct
560 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000561 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
562 bd->bi_memsize = gd->ram_size; /* size in bytes */
563
564#ifdef CONFIG_SYS_SRAM_BASE
565 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
566 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
567#endif
568
Masahiro Yamada58dac322014-03-05 17:40:10 +0900569#if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
Simon Glasse4fef6c2013-03-11 14:30:42 +0000570 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
571 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
572#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100573#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000574 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
575#endif
576#if defined(CONFIG_MPC83xx)
577 bd->bi_immrbar = CONFIG_SYS_IMMR;
578#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000579
580 return 0;
581}
582
583static int setup_board_part2(void)
584{
585 bd_t *bd = gd->bd;
586
587 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
588 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
589#if defined(CONFIG_CPM2)
590 bd->bi_cpmfreq = gd->arch.cpm_clk;
591 bd->bi_brgfreq = gd->arch.brg_clk;
592 bd->bi_sccfreq = gd->arch.scc_clk;
593 bd->bi_vco = gd->arch.vco_out;
594#endif /* CONFIG_CPM2 */
595#if defined(CONFIG_MPC512X)
596 bd->bi_ipsfreq = gd->arch.ips_clk;
597#endif /* CONFIG_MPC512X */
598#if defined(CONFIG_MPC5xxx)
599 bd->bi_ipbfreq = gd->arch.ipb_clk;
600 bd->bi_pcifreq = gd->pci_clk;
601#endif /* CONFIG_MPC5xxx */
Alison Wang1313db42015-02-12 18:33:15 +0800602#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
603 bd->bi_pcifreq = gd->pci_clk;
604#endif
605#if defined(CONFIG_EXTRA_CLOCK)
606 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
607 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
608 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
609#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000610
611 return 0;
612}
613#endif
614
615#ifdef CONFIG_SYS_EXTBDINFO
616static int setup_board_extra(void)
617{
618 bd_t *bd = gd->bd;
619
620 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
621 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
622 sizeof(bd->bi_r_version));
623
624 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
625 bd->bi_plb_busfreq = gd->bus_clk;
626#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
627 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
628 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
629 bd->bi_pci_busfreq = get_PCI_freq();
630 bd->bi_opbfreq = get_OPB_freq();
631#elif defined(CONFIG_XILINX_405)
632 bd->bi_pci_busfreq = get_PCI_freq();
633#endif
634
635 return 0;
636}
637#endif
638
Simon Glass1938f4a2013-03-11 06:49:53 +0000639#ifdef CONFIG_POST
640static int init_post(void)
641{
642 post_bootmode_init();
643 post_run(NULL, POST_ROM | post_bootmode_get(0));
644
645 return 0;
646}
647#endif
648
Simon Glass1938f4a2013-03-11 06:49:53 +0000649static int setup_dram_config(void)
650{
651 /* Ram is board specific, so move it to board code ... */
652 dram_init_banksize();
653
654 return 0;
655}
656
657static int reloc_fdt(void)
658{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600659 if (gd->flags & GD_FLG_SKIP_RELOC)
660 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000661 if (gd->new_fdt) {
662 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
663 gd->fdt_blob = gd->new_fdt;
664 }
665
666 return 0;
667}
668
669static int setup_reloc(void)
670{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600671 if (gd->flags & GD_FLG_SKIP_RELOC) {
672 debug("Skipping relocation due to flag\n");
673 return 0;
674 }
675
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800676#ifdef CONFIG_SYS_TEXT_BASE
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000677 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100678#ifdef CONFIG_M68K
679 /*
680 * On all ColdFire arch cpu, monitor code starts always
681 * just after the default vector table location, so at 0x400
682 */
683 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
684#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800685#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000686 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
687
688 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000689 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000690 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
691 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000692
693 return 0;
694}
695
696/* ARM calls relocate_code from its crt0.S */
Simon Glass808434c2013-11-10 10:26:59 -0700697#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000698
699static int jump_to_copy(void)
700{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600701 if (gd->flags & GD_FLG_SKIP_RELOC)
702 return 0;
Simon Glass48a33802013-03-05 14:39:52 +0000703 /*
704 * x86 is special, but in a nice way. It uses a trampoline which
705 * enables the dcache if possible.
706 *
707 * For now, other archs use relocate_code(), which is implemented
708 * similarly for all archs. When we do generic relocation, hopefully
709 * we can make all archs enable the dcache prior to relocation.
710 */
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300711#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000712 /*
713 * SDRAM and console are now initialised. The final stack can now
714 * be setup in SDRAM. Code execution will continue in Flash, but
715 * with the stack in SDRAM and Global Data in temporary memory
716 * (CPU cache)
717 */
718 board_init_f_r_trampoline(gd->start_addr_sp);
719#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000720 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000721#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000722
723 return 0;
724}
725#endif
726
727/* Record the board_init_f() bootstage (after arch_cpu_init()) */
728static int mark_bootstage(void)
729{
730 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
731
732 return 0;
733}
734
Simon Glassab7cd622014-07-23 06:55:04 -0600735static int initf_dm(void)
736{
737#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
738 int ret;
739
740 ret = dm_init_and_scan(true);
741 if (ret)
742 return ret;
743#endif
744
745 return 0;
746}
747
Simon Glass146251f2015-01-19 22:16:12 -0700748/* Architecture-specific memory reservation */
749__weak int reserve_arch(void)
750{
751 return 0;
752}
753
Simon Glassd4c671c2015-03-05 12:25:16 -0700754__weak int arch_cpu_init_dm(void)
755{
756 return 0;
757}
758
Simon Glass1938f4a2013-03-11 06:49:53 +0000759static init_fnc_t init_sequence_f[] = {
Simon Glassa733b062013-04-26 02:53:43 +0000760#ifdef CONFIG_SANDBOX
761 setup_ram_buf,
762#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000763 setup_mon_len,
Simon Glassb45122f2015-02-27 22:06:34 -0700764#ifdef CONFIG_OF_CONTROL
Simon Glass08793612015-02-27 22:06:35 -0700765 fdtdec_setup,
Simon Glassb45122f2015-02-27 22:06:34 -0700766#endif
Bin Mengaefaff82015-06-07 11:33:14 +0800767#if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
768 x86_fsp_init,
769#endif
Kevin Hilmand2107182014-12-09 15:03:58 -0800770#ifdef CONFIG_TRACE
Simon Glass71c52db2013-06-11 11:14:42 -0700771 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800772#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700773 initf_malloc,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000774#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
775 /* TODO: can this go into arch_cpu_init()? */
776 probecpu,
777#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000778 arch_cpu_init, /* basic arch cpu dependent setup */
779 mark_bootstage,
Simon Glass3ea09532014-09-03 17:36:59 -0600780 initf_dm,
Simon Glassd4c671c2015-03-05 12:25:16 -0700781 arch_cpu_init_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +0000782#if defined(CONFIG_BOARD_EARLY_INIT_F)
783 board_early_init_f,
784#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000785 /* TODO: can any of this go into arch_cpu_init()? */
786#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
787 get_clocks, /* get CPU and bus clocks (etc.) */
788#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
789 && !defined(CONFIG_TQM885D)
790 adjust_sdram_tbs_8xx,
791#endif
792 /* TODO: can we rename this to timer_init()? */
793 init_timebase,
794#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800795#if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || defined(CONFIG_BLACKFIN)
Simon Glass1938f4a2013-03-11 06:49:53 +0000796 timer_init, /* initialize timer */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000797#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000798#ifdef CONFIG_SYS_ALLOC_DPRAM
799#if !defined(CONFIG_CPM2)
800 dpram_init,
801#endif
802#endif
803#if defined(CONFIG_BOARD_POSTCLK_INIT)
804 board_postclk_init,
805#endif
Masahiro Yamadab8521b72013-05-21 21:08:09 +0000806#ifdef CONFIG_FSL_ESDHC
807 get_clocks,
808#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100809#ifdef CONFIG_M68K
810 get_clocks,
811#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000812 env_init, /* initialize environment */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000813#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
814 /* get CPU and bus clocks according to the environment variable */
815 get_clocks_866,
816 /* adjust sdram refresh rate according to the new clock */
817 sdram_adjust_866,
818 init_timebase,
819#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000820 init_baud_rate, /* initialze baudrate settings */
821 serial_init, /* serial communications setup */
822 console_init_f, /* stage 1 init of console */
Simon Glassa733b062013-04-26 02:53:43 +0000823#ifdef CONFIG_SANDBOX
824 sandbox_early_getopt_check,
825#endif
826#ifdef CONFIG_OF_CONTROL
827 fdtdec_prepare_fdt,
Simon Glass48a33802013-03-05 14:39:52 +0000828#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000829 display_options, /* say that we are here */
830 display_text_info, /* show debugging info if required */
Masahiro Yamada58dac322014-03-05 17:40:10 +0900831#if defined(CONFIG_MPC8260)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000832 prt_8260_rsr,
833 prt_8260_clks,
Masahiro Yamada58dac322014-03-05 17:40:10 +0900834#endif /* CONFIG_MPC8260 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000835#if defined(CONFIG_MPC83xx)
836 prt_83xx_rsr,
837#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100838#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000839 checkcpu,
840#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000841 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000842#if defined(CONFIG_MPC5xxx)
843 prt_mpc5xxx_clks,
844#endif /* CONFIG_MPC5xxx */
Simon Glass1938f4a2013-03-11 06:49:53 +0000845#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900846 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000847#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000848 INIT_FUNC_WATCHDOG_INIT
849#if defined(CONFIG_MISC_INIT_F)
850 misc_init_f,
851#endif
852 INIT_FUNC_WATCHDOG_RESET
Heiko Schocherea818db2013-01-29 08:53:15 +0100853#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000854 init_func_i2c,
855#endif
856#if defined(CONFIG_HARD_SPI)
857 init_func_spi,
858#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000859 announce_dram_init,
860 /* TODO: unify all these dram functions? */
Andreas Bießmanna752a8b2015-02-06 23:06:48 +0100861#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
Simon Glass1938f4a2013-03-11 06:49:53 +0000862 dram_init, /* configure available RAM banks */
863#endif
angelo@sysam.ite310b932015-02-12 01:40:17 +0100864#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000865 init_func_ram,
866#endif
867#ifdef CONFIG_POST
868 post_init_f,
869#endif
870 INIT_FUNC_WATCHDOG_RESET
871#if defined(CONFIG_SYS_DRAM_TEST)
872 testdram,
873#endif /* CONFIG_SYS_DRAM_TEST */
874 INIT_FUNC_WATCHDOG_RESET
875
Simon Glass1938f4a2013-03-11 06:49:53 +0000876#ifdef CONFIG_POST
877 init_post,
878#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000879 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000880 /*
881 * Now that we have DRAM mapped and working, we can
882 * relocate the code and continue running from DRAM.
883 *
884 * Reserve memory at end of RAM for (top down in that order):
885 * - area that won't get touched by U-Boot and Linux (optional)
886 * - kernel log buffer
887 * - protected RAM
888 * - LCD framebuffer
889 * - monitor code
890 * - board info struct
891 */
892 setup_dest_addr,
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800893#if defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800894 /* Blackfin u-boot monitor should be on top of the ram */
895 reserve_uboot,
896#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000897#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
898 reserve_logbuffer,
899#endif
900#ifdef CONFIG_PRAM
901 reserve_pram,
902#endif
903 reserve_round_4k,
904#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
905 defined(CONFIG_ARM)
906 reserve_mmu,
907#endif
908#ifdef CONFIG_LCD
909 reserve_lcd,
910#endif
Simon Glass71c52db2013-06-11 11:14:42 -0700911 reserve_trace,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000912 /* TODO: Why the dependency on CONFIG_8xx? */
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800913#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
914 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
angelo@sysam.it944ab342015-03-28 11:34:52 +0100915 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000916 reserve_video,
917#endif
Thomas Chou5ff10aa2014-08-22 11:36:47 +0800918#if !defined(CONFIG_BLACKFIN) && !defined(CONFIG_NIOS2)
Simon Glass1938f4a2013-03-11 06:49:53 +0000919 reserve_uboot,
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800920#endif
Simon Glass8cae8a62013-03-05 14:39:45 +0000921#ifndef CONFIG_SPL_BUILD
Simon Glass1938f4a2013-03-11 06:49:53 +0000922 reserve_malloc,
923 reserve_board,
Simon Glass8cae8a62013-03-05 14:39:45 +0000924#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000925 setup_machine,
926 reserve_global_data,
927 reserve_fdt,
Simon Glass146251f2015-01-19 22:16:12 -0700928 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +0000929 reserve_stacks,
930 setup_dram_config,
931 show_dram_config,
angelo@sysam.ite310b932015-02-12 01:40:17 +0100932#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000933 setup_board_part1,
934 INIT_FUNC_WATCHDOG_RESET
935 setup_board_part2,
936#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000937 display_new_sp,
Simon Glasse4fef6c2013-03-11 14:30:42 +0000938#ifdef CONFIG_SYS_EXTBDINFO
939 setup_board_extra,
940#endif
941 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000942 reloc_fdt,
943 setup_reloc,
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300944#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass313aef32015-01-01 16:18:09 -0700945 copy_uboot_to_ram,
946 clear_bss,
947 do_elf_reloc_fixups,
948#endif
Simon Glass808434c2013-11-10 10:26:59 -0700949#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glass1938f4a2013-03-11 06:49:53 +0000950 jump_to_copy,
951#endif
952 NULL,
953};
954
955void board_init_f(ulong boot_flags)
956{
York Sun2a1680e2014-05-02 17:28:04 -0700957#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
958 /*
959 * For some archtectures, global data is initialized and used before
960 * calling this function. The data should be preserved. For others,
961 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
962 * here to host global data until relocation.
963 */
Simon Glass1938f4a2013-03-11 06:49:53 +0000964 gd_t data;
965
966 gd = &data;
967
David Fengcce6be72013-12-14 11:47:36 +0800968 /*
969 * Clear global data before it is accessed at debug print
970 * in initcall_run_list. Otherwise the debug print probably
971 * get the wrong vaule of gd->have_console.
972 */
David Fengcce6be72013-12-14 11:47:36 +0800973 zero_global_data();
974#endif
975
Simon Glass1938f4a2013-03-11 06:49:53 +0000976 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +0400977 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000978
979 if (initcall_run_list(init_sequence_f))
980 hang();
981
Ben Stoltz9b217492015-07-31 09:31:37 -0600982#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
983 !defined(CONFIG_EFI_APP)
Simon Glass1938f4a2013-03-11 06:49:53 +0000984 /* NOTREACHED - jump_to_copy() does not return */
985 hang();
986#endif
987}
988
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300989#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000990/*
991 * For now this code is only used on x86.
992 *
993 * init_sequence_f_r is the list of init functions which are run when
994 * U-Boot is executing from Flash with a semi-limited 'C' environment.
995 * The following limitations must be considered when implementing an
996 * '_f_r' function:
997 * - 'static' variables are read-only
998 * - Global Data (gd->xxx) is read/write
999 *
1000 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1001 * supported). It _should_, if possible, copy global data to RAM and
1002 * initialise the CPU caches (to speed up the relocation process)
1003 *
1004 * NOTE: At present only x86 uses this route, but it is intended that
1005 * all archs will move to this when generic relocation is implemented.
1006 */
1007static init_fnc_t init_sequence_f_r[] = {
1008 init_cache_f_r,
Simon Glass48a33802013-03-05 14:39:52 +00001009
1010 NULL,
1011};
1012
1013void board_init_f_r(void)
1014{
1015 if (initcall_run_list(init_sequence_f_r))
1016 hang();
1017
1018 /*
1019 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1020 * Transfer execution from Flash to RAM by calculating the address
1021 * of the in-RAM copy of board_init_r() and calling it
1022 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +03001023 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +00001024
1025 /* NOTREACHED - board_init_r() does not return */
1026 hang();
1027}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001028#endif /* CONFIG_X86 */
1029
1030#ifndef CONFIG_X86
Simon Glass74d01862015-02-07 11:51:34 -07001031ulong board_init_f_mem(ulong top)
1032{
1033 /* Leave space for the stack we are running with now */
1034 top -= 0x40;
1035
1036 top -= sizeof(struct global_data);
1037 top = ALIGN(top, 16);
1038 gd = (struct global_data *)top;
1039 memset((void *)gd, '\0', sizeof(*gd));
1040
1041#ifdef CONFIG_SYS_MALLOC_F_LEN
1042 top -= CONFIG_SYS_MALLOC_F_LEN;
1043 gd->malloc_base = top;
1044#endif
1045
1046 return top;
1047}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +03001048#endif /* !CONFIG_X86 */