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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 20286cdff766d64dc718a9d855b049580dfeb3cc / . / arch / mips / Kconfig
blob: 6acd1f4a79fd6cf0bc6e35d7cc22b4b7c98e2163 [file] [log] [blame]
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]1menu "MIPS architecture"
2 depends on MIPS
3
4config SYS_ARCH
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]5 default "mips"
6
Daniel Schwierzeckb9863b62014-10-26 14:14:07 +0100[diff] [blame]7config SYS_CPU
Paul Burton20286cd2016-05-16 10:52:11 +0100[diff] [blame^]8 default "mips32" if CPU_MIPS32
9 default "mips64" if CPU_MIPS64
Daniel Schwierzeckb9863b62014-10-26 14:14:07 +0100[diff] [blame]10
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]11choice
12 prompt "Target select"
Joe Hershbergera26cd042015-05-12 14:46:23 -0500[diff] [blame]13 optional
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]14
15config TARGET_QEMU_MIPS
16 bool "Support qemu-mips"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]17 select SUPPORTS_BIG_ENDIAN
18 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]19 select SUPPORTS_CPU_MIPS32_R1
20 select SUPPORTS_CPU_MIPS32_R2
Daniel Schwierzeckaa45f752014-10-26 14:14:07 +0100[diff] [blame]21 select SUPPORTS_CPU_MIPS64_R1
22 select SUPPORTS_CPU_MIPS64_R2
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]23
24config TARGET_MALTA
25 bool "Support malta"
Paul Burton05e34252016-01-29 13:54:52 +0000[diff] [blame]26 select DYNAMIC_IO_PORT_BASE
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]27 select SUPPORTS_BIG_ENDIAN
28 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]29 select SUPPORTS_CPU_MIPS32_R1
30 select SUPPORTS_CPU_MIPS32_R2
Daniel Schwierzeck9d638ee2015-01-18 22:00:18 +0100[diff] [blame]31 select SWAP_IO_SPACE
Daniel Schwierzeckf53830e2016-01-09 17:32:50 +0100[diff] [blame]32 select MIPS_L1_CACHE_SHIFT_6
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]33
34config TARGET_VCT
35 bool "Support vct"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]36 select SUPPORTS_BIG_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]37 select SUPPORTS_CPU_MIPS32_R1
38 select SUPPORTS_CPU_MIPS32_R2
Paul Burtondd7c7202015-01-29 01:28:02 +0000[diff] [blame]39 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]40
41config TARGET_DBAU1X00
42 bool "Support dbau1x00"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]43 select SUPPORTS_BIG_ENDIAN
44 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]45 select SUPPORTS_CPU_MIPS32_R1
46 select SUPPORTS_CPU_MIPS32_R2
Paul Burtondd7c7202015-01-29 01:28:02 +0000[diff] [blame]47 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Daniel Schwierzeck0315a282015-12-26 19:55:37 +0100[diff] [blame]48 select MIPS_TUNE_4KC
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]49
50config TARGET_PB1X00
51 bool "Support pb1x00"
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]52 select SUPPORTS_LITTLE_ENDIAN
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]53 select SUPPORTS_CPU_MIPS32_R1
54 select SUPPORTS_CPU_MIPS32_R2
Paul Burtondd7c7202015-01-29 01:28:02 +0000[diff] [blame]55 select SYS_MIPS_CACHE_INIT_RAM_LOAD
Daniel Schwierzeck0315a282015-12-26 19:55:37 +0100[diff] [blame]56 select MIPS_TUNE_4KC
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]57
Wills Wang1d3d0f12016-03-16 16:59:52 +0800[diff] [blame]58config ARCH_ATH79
59 bool "Support QCA/Atheros ath79"
60 select OF_CONTROL
61 select DM
62
Purna Chandra Mandal32c1a6e2016-01-28 15:30:10 +0530[diff] [blame]63config MACH_PIC32
64 bool "Support Microchip PIC32"
65 select OF_CONTROL
66 select DM
67
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]68endchoice
69
70source "board/dbau1x00/Kconfig"
71source "board/imgtec/malta/Kconfig"
72source "board/micronas/vct/Kconfig"
73source "board/pb1x00/Kconfig"
74source "board/qemu-mips/Kconfig"
Wills Wang1d3d0f12016-03-16 16:59:52 +0800[diff] [blame]75source "arch/mips/mach-ath79/Kconfig"
Purna Chandra Mandal32c1a6e2016-01-28 15:30:10 +0530[diff] [blame]76source "arch/mips/mach-pic32/Kconfig"
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]77
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]78if MIPS
79
80choice
81 prompt "Endianness selection"
82 help
83 Some MIPS boards can be configured for either little or big endian
84 byte order. These modes require different U-Boot images. In general there
85 is one preferred byteorder for a particular system but some systems are
86 just as commonly used in the one or the other endianness.
87
88config SYS_BIG_ENDIAN
89 bool "Big endian"
90 depends on SUPPORTS_BIG_ENDIAN
91
92config SYS_LITTLE_ENDIAN
93 bool "Little endian"
94 depends on SUPPORTS_LITTLE_ENDIAN
95
96endchoice
97
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]98choice
99 prompt "CPU selection"
100 default CPU_MIPS32_R2
101
102config CPU_MIPS32_R1
103 bool "MIPS32 Release 1"
104 depends on SUPPORTS_CPU_MIPS32_R1
105 select 32BIT
106 help
107 Choose this option to build an U-Boot for release 1 or later of the
108 MIPS32 architecture.
109
110config CPU_MIPS32_R2
111 bool "MIPS32 Release 2"
112 depends on SUPPORTS_CPU_MIPS32_R2
113 select 32BIT
114 help
115 Choose this option to build an U-Boot for release 2 or later of the
116 MIPS32 architecture.
117
118config CPU_MIPS64_R1
119 bool "MIPS64 Release 1"
120 depends on SUPPORTS_CPU_MIPS64_R1
121 select 64BIT
122 help
123 Choose this option to build a kernel for release 1 or later of the
124 MIPS64 architecture.
125
126config CPU_MIPS64_R2
127 bool "MIPS64 Release 2"
128 depends on SUPPORTS_CPU_MIPS64_R2
129 select 64BIT
130 help
131 Choose this option to build a kernel for release 2 or later of the
132 MIPS64 architecture.
133
134endchoice
135
Daniel Schwierzeck25fc6642015-01-14 21:44:13 +0100[diff] [blame]136menu "OS boot interface"
137
138config MIPS_BOOT_CMDLINE_LEGACY
139 bool "Hand over legacy command line to Linux kernel"
140 default y
141 help
142 Enable this option if you want U-Boot to hand over the Yamon-style
143 command line to the kernel. All bootargs will be prepared as argc/argv
144 compatible list. The argument count (argc) is stored in register $a0.
145 The address of the argument list (argv) is stored in register $a1.
146
Daniel Schwierzeckca65e582015-01-14 21:44:13 +0100[diff] [blame]147config MIPS_BOOT_ENV_LEGACY
148 bool "Hand over legacy environment to Linux kernel"
149 default y
150 help
151 Enable this option if you want U-Boot to hand over the Yamon-style
152 environment to the kernel. Information like memory size, initrd
153 address and size will be prepared as zero-terminated key/value list.
Robert P. J. Day1cc0a9f2016-05-04 04:47:31 -0400[diff] [blame]154 The address of the environment is stored in register $a2.
Daniel Schwierzeckca65e582015-01-14 21:44:13 +0100[diff] [blame]155
Daniel Schwierzeck5002d8c2015-01-14 21:44:13 +0100[diff] [blame]156config MIPS_BOOT_FDT
Daniel Schwierzeck90b1c9f2015-02-22 16:58:30 +0100[diff] [blame]157 bool "Hand over a flattened device tree to Linux kernel"
Daniel Schwierzeck5002d8c2015-01-14 21:44:13 +0100[diff] [blame]158 default n
159 help
160 Enable this option if you want U-Boot to hand over a flattened
Daniel Schwierzeck90b1c9f2015-02-22 16:58:30 +0100[diff] [blame]161 device tree to the kernel. According to UHI register $a0 will be set
162 to -2 and the FDT address is stored in $a1.
Daniel Schwierzeck5002d8c2015-01-14 21:44:13 +0100[diff] [blame]163
Daniel Schwierzeck25fc6642015-01-14 21:44:13 +0100[diff] [blame]164endmenu
165
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]166config SUPPORTS_BIG_ENDIAN
167 bool
168
169config SUPPORTS_LITTLE_ENDIAN
170 bool
171
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]172config SUPPORTS_CPU_MIPS32_R1
173 bool
174
175config SUPPORTS_CPU_MIPS32_R2
176 bool
177
178config SUPPORTS_CPU_MIPS64_R1
179 bool
180
181config SUPPORTS_CPU_MIPS64_R2
182 bool
183
Daniel Schwierzeckc57dafb2015-01-18 21:59:35 +0100[diff] [blame]184config CPU_MIPS32
185 bool
186 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
187
188config CPU_MIPS64
189 bool
190 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
191
Daniel Schwierzeck0315a282015-12-26 19:55:37 +0100[diff] [blame]192config MIPS_TUNE_4KC
193 bool
194
195config MIPS_TUNE_14KC
196 bool
197
198config MIPS_TUNE_24KC
199 bool
200
Marek Vasut0a0a9582016-05-06 20:10:33 +0200[diff] [blame]201config MIPS_TUNE_74KC
202 bool
203
Daniel Schwierzeck02611cb2014-10-26 14:14:07 +0100[diff] [blame]204config 32BIT
205 bool
206
207config 64BIT
208 bool
209
Daniel Schwierzeck9d638ee2015-01-18 22:00:18 +0100[diff] [blame]210config SWAP_IO_SPACE
211 bool
212
Paul Burtondd7c7202015-01-29 01:28:02 +0000[diff] [blame]213config SYS_MIPS_CACHE_INIT_RAM_LOAD
214 bool
215
Daniel Schwierzeckf53830e2016-01-09 17:32:50 +0100[diff] [blame]216config MIPS_L1_CACHE_SHIFT_4
217 bool
218
219config MIPS_L1_CACHE_SHIFT_5
220 bool
221
222config MIPS_L1_CACHE_SHIFT_6
223 bool
224
225config MIPS_L1_CACHE_SHIFT_7
226 bool
227
228config MIPS_L1_CACHE_SHIFT
229 int
230 default "7" if MIPS_L1_CACHE_SHIFT_7
231 default "6" if MIPS_L1_CACHE_SHIFT_6
232 default "5" if MIPS_L1_CACHE_SHIFT_5
233 default "4" if MIPS_L1_CACHE_SHIFT_4
234 default "5"
235
Paul Burton05e34252016-01-29 13:54:52 +0000[diff] [blame]236config DYNAMIC_IO_PORT_BASE
237 bool
238
Daniel Schwierzeck0e1dc342014-10-26 14:14:07 +0100[diff] [blame]239endif
240
Masahiro Yamadadd840582014-07-30 14:08:14 +0900[diff] [blame]241endmenu