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Mike Frysinger0c31ddf2008-10-12 21:30:48 -04001/*
2 * U-boot - Configuration file for BF526 EZBrd board
3 */
4
5#ifndef __CONFIG_BF526_EZBRD_H__
6#define __CONFIG_BF526_EZBRD_H__
7
Mike Frysingerf348ab82009-04-24 17:22:40 -04008#include <asm/config-pre.h>
Mike Frysinger0c31ddf2008-10-12 21:30:48 -04009
10
11/*
12 * Processor Settings
13 */
Mike Frysingerfbcf8e82010-12-23 14:58:37 -050014#define CONFIG_BFIN_CPU bf526-0.0
Mike Frysinger0c31ddf2008-10-12 21:30:48 -040015#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
16
17
18/*
19 * Clock Settings
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 */
23/* CONFIG_CLKIN_HZ is any value in Hz */
24#define CONFIG_CLKIN_HZ 25000000
25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26/* 1 = CLKIN / 2 */
27#define CONFIG_CLKIN_HALF 0
28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29/* 1 = bypass PLL */
30#define CONFIG_PLL_BYPASS 0
31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32/* Values can range from 0-63 (where 0 means 64) */
33#define CONFIG_VCO_MULT 16
34/* CCLK_DIV controls the core clock divider */
35/* Values can be 1, 2, 4, or 8 ONLY */
36#define CONFIG_CCLK_DIV 1
37/* SCLK_DIV controls the system clock divider */
38/* Values can range from 1-15 */
39#define CONFIG_SCLK_DIV 5
40
41
42/*
43 * Memory Settings
44 */
45/* This board has a 64meg MT48H32M16 */
46#define CONFIG_MEM_ADD_WDTH 10
47#define CONFIG_MEM_SIZE 64
48
49#define CONFIG_EBIU_SDRRC_VAL 0x0267
50#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_2 | PASR_ALL | TRAS_6 | TRP_4 | TRCD_2 | TWR_2 | PSS)
51
52#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL)
53#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL)
54#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL)
55
Mike Frysinger301e66a2010-09-21 19:47:27 -040056#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
Mike Frysinger0c31ddf2008-10-12 21:30:48 -040057#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
58
59
60/*
61 * NAND Settings
62 * (can't be used same time as ethernet)
63 */
64#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
Mike Frysinger301e66a2010-09-21 19:47:27 -040065# define CONFIG_BFIN_NFC
66# define CONFIG_BFIN_NFC_BOOTROM_ECC
Mike Frysinger0c31ddf2008-10-12 21:30:48 -040067#endif
68#ifdef CONFIG_BFIN_NFC
69#define CONFIG_BFIN_NFC_CTL_VAL 0x0033
70#define CONFIG_DRIVER_NAND_BFIN
71#define CONFIG_SYS_NAND_BASE 0 /* not actually used */
72#define CONFIG_SYS_MAX_NAND_DEVICE 1
Mike Frysinger0c31ddf2008-10-12 21:30:48 -040073#define CONFIG_CMD_NAND
74#endif
75
76
77/*
78 * Network Settings
79 */
80#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \
81 !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC)
82#define ADI_CMDS_NETWORK 1
83#define CONFIG_BFIN_MAC
84#define CONFIG_RMII
85#define CONFIG_NETCONSOLE 1
Mike Frysinger0c31ddf2008-10-12 21:30:48 -040086#endif
87#define CONFIG_HOSTNAME bf526-ezbrd
88/* Uncomment next line to use fixed MAC address */
89/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
Masahiro Yamadac42f56d2014-04-18 19:09:49 +090090#define CONFIG_LIB_RAND
Mike Frysinger0c31ddf2008-10-12 21:30:48 -040091
92/*
93 * Flash Settings
94 */
95#define CONFIG_FLASH_CFI_DRIVER
96#define CONFIG_SYS_FLASH_BASE 0x20000000
97#define CONFIG_SYS_FLASH_CFI
98#define CONFIG_SYS_FLASH_PROTECTION
99#define CONFIG_SYS_MAX_FLASH_BANKS 1
100#define CONFIG_SYS_MAX_FLASH_SECT 71
101
102
103/*
104 * SPI Settings
105 */
106#define CONFIG_BFIN_SPI
107#define CONFIG_ENV_SPI_MAX_HZ 30000000
Mike Frysingerafac8b02009-06-14 22:29:35 -0400108#define CONFIG_SF_DEFAULT_SPEED 30000000
Mike Frysinger0c31ddf2008-10-12 21:30:48 -0400109#define CONFIG_SPI_FLASH
110#define CONFIG_SPI_FLASH_SST
111
112
113/*
114 * Env Storage Settings
115 */
116#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
117#define CONFIG_ENV_IS_IN_SPI_FLASH
118#define CONFIG_ENV_OFFSET 0x4000
119#define CONFIG_ENV_SIZE 0x2000
120#define CONFIG_ENV_SECT_SIZE 0x2000
121#else
122#define CONFIG_ENV_IS_IN_FLASH
123#define CONFIG_ENV_OFFSET 0x4000
124#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
125#define CONFIG_ENV_SIZE 0x2000
126#define CONFIG_ENV_SECT_SIZE 0x2000
127#endif
Mike Frysinger76d82182009-07-21 22:17:36 -0400128#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
Mike Frysinger0c31ddf2008-10-12 21:30:48 -0400129
130
131/*
132 * I2C Settings
133 */
134#define CONFIG_BFIN_TWI_I2C 1
135#define CONFIG_HARD_I2C 1
Mike Frysinger0c31ddf2008-10-12 21:30:48 -0400136
137
138/*
139 * USB Settings
140 */
141#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__)
142#define CONFIG_USB
143#define CONFIG_MUSB_HCD
144#define CONFIG_USB_BLACKFIN
145#define CONFIG_USB_STORAGE
146#define CONFIG_MUSB_TIMEOUT 100000
147#endif
148
149
150/*
151 * Misc Settings
152 */
153#define CONFIG_MISC_INIT_R
154#define CONFIG_RTC_BFIN
155#define CONFIG_UART_CONSOLE 1
156
157/* define to enable run status via led */
158/* #define CONFIG_STATUS_LED */
159#ifdef CONFIG_STATUS_LED
Mike Frysingera84774f2010-06-02 05:12:11 -0400160#define CONFIG_GPIO_LED
Mike Frysinger0c31ddf2008-10-12 21:30:48 -0400161#define CONFIG_BOARD_SPECIFIC_LED
Mike Frysinger0c31ddf2008-10-12 21:30:48 -0400162/* use LED0 to indicate booting/alive */
163#define STATUS_LED_BOOT 0
Mike Frysingera84774f2010-06-02 05:12:11 -0400164#define STATUS_LED_BIT GPIO_PF8
Mike Frysinger0c31ddf2008-10-12 21:30:48 -0400165#define STATUS_LED_STATE STATUS_LED_ON
166#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 4)
167/* use LED1 to indicate crash */
168#define STATUS_LED_CRASH 1
Mike Frysingera84774f2010-06-02 05:12:11 -0400169#define STATUS_LED_BIT1 GPIO_PG11
Mike Frysinger0c31ddf2008-10-12 21:30:48 -0400170#define STATUS_LED_STATE1 STATUS_LED_ON
171#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
Mike Frysingera84774f2010-06-02 05:12:11 -0400172/* #define STATUS_LED_BIT2 GPIO_PG12 */
Mike Frysinger0c31ddf2008-10-12 21:30:48 -0400173#endif
174
175
176/*
177 * Pull in common ADI header for remaining command/environment setup
178 */
179#include <configs/bfin_adi_common.h>
180
Mike Frysinger0c31ddf2008-10-12 21:30:48 -0400181#endif