Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 20cc70a84f5d8bb0795f09daccbf06f6a846d14b / . / configs / P2020RDB-PC_36BIT_SDCARD_defconfig
blob: 458ab5883f239b5710ed6adc62c78bb2633ed3bf [file] [log] [blame]
Masahiro Yamada252ed872015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_PPC=y
Simon Glass98463902022-10-20 18:22:39 -0600[diff] [blame]2CONFIG_TEXT_BASE=0x11000000
Tom Rini98021542021-11-01 12:19:22 +0000[diff] [blame]3CONFIG_SYS_MALLOC_LEN=0x100000
Simon Glass77d2f7f2016-09-12 23:18:41 -0600[diff] [blame]4CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glasscc4288e2016-09-12 23:18:43 -0600[diff] [blame]5CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rinia09fea12019-11-18 20:02:10 -0500[diff] [blame]6CONFIG_ENV_SIZE=0x2000
7CONFIG_ENV_OFFSET=0x0
Tom Rini2bba7802021-06-28 10:17:29 -0400[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
Pali Rohárc0f47562022-06-16 14:19:44 +0200[diff] [blame]9CONFIG_SPL_TEXT_BASE=0xf8f80000
Simon Glass103c5f12021-08-08 12:20:09 -0600[diff] [blame]10CONFIG_SPL_MMC=y
Simon Glass2a736062021-08-08 12:20:12 -0600[diff] [blame]11CONFIG_SPL_SERIAL=y
Tom Rinic9542ea2018-04-07 20:27:54 -0400[diff] [blame]12CONFIG_SPL=y
Masahiro Yamada252ed872015-03-12 13:24:39 +0900[diff] [blame]13CONFIG_MPC85xx=y
Simon Glass230ecd72017-05-17 03:25:15 -0600[diff] [blame]14# CONFIG_CMD_ERRATA is not set
York Sun8435aa72016-11-17 14:19:18 -0800[diff] [blame]15CONFIG_TARGET_P2020RDB=y
Tom Rinifbc36212022-06-15 12:03:45 -0400[diff] [blame]16CONFIG_ENABLE_36BIT_PHYS=y
Tom Rinide47ff52022-06-10 22:59:37 -0400[diff] [blame]17CONFIG_SYS_MPC85XX_NO_RESETVEC=y
18CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
Tom Rini3dc29872022-06-20 08:07:45 -0400[diff] [blame]19CONFIG_PCIE1=y
20CONFIG_PCIE2=y
Masahiro Yamadabb6b1422016-07-25 19:56:03 +0900[diff] [blame]21CONFIG_PHYS_64BIT=y
Tom Rini54c5c2b2022-01-24 21:08:41 +0000[diff] [blame]22CONFIG_MP=y
Simon Glass73223f02016-02-22 22:55:43 -0700[diff] [blame]23CONFIG_FIT=y
24CONFIG_FIT_VERBOSE=y
25CONFIG_OF_BOARD_SETUP=y
26CONFIG_OF_STDOUT_VIA_ALIAS=y
Pali Rohárc0f47562022-06-16 14:19:44 +0200[diff] [blame]27CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000
Tom Rinid8e84612022-06-20 08:07:42 -0400[diff] [blame]28CONFIG_FSL_FIXED_MMC_LOCATION=y
Heiko Schocherbb597c02016-06-07 08:31:14 +0200[diff] [blame]29CONFIG_BOOTDELAY=10
Tom Rini970bf862021-11-10 09:11:40 -0500[diff] [blame]30CONFIG_USE_BOOTCOMMAND=y
31CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
Simon Glassa5d67542017-01-23 13:31:20 -0700[diff] [blame]32CONFIG_BOARD_EARLY_INIT_F=y
Mario Six02ddc142018-03-28 14:38:15 +0200[diff] [blame]33CONFIG_BOARD_EARLY_INIT_R=y
Tom Rini0817daa2020-10-09 12:22:06 -0400[diff] [blame]34# CONFIG_MISC_INIT_R is not set
Tom Rini75670c82018-02-06 12:15:38 -0500[diff] [blame]35# CONFIG_SPL_FRAMEWORK is not set
Tom Rinica8a3292022-05-16 17:20:26 -0400[diff] [blame]36CONFIG_SPL_MAX_SIZE=0x20000
Tom Rinidb4080d2019-06-01 14:20:25 -0400[diff] [blame]37CONFIG_SPL_MMC_BOOT=y
Tom Rini6074a532022-05-21 11:26:27 -0400[diff] [blame]38CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
Tom Rinib35316f2022-05-13 12:26:35 -0400[diff] [blame]39CONFIG_SPL_FLUSH_IMAGE=y
Tom Rini7f2c91e2022-05-27 16:19:05 -0400[diff] [blame]40CONFIG_SPL_GD_ADDR=0xf8f9c000
Tom Rini55cf8602022-05-26 16:59:30 -0400[diff] [blame]41CONFIG_SPL_RELOC_STACK=0xf8f9d000
42CONFIG_SPL_RELOC_MALLOC=y
43CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000
44CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
Tom Rini8728c972017-03-13 13:48:42 -0400[diff] [blame]45CONFIG_SPL_ENV_SUPPORT=y
Simon Glass975e7cf2021-07-10 21:14:36 -0600[diff] [blame]46CONFIG_SPL_I2C=y
Simon Glass6f004ad2021-08-08 12:20:16 -0600[diff] [blame]47CONFIG_SPL_MPC8XXX_INIT_DDR=y
Tom Rinia62b7f02022-05-27 17:13:52 -0400[diff] [blame]48CONFIG_SPL_TARGET="u-boot-with-spl.bin"
Tom Riniadad96e2016-04-21 21:37:19 -0400[diff] [blame]49CONFIG_HUSH_PARSER=y
Adam Fordd021e942018-02-06 07:58:59 -0600[diff] [blame]50# CONFIG_AUTO_COMPLETE is not set
Tom Rinid0ee7f22022-05-11 17:38:09 -0400[diff] [blame]51CONFIG_SYS_PBSIZE=276
Tuomas Tynkkynenad12dc12017-10-08 21:48:01 +0300[diff] [blame]52CONFIG_CMD_IMLS=y
Tom Rini88cd7d02021-08-17 17:59:45 -0400[diff] [blame]53CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
54CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]55CONFIG_CMD_I2C=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]56CONFIG_CMD_MMC=y
Simon Glass6500ec72017-08-04 16:34:34 -0600[diff] [blame]57CONFIG_CMD_PCI=y
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]58CONFIG_CMD_USB=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]59CONFIG_CMD_MII=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]60CONFIG_CMD_PING=y
Simon Glass551c3932017-05-17 03:25:25 -0600[diff] [blame]61# CONFIG_CMD_HASH is not set
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]62CONFIG_CMD_EXT2=y
63CONFIG_CMD_FAT=y
Tom Rinid56b4b12017-07-22 18:36:16 -0400[diff] [blame]64CONFIG_CMD_MTDPARTS=y
Tom Rini43ede0b2017-10-22 17:55:07 -0400[diff] [blame]65CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor"
66CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)"
Hou Zhiqiangcaa75692019-08-20 09:35:29 +0000[diff] [blame]67CONFIG_OF_CONTROL=y
Adam Forde91907a2020-07-03 06:48:56 -0500[diff] [blame]68CONFIG_ENV_OVERWRITE=y
Tom Rini5dc4dfd2017-08-28 07:16:32 -0400[diff] [blame]69CONFIG_ENV_IS_IN_MMC=y
Tom Rini8d8ee472019-11-12 22:46:36 -0500[diff] [blame]70CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinifdfb17b2022-02-25 11:19:48 -0500[diff] [blame]71CONFIG_USE_BOOTFILE=y
72CONFIG_BOOTFILE="uImage"
Tom Rini0e14cdf2022-03-11 09:12:07 -0500[diff] [blame]73CONFIG_USE_ETHPRIME=y
74CONFIG_ETHPRIME="eTSEC1"
Tom Riniaca1f672022-06-10 22:59:28 -0400[diff] [blame]75CONFIG_LBA48=y
Tom Riniefb5dab72021-08-21 13:50:17 -0400[diff] [blame]76CONFIG_DDR_CLK_FREQ=66666666
Tom Rinibca45092022-06-15 12:03:54 -0400[diff] [blame]77CONFIG_SYS_SPD_BUS_NUM=1
Tom Rinif9147d62022-02-25 11:19:53 -0500[diff] [blame]78CONFIG_CHIP_SELECTS_PER_CTRL=1
Tom Rinic24e8e22022-06-15 12:03:55 -0400[diff] [blame]79CONFIG_SYS_DDR_RAW_TIMING=y
Tom Rinic7fad782021-11-13 18:10:40 -0500[diff] [blame]80CONFIG_SYS_BR0_PRELIM_BOOL=y
81CONFIG_SYS_BR0_PRELIM=0xEF001001
82CONFIG_SYS_OR0_PRELIM=0xFC000FF7
83CONFIG_SYS_BR2_PRELIM_BOOL=y
84CONFIG_SYS_BR2_PRELIM=0xFFB00801
85CONFIG_SYS_OR2_PRELIM=0xFFFE09FF
86CONFIG_SYS_BR3_PRELIM_BOOL=y
87CONFIG_SYS_BR3_PRELIM=0xFFA00801
88CONFIG_SYS_OR3_PRELIM=0xFFF009F7
Tom Rini90f08192022-05-21 14:44:28 -0400[diff] [blame]89CONFIG_SPL_COMMON_INIT_DDR=y
Tom Rinib11dc332020-05-08 09:08:39 -0400[diff] [blame]90CONFIG_DM_I2C=y
Tom Rini55dabcc2021-08-18 23:12:24 -0400[diff] [blame]91CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinifc8d3b92021-08-18 23:12:37 -0400[diff] [blame]92CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rini6d5d0c92021-08-18 23:12:35 -0400[diff] [blame]93CONFIG_SYS_I2C_FSL=y
94CONFIG_SYS_FSL_I2C_OFFSET=0x3000
95CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
96CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
Tom Rini88cd7d02021-08-17 17:59:45 -0400[diff] [blame]97CONFIG_SYS_I2C_EEPROM_ADDR=0x52
Mario Six07dea2e2018-03-28 14:38:19 +0200[diff] [blame]98CONFIG_FSL_ESDHC=y
Tom Rini0cfccb52019-12-04 17:18:38 -0500[diff] [blame]99CONFIG_MTD=y
Adam Ford2fe88d42018-10-14 15:10:50 -0500[diff] [blame]100CONFIG_MTD_NOR_FLASH=y
101CONFIG_FLASH_CFI_DRIVER=y
102CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
Tom Rinib72713d2022-07-23 13:04:55 -0400[diff] [blame]103CONFIG_SYS_FLASH_EMPTY_INFO=y
Adam Ford2fe88d42018-10-14 15:10:50 -0500[diff] [blame]104CONFIG_FLASH_CFI_MTD=y
105CONFIG_SYS_FLASH_CFI=y
Tom Rini1107dad2022-07-23 13:05:05 -0400[diff] [blame]106CONFIG_SYS_FLASH_QUIET_TEST=y
Tom Rini1db251b2022-07-23 13:05:04 -0400[diff] [blame]107CONFIG_SYS_MAX_FLASH_SECT=128
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]108CONFIG_DM_SPI_FLASH=y
Patrick Delaunay14453fb2019-02-27 15:20:36 +0100[diff] [blame]109CONFIG_SF_DEFAULT_SPEED=10000000
Bin Meng68d53422015-11-25 05:34:54 -0800[diff] [blame]110CONFIG_SPI_FLASH_SPANSION=y
Tom Rini306881a2020-04-24 15:35:53 -0400[diff] [blame]111CONFIG_PHY_ATHEROS=y
112CONFIG_PHY_BROADCOM=y
113CONFIG_PHY_DAVICOM=y
114CONFIG_PHY_LXT=y
Mario Sixa8ca5c82018-04-27 14:52:21 +0200[diff] [blame]115CONFIG_PHY_MARVELL=y
Tom Rini306881a2020-04-24 15:35:53 -0400[diff] [blame]116CONFIG_PHY_NATSEMI=y
117CONFIG_PHY_REALTEK=y
118CONFIG_PHY_SMSC=y
119CONFIG_PHY_VITESSE=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]120CONFIG_PHY_FIXED=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]121CONFIG_DM_MDIO=y
Tom Rini19893742017-08-07 22:00:34 -0400[diff] [blame]122CONFIG_PHY_GIGE=y
Simon Glassa77fda12015-08-19 09:33:43 -0600[diff] [blame]123CONFIG_E1000=y
Tom Rini665c35a2019-09-23 11:47:37 -0400[diff] [blame]124CONFIG_MII=y
125CONFIG_TSEC_ENET=y
Hou Zhiqiang7eabbf22019-08-27 11:04:18 +0000[diff] [blame]126CONFIG_PCIE_FSL=y
Tom Rinib11dc332020-05-08 09:08:39 -0400[diff] [blame]127CONFIG_DM_RTC=y
Thomas Chou9e390032015-11-19 21:48:14 +0800[diff] [blame]128CONFIG_SYS_NS16550=y
Adam Fordf1b1f772018-04-15 13:51:26 -0400[diff] [blame]129CONFIG_SPI=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]130CONFIG_DM_SPI=y
Bin Menge5d5d442015-11-25 05:34:53 -0800[diff] [blame]131CONFIG_FSL_ESPI=y
Tom Rini645176d2016-09-08 16:31:26 -0400[diff] [blame]132CONFIG_USB=y
Tom Rinif76750d2021-12-11 14:55:51 -0500[diff] [blame]133CONFIG_USB_EHCI_FSL=y
Tom Rinib24550a2020-10-05 13:11:41 -0400[diff] [blame]134CONFIG_USB_STORAGE=y
Marek Szyprowski69be8fd2020-06-03 14:43:40 +0200[diff] [blame]135CONFIG_ADDR_MAP=y