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Michael Schwingen66a43442008-01-16 19:53:23 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * Configuration settings for the AcTux-4 board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29#define CONFIG_IXP425 1
30#define CONFIG_ACTUX4 1
31
32#define CONFIG_DISPLAY_CPUINFO 1
33#define CONFIG_DISPLAY_BOARDINFO 1
34
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020035#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1
Michael Schwingen66a43442008-01-16 19:53:23 +010036#define CONFIG_BAUDRATE 115200
37#define CONFIG_BOOTDELAY 3
38#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
39
40/***************************************************************
41 * U-boot generic defines start here.
42 ***************************************************************/
43#undef CONFIG_USE_IRQ
44
45/* Size of malloc() pool */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020046#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
Michael Schwingen66a43442008-01-16 19:53:23 +010047/* size in bytes reserved for initial data */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020048#define CONFIG_SYS_GBL_DATA_SIZE 128
Michael Schwingen66a43442008-01-16 19:53:23 +010049
50/* allow to overwrite serial and ethaddr */
51#define CONFIG_ENV_OVERWRITE
52
53/* Command line configuration */
54#include <config_cmd_default.h>
55
56#define CONFIG_CMD_ELF
57
58#define CONFIG_BOOTCOMMAND "run boot_flash"
59/* enable passing of ATAGs */
60#define CONFIG_CMDLINE_TAG 1
61#define CONFIG_SETUP_MEMORY_TAGS 1
62#define CONFIG_INITRD_TAG 1
63
64#if defined(CONFIG_CMD_KGDB)
65# define CONFIG_KGDB_BAUDRATE 230400
66/* which serial port to use */
67# define CONFIG_KGDB_SER_INDEX 1
68#endif
69
70/* Miscellaneous configurable options */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_SYS_LONGHELP
72#define CONFIG_SYS_PROMPT "=> "
Michael Schwingen66a43442008-01-16 19:53:23 +010073/* Console I/O Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020074#define CONFIG_SYS_CBSIZE 256
Michael Schwingen66a43442008-01-16 19:53:23 +010075/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
Michael Schwingen66a43442008-01-16 19:53:23 +010077/* max number of command args */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078#define CONFIG_SYS_MAXARGS 16
Michael Schwingen66a43442008-01-16 19:53:23 +010079/* Boot Argument Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020080#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Michael Schwingen66a43442008-01-16 19:53:23 +010081
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_MEMTEST_START 0x00400000
83#define CONFIG_SYS_MEMTEST_END 0x00800000
Michael Schwingen66a43442008-01-16 19:53:23 +010084
85/* everything, incl board info, in Hz */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020086#undef CONFIG_SYS_CLKS_IN_HZ
Michael Schwingen66a43442008-01-16 19:53:23 +010087/* spec says 66.666 MHz, but it appears to be 33 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020088#define CONFIG_SYS_HZ 3333333
Michael Schwingen66a43442008-01-16 19:53:23 +010089
90/* default load address */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020091#define CONFIG_SYS_LOAD_ADDR 0x00010000
Michael Schwingen66a43442008-01-16 19:53:23 +010092
93/* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020094#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
Michael Schwingen66a43442008-01-16 19:53:23 +010095 115200, 230400 }
96#define CONFIG_SERIAL_RTS_ACTIVE 1
97
98/*
99 * Stack sizes
100 * The stack sizes are set up in start.S using the settings below
101 */
102#define CONFIG_STACKSIZE (128*1024) /* regular stack */
103#ifdef CONFIG_USE_IRQ
104# define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
105# define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
106#endif
107
108/* Expansion bus settings */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109#define CONFIG_SYS_EXP_CS0 0xbd113003
Michael Schwingen66a43442008-01-16 19:53:23 +0100110
111/* SDRAM settings */
112#define CONFIG_NR_DRAM_BANKS 1
113#define PHYS_SDRAM_1 0x00000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200114#define CONFIG_SYS_DRAM_BASE 0x00000000
Michael Schwingen66a43442008-01-16 19:53:23 +0100115
116/* 32MB SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117#define CONFIG_SYS_SDR_CONFIG 0x18
Michael Schwingen66a43442008-01-16 19:53:23 +0100118#define PHYS_SDRAM_1_SIZE 0x02000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
120#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
121#define CONFIG_SYS_DRAM_SIZE 0x02000000
Michael Schwingen66a43442008-01-16 19:53:23 +0100122
123/* FLASH organization */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124#define CONFIG_SYS_MAX_FLASH_BANKS 2
Michael Schwingen66a43442008-01-16 19:53:23 +0100125/* max # of sectors per chip */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126#define CONFIG_SYS_MAX_FLASH_SECT 70
Michael Schwingen66a43442008-01-16 19:53:23 +0100127#define PHYS_FLASH_1 0x50000000
128#define PHYS_FLASH_2 0x51000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
Michael Schwingen66a43442008-01-16 19:53:23 +0100130
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
132#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
133#define CONFIG_SYS_MONITOR_LEN (252 << 10)
Michael Schwingen66a43442008-01-16 19:53:23 +0100134
135/* Use common CFI driver */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200137#define CONFIG_FLASH_CFI_DRIVER
Michael Schwingen66a43442008-01-16 19:53:23 +0100138/* board provides its own flash_init code */
139#define CONFIG_FLASH_CFI_LEGACY 1
140/* no byte writes on IXP4xx */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
Michael Schwingen66a43442008-01-16 19:53:23 +0100142/* SST 39VF020 etc. support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#define CONFIG_SYS_FLASH_LEGACY_256Kx8 1
Michael Schwingen66a43442008-01-16 19:53:23 +0100144
145/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#define CONFIG_SYS_FLASH_EMPTY_INFO
Michael Schwingen66a43442008-01-16 19:53:23 +0100147
148/* Ethernet */
149
150/* include IXP4xx NPE support */
151#define CONFIG_IXP4XX_NPE 1
152/* use separate flash sector with ucode images */
153#define CONFIG_IXP4XX_NPE_EXT_UCODE_BASE 0x51000000
154
155#define CONFIG_NET_MULTI 1
156/* NPE0 PHY address */
157#define CONFIG_PHY_ADDR 0x1C
158/* MII PHY management */
159#define CONFIG_MII 1
160/* Number of ethernet rx buffers & descriptors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200161#define CONFIG_SYS_RX_ETH_BUFFER 16
Michael Schwingen66a43442008-01-16 19:53:23 +0100162
163#define CONFIG_CMD_DHCP
164#define CONFIG_CMD_NET
165#define CONFIG_CMD_MII
166#define CONFIG_CMD_PING
167#undef CONFIG_CMD_NFS
168
169/* BOOTP options */
170#define CONFIG_BOOTP_BOOTFILESIZE
171#define CONFIG_BOOTP_BOOTPATH
172#define CONFIG_BOOTP_GATEWAY
173#define CONFIG_BOOTP_HOSTNAME
174
175/* Cache Configuration */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176#define CONFIG_SYS_CACHELINE_SIZE 32
Michael Schwingen66a43442008-01-16 19:53:23 +0100177
178/* environment organization: one complete 4k flash sector */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200179#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200180#define CONFIG_ENV_SIZE 0x1000
181#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000)
Michael Schwingen66a43442008-01-16 19:53:23 +0100182
183#define CONFIG_EXTRA_ENV_SETTINGS \
184 "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \
185 "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \
186 "kerneladdr=51020000\0" \
187 "rootaddr=51160000\0" \
188 "loadaddr=10000\0" \
189 "updateboot_ser=mw.b 10000 ff 40000;" \
190 " loady ${loadaddr};" \
191 " run eraseboot writeboot\0" \
192 "updateboot_net=mw.b 10000 ff 40000;" \
193 " tftp ${loadaddr} u-boot.bin;" \
194 " run eraseboot writeboot\0" \
195 "eraseboot=protect off 50000000 5003efff;" \
196 " erase 50000000 +${filesize}\0" \
197 "writeboot=cp.b 10000 50000000 ${filesize}\0" \
198 "eraseenv=protect off 5003f000 5003ffff;" \
199 " erase 5003f000 5003ffff\0" \
200 "updateroot=tftp ${loadaddr} ${rootfile};" \
201 " era ${rootaddr} +${filesize};" \
202 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
203 "updatekern=tftp ${loadaddr} ${kernelfile};" \
204 " era ${kerneladdr} +${filesize};" \
205 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
206 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \
207 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
208 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \
209 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
210 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
211 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
212 "boot_flash=run flashargs addtty addeth;" \
213 " bootm ${kerneladdr}\0" \
214 "boot_net=run netargs addtty addeth;" \
215 " tftpboot ${loadaddr} ${kernelfile};" \
216 " bootm\0"
217
218#endif /* __CONFIG_H */