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Stelian Popd99a8ff2008-05-08 20:52:22 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9261EK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Stelian Pop820f2a92008-05-08 14:52:30 +020031#define AT91_CPU_NAME "AT91SAM9261"
Stelian Popad229a42008-11-07 13:55:14 +010032#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
33#define AT91_MASTER_CLOCK 100000000 /* peripheral */
34#define AT91_CPU_CLOCK 200000000 /* cpu */
35#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
Stelian Popd99a8ff2008-05-08 20:52:22 +020036
37#define AT91_SLOW_CLOCK 32768 /* slow clock */
38
39#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
40#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
41#define CONFIG_AT91SAM9261EK 1 /* on an AT91SAM9261EK Board */
42#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
43
44#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
45#define CONFIG_SETUP_MEMORY_TAGS 1
46#define CONFIG_INITRD_TAG 1
47
48#define CONFIG_SKIP_LOWLEVEL_INIT
49#define CONFIG_SKIP_RELOCATE_UBOOT
50
51/*
52 * Hardware drivers
53 */
54#define CONFIG_ATMEL_USART 1
55#undef CONFIG_USART0
56#undef CONFIG_USART1
57#undef CONFIG_USART2
58#define CONFIG_USART3 1 /* USART 3 is DBGU */
59
Stelian Pop820f2a92008-05-08 14:52:30 +020060/* LCD */
61#define CONFIG_LCD 1
62#define LCD_BPP LCD_COLOR8
63#define CONFIG_LCD_LOGO 1
64#undef LCD_TEST_PATTERN
65#define CONFIG_LCD_INFO 1
66#define CONFIG_LCD_INFO_BELOW_LOGO 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Pop820f2a92008-05-08 14:52:30 +020068#define CONFIG_ATMEL_LCD 1
69#define CONFIG_ATMEL_LCD_BGR555 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020070#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Stelian Pop820f2a92008-05-08 14:52:30 +020071
Stelian Popd99a8ff2008-05-08 20:52:22 +020072#define CONFIG_BOOTDELAY 3
73
Stelian Popd99a8ff2008-05-08 20:52:22 +020074/*
75 * BOOTP options
76 */
77#define CONFIG_BOOTP_BOOTFILESIZE 1
78#define CONFIG_BOOTP_BOOTPATH 1
79#define CONFIG_BOOTP_GATEWAY 1
80#define CONFIG_BOOTP_HOSTNAME 1
81
82/*
83 * Command line configuration.
84 */
85#include <config_cmd_default.h>
86#undef CONFIG_CMD_BDI
87#undef CONFIG_CMD_IMI
88#undef CONFIG_CMD_AUTOSCRIPT
89#undef CONFIG_CMD_FPGA
90#undef CONFIG_CMD_LOADS
91#undef CONFIG_CMD_IMLS
92
93#define CONFIG_CMD_PING 1
94#define CONFIG_CMD_DHCP 1
95#define CONFIG_CMD_NAND 1
96#define CONFIG_CMD_USB 1
97
98/* SDRAM */
99#define CONFIG_NR_DRAM_BANKS 1
100#define PHYS_SDRAM 0x20000000
101#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
102
103/* DataFlash */
104#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200105#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
106#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
107#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
108#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200109#define AT91_SPI_CLK 15000000
110#define DATAFLASH_TCSS (0x1a << 16)
111#define DATAFLASH_TCHS (0x1 << 24)
112
113/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200114#define CONFIG_SYS_MAX_NAND_DEVICE 1
115#define CONFIG_SYS_NAND_BASE 0x40000000
116#define CONFIG_SYS_NAND_DBW_8 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200117
118/* NOR flash - no real flash on this board */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119#define CONFIG_SYS_NO_FLASH 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200120
121/* Ethernet */
122#define CONFIG_DRIVER_DM9000 1
123#define CONFIG_DM9000_BASE 0x30000000
124#define DM9000_IO CONFIG_DM9000_BASE
125#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
126#define CONFIG_DM9000_USE_16BIT 1
127#define CONFIG_NET_RETRY_COUNT 20
128#define CONFIG_RESET_PHY_R 1
129
130/* USB */
131#define CONFIG_USB_OHCI_NEW 1
132#define LITTLEENDIAN 1
133#define CONFIG_DOS_PARTITION 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
135#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
136#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
137#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Stelian Popd99a8ff2008-05-08 20:52:22 +0200138#define CONFIG_USB_STORAGE 1
Stelian Pop3e0cda02008-11-09 00:14:46 +0100139#define CONFIG_CMD_FAT 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200140
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200142
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
144#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Popd99a8ff2008-05-08 20:52:22 +0200145
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
Stelian Popd99a8ff2008-05-08 20:52:22 +0200147
148/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD057c8492008-09-10 22:47:58 +0200149#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100151#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200153#define CONFIG_ENV_SIZE 0x4200
Stelian Popd99a8ff2008-05-08 20:52:22 +0200154#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
155#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
156 "root=/dev/mtdblock0 " \
157 "mtdparts=at91_nand:-(root) " \
158 "rw rootfstype=jffs2"
159
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100160#elif CONFIG_SYS_USE_DATAFLASH_CS3
161
162/* bootstrap + u-boot + env + linux in dataflash on CS3 */
163#define CONFIG_ENV_IS_IN_DATAFLASH 1
164#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
165#define CONFIG_ENV_OFFSET 0x4200
166#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
167#define CONFIG_ENV_SIZE 0x4200
168#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
169#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
170 "root=/dev/mtdblock0 " \
171 "mtdparts=at91_nand:-(root) " \
172 "rw rootfstype=jffs2"
173
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174#else /* CONFIG_SYS_USE_NANDFLASH */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200175
176/* bootstrap + u-boot + env + linux in nandflash */
Jean-Christophe PLAGNIOL-VILLARD51bfee12008-09-10 22:47:58 +0200177#define CONFIG_ENV_IS_IN_NAND 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200178#define CONFIG_ENV_OFFSET 0x60000
179#define CONFIG_ENV_OFFSET_REDUND 0x80000
180#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200181#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
182#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
183 "root=/dev/mtdblock5 " \
184 "mtdparts=at91_nand:128k(bootstrap)ro," \
185 "256k(uboot)ro,128k(env1)ro," \
186 "128k(env2)ro,2M(linux),-(root) " \
187 "rw rootfstype=jffs2"
188
189#endif
190
191#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200192#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Stelian Popd99a8ff2008-05-08 20:52:22 +0200193
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200194#define CONFIG_SYS_PROMPT "U-Boot> "
195#define CONFIG_SYS_CBSIZE 256
196#define CONFIG_SYS_MAXARGS 16
197#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
198#define CONFIG_SYS_LONGHELP 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200199#define CONFIG_CMDLINE_EDITING 1
200
201#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
202/*
203 * Size of malloc() pool
204 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200205#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
206#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200207
208#define CONFIG_STACKSIZE (32*1024) /* regular stack */
209
210#ifdef CONFIG_USE_IRQ
211#error CONFIG_USE_IRQ not supported
212#endif
213
214#endif