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wdenk6f213472003-08-29 22:00:43 +00001/*
2 * (C) Copyright 2003
3 * Texas Instruments.
4 * Kshitij Gupta <kshitij@ti.com>
5 * Configuation settings for the TI OMAP Innovator board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
30 * High Level Configuration Options
31 * (easy to change)
32 */
33#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */
34#define CONFIG_OMAP 1 /* in a TI OMAP core */
35#define CONFIG_OMAP1610 1 /* which is in a 1610 */
36#define CONFIG_INNOVATOROMAP1610 1 /* a Innovator Board */
Igor Grinberg2141e142011-07-03 23:00:21 +000037
38#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_INNOVATOR
wdenk6f213472003-08-29 22:00:43 +000039
40/* input clock of PLL */
41/* the OMAP1610 Innovator has 12MHz input clock */
42#define CONFIG_SYS_CLK_FREQ 12000000
43
44#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
45
46#define CONFIG_MISC_INIT_R
47
48#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
49#define CONFIG_SETUP_MEMORY_TAGS 1
50
51/*
52 * Size of malloc() pool
53 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020054#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
wdenk6f213472003-08-29 22:00:43 +000055
56/*
57 * Hardware drivers
58 */
59/*
60*/
Nishanth Menonac6b3622009-10-16 00:06:37 -050061#define CONFIG_NET_MULTI
62#define CONFIG_LAN91C96
wdenk6f213472003-08-29 22:00:43 +000063#define CONFIG_LAN91C96_BASE 0x04000300
64#define CONFIG_LAN91C96_EXT_PHY
65
66/*
67 * NS16550 Configuration
68 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020069#define CONFIG_SYS_NS16550
70#define CONFIG_SYS_NS16550_SERIAL
71#define CONFIG_SYS_NS16550_REG_SIZE (-4)
72#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */
73#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
wdenk6f213472003-08-29 22:00:43 +000074
75/*
76 * select serial console configuration
77 */
wdenka8c7c702003-12-06 19:49:23 +000078#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 Innovator */
wdenk6f213472003-08-29 22:00:43 +000079
80/* allow to overwrite serial and ethaddr */
81#define CONFIG_ENV_OVERWRITE
82#define CONFIG_CONS_INDEX 1
83#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020084#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
wdenk6f213472003-08-29 22:00:43 +000085
Jon Loeligera5cb2302007-07-04 22:33:13 -050086
87/*
88 * Command line configuration.
89 */
90#include <config_cmd_default.h>
91
92#define CONFIG_CMD_DHCP
93
94
Jon Loeligerd3b8c1a2007-07-09 21:57:31 -050095/*
96 * BOOTP options
97 */
98#define CONFIG_BOOTP_SUBNETMASK
99#define CONFIG_BOOTP_GATEWAY
100#define CONFIG_BOOTP_HOSTNAME
101#define CONFIG_BOOTP_BOOTPATH
102
wdenk6f213472003-08-29 22:00:43 +0000103
wdenk6f213472003-08-29 22:00:43 +0000104#include <configs/omap1510.h>
105
106#define CONFIG_BOOTDELAY 3
107#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \
108 root=/dev/nfs rw nfsroot=157.87.82.48:\
109 /home/a0875451/mwd/myfs/target ip=dhcp"
110#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */
111#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */
112#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
113#define CONFIG_BOOTFILE "uImage" /* file to load */
114
Jon Loeligera5cb2302007-07-04 22:33:13 -0500115#if defined(CONFIG_CMD_KGDB)
wdenk6f213472003-08-29 22:00:43 +0000116#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
117#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
118#endif
119
120/*
121 * Miscellaneous configurable options
122 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200123#define CONFIG_SYS_LONGHELP /* undef to save memory */
124#define CONFIG_SYS_PROMPT "OMAP1610 Innovator # " /* Monitor Command Prompt */
125#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenk6f213472003-08-29 22:00:43 +0000126/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
128#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
129#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk6f213472003-08-29 22:00:43 +0000130
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */
132#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
wdenk6f213472003-08-29 22:00:43 +0000133
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */
wdenk6f213472003-08-29 22:00:43 +0000135
wdenk42d1f032003-10-15 23:53:47 +0000136/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by
wdenk6f213472003-08-29 22:00:43 +0000137 * DPLL1. This time is further subdivided by a local divisor.
138 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200139#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */
Ladislav Michl81472d82009-03-30 18:58:41 +0200140#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */
141#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV))
wdenk6f213472003-08-29 22:00:43 +0000142
143/*-----------------------------------------------------------------------
144 * Stack sizes
145 *
146 * The stack sizes are set up in start.S using the settings below
147 */
148#define CONFIG_STACKSIZE (128*1024) /* regular stack */
149#ifdef CONFIG_USE_IRQ
150#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
151#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
152#endif
153
154/*-----------------------------------------------------------------------
155 * Physical Memory Map
156 */
wdenk3ff02c22004-06-09 15:25:53 +0000157#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
158#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
wdenk6f213472003-08-29 22:00:43 +0000159#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
160
wdenk3ff02c22004-06-09 15:25:53 +0000161#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */
162#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */
wdenk6f213472003-08-29 22:00:43 +0000163
wdenk3ff02c22004-06-09 15:25:53 +0000164#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */
wdenkca0e7742004-06-09 15:37:23 +0000165
wdenk3ff02c22004-06-09 15:25:53 +0000166#ifndef __ASSEMBLY__
167extern unsigned long omap_flash_base; /* set in flash__init */
168#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169#define CONFIG_SYS_FLASH_BASE omap_flash_base
wdenk3ff02c22004-06-09 15:25:53 +0000170
171#elif defined(CONFIG_CS0_BOOT)
172
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM0
wdenk3ff02c22004-06-09 15:25:53 +0000174
175#else
176
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM1
wdenk3ff02c22004-06-09 15:25:53 +0000178
179#endif
wdenk6f213472003-08-29 22:00:43 +0000180
Aneesh V574fa1f2011-06-09 08:54:53 -0400181#define PHYS_SRAM 0x20000000
182
wdenk6f213472003-08-29 22:00:43 +0000183/*-----------------------------------------------------------------------
184 * FLASH and environment organization
185 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200186#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
wdenk6f213472003-08-29 22:00:43 +0000187#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */
wdenk6f213472003-08-29 22:00:43 +0000189/* addr of environment */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200190#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000)
wdenk6f213472003-08-29 22:00:43 +0000191
192/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200193#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
194#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */
wdenk6f213472003-08-29 22:00:43 +0000195
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200196#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200197#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
198#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */
wdenk6f213472003-08-29 22:00:43 +0000199
Aneesh V574fa1f2011-06-09 08:54:53 -0400200#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
201#define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM
202
wdenk6f213472003-08-29 22:00:43 +0000203#endif /* __CONFIG_H */