blob: ef342088e1c562d388b7bb3eee6df1739fb172d4 [file] [log] [blame]
Masahiro Yamada3e98fc12018-04-16 12:35:33 +09001// SPDX-License-Identifier: GPL-2.0+ OR MIT
2//
3// Device Tree Source for UniPhier Pro4 SoC
4//
5// Copyright (C) 2015-2016 Socionext Inc.
6// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada509eb672014-11-26 18:33:59 +09007
Masahiro Yamadab443fb42017-11-25 00:25:35 +09008#include <dt-bindings/gpio/uniphier-gpio.h>
9
Masahiro Yamada509eb672014-11-26 18:33:59 +090010/ {
Masahiro Yamada52159d22016-10-07 16:43:00 +090011 compatible = "socionext,uniphier-pro4";
Masahiro Yamadaf16eda92017-03-13 00:16:39 +090012 #address-cells = <1>;
13 #size-cells = <1>;
Masahiro Yamada509eb672014-11-26 18:33:59 +090014
15 cpus {
Masahiro Yamada509eb672014-11-26 18:33:59 +090016 #address-cells = <1>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +090017 #size-cells = <0>;
Masahiro Yamada509eb672014-11-26 18:33:59 +090018
19 cpu@0 {
20 device_type = "cpu";
21 compatible = "arm,cortex-a9";
22 reg = <0>;
Masahiro Yamada52159d22016-10-07 16:43:00 +090023 enable-method = "psci";
Masahiro Yamada4e1f81d2015-12-16 10:54:08 +090024 next-level-cache = <&l2>;
Masahiro Yamada509eb672014-11-26 18:33:59 +090025 };
26
27 cpu@1 {
28 device_type = "cpu";
29 compatible = "arm,cortex-a9";
30 reg = <1>;
Masahiro Yamada52159d22016-10-07 16:43:00 +090031 enable-method = "psci";
Masahiro Yamada4e1f81d2015-12-16 10:54:08 +090032 next-level-cache = <&l2>;
Masahiro Yamada509eb672014-11-26 18:33:59 +090033 };
34 };
35
Masahiro Yamadacd622142016-12-05 18:31:39 +090036 psci {
37 compatible = "arm,psci-0.2";
38 method = "smc";
39 };
40
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090041 clocks {
Masahiro Yamadacd622142016-12-05 18:31:39 +090042 refclk: ref {
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 clock-frequency = <25000000>;
46 };
47
Masahiro Yamadab443fb42017-11-25 00:25:35 +090048 arm_timer_clk: arm-timer {
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090049 #clock-cells = <0>;
50 compatible = "fixed-clock";
51 clock-frequency = <50000000>;
52 };
Masahiro Yamadacd622142016-12-05 18:31:39 +090053 };
Masahiro Yamadad243c182015-08-28 22:33:13 +090054
Masahiro Yamadacd622142016-12-05 18:31:39 +090055 soc {
56 compatible = "simple-bus";
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges;
60 interrupt-parent = <&intc>;
Masahiro Yamadacd622142016-12-05 18:31:39 +090061
62 l2: l2-cache@500c0000 {
63 compatible = "socionext,uniphier-system-cache";
64 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
65 <0x506c0000 0x400>;
66 interrupts = <0 174 4>, <0 175 4>;
67 cache-unified;
68 cache-size = <(768 * 1024)>;
69 cache-sets = <256>;
70 cache-line-size = <128>;
71 cache-level = <2>;
72 };
73
Masahiro Yamada2001a812018-12-19 20:03:21 +090074 spi0: spi@54006000 {
75 compatible = "socionext,uniphier-scssi";
76 status = "disabled";
77 reg = <0x54006000 0x100>;
78 interrupts = <0 39 4>;
79 pinctrl-names = "default";
80 pinctrl-0 = <&pinctrl_spi0>;
81 clocks = <&peri_clk 11>;
82 resets = <&peri_rst 11>;
83 };
84
Masahiro Yamadacd622142016-12-05 18:31:39 +090085 serial0: serial@54006800 {
86 compatible = "socionext,uniphier-uart";
87 status = "disabled";
88 reg = <0x54006800 0x40>;
89 interrupts = <0 33 4>;
90 pinctrl-names = "default";
91 pinctrl-0 = <&pinctrl_uart0>;
92 clocks = <&peri_clk 0>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +090093 resets = <&peri_rst 0>;
Masahiro Yamadad243c182015-08-28 22:33:13 +090094 };
95
Masahiro Yamadacd622142016-12-05 18:31:39 +090096 serial1: serial@54006900 {
97 compatible = "socionext,uniphier-uart";
98 status = "disabled";
99 reg = <0x54006900 0x40>;
100 interrupts = <0 35 4>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_uart1>;
103 clocks = <&peri_clk 1>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900104 resets = <&peri_rst 1>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900105 };
106
107 serial2: serial@54006a00 {
108 compatible = "socionext,uniphier-uart";
109 status = "disabled";
110 reg = <0x54006a00 0x40>;
111 interrupts = <0 37 4>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_uart2>;
114 clocks = <&peri_clk 2>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900115 resets = <&peri_rst 2>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900116 };
117
118 serial3: serial@54006b00 {
119 compatible = "socionext,uniphier-uart";
120 status = "disabled";
121 reg = <0x54006b00 0x40>;
122 interrupts = <0 177 4>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_uart3>;
125 clocks = <&peri_clk 3>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900126 resets = <&peri_rst 3>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900127 };
128
Masahiro Yamada0f72b742017-10-13 19:21:52 +0900129 gpio: gpio@55000000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +0900130 compatible = "socionext,uniphier-gpio";
Masahiro Yamada0f72b742017-10-13 19:21:52 +0900131 reg = <0x55000000 0x200>;
132 interrupt-parent = <&aidet>;
133 interrupt-controller;
134 #interrupt-cells = <2>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900135 gpio-controller;
136 #gpio-cells = <2>;
Masahiro Yamada0f72b742017-10-13 19:21:52 +0900137 gpio-ranges = <&pinctrl 0 0 0>;
138 gpio-ranges-group-names = "gpio_range";
139 ngpios = <248>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900140 socionext,interrupt-ranges = <0 48 16>, <16 154 5>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900141 };
142
143 i2c0: i2c@58780000 {
144 compatible = "socionext,uniphier-fi2c";
145 status = "disabled";
146 reg = <0x58780000 0x80>;
147 #address-cells = <1>;
148 #size-cells = <0>;
149 interrupts = <0 41 4>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_i2c0>;
152 clocks = <&peri_clk 4>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900153 resets = <&peri_rst 4>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900154 clock-frequency = <100000>;
155 };
156
157 i2c1: i2c@58781000 {
158 compatible = "socionext,uniphier-fi2c";
159 status = "disabled";
160 reg = <0x58781000 0x80>;
161 #address-cells = <1>;
162 #size-cells = <0>;
163 interrupts = <0 42 4>;
164 pinctrl-names = "default";
165 pinctrl-0 = <&pinctrl_i2c1>;
166 clocks = <&peri_clk 5>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900167 resets = <&peri_rst 5>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900168 clock-frequency = <100000>;
169 };
170
171 i2c2: i2c@58782000 {
172 compatible = "socionext,uniphier-fi2c";
173 status = "disabled";
174 reg = <0x58782000 0x80>;
175 #address-cells = <1>;
176 #size-cells = <0>;
177 interrupts = <0 43 4>;
178 pinctrl-names = "default";
179 pinctrl-0 = <&pinctrl_i2c2>;
180 clocks = <&peri_clk 6>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900181 resets = <&peri_rst 6>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900182 clock-frequency = <100000>;
183 };
184
185 i2c3: i2c@58783000 {
186 compatible = "socionext,uniphier-fi2c";
187 status = "disabled";
188 reg = <0x58783000 0x80>;
189 #address-cells = <1>;
190 #size-cells = <0>;
191 interrupts = <0 44 4>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_i2c3>;
194 clocks = <&peri_clk 7>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900195 resets = <&peri_rst 7>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900196 clock-frequency = <100000>;
197 };
198
199 /* i2c4 does not exist */
200
201 /* chip-internal connection for DMD */
202 i2c5: i2c@58785000 {
203 compatible = "socionext,uniphier-fi2c";
204 reg = <0x58785000 0x80>;
205 #address-cells = <1>;
206 #size-cells = <0>;
207 interrupts = <0 25 4>;
208 clocks = <&peri_clk 9>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900209 resets = <&peri_rst 9>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900210 clock-frequency = <400000>;
211 };
212
213 /* chip-internal connection for HDMI */
214 i2c6: i2c@58786000 {
215 compatible = "socionext,uniphier-fi2c";
216 reg = <0x58786000 0x80>;
217 #address-cells = <1>;
218 #size-cells = <0>;
219 interrupts = <0 26 4>;
220 clocks = <&peri_clk 10>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900221 resets = <&peri_rst 10>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900222 clock-frequency = <400000>;
223 };
224
225 system_bus: system-bus@58c00000 {
226 compatible = "socionext,uniphier-system-bus";
227 status = "disabled";
228 reg = <0x58c00000 0x400>;
229 #address-cells = <2>;
230 #size-cells = <1>;
231 pinctrl-names = "default";
232 pinctrl-0 = <&pinctrl_system_bus>;
233 };
234
Masahiro Yamadaabb6ac22017-05-15 14:23:46 +0900235 smpctrl@59801000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +0900236 compatible = "socionext,uniphier-smpctrl";
237 reg = <0x59801000 0x400>;
238 };
239
240 mioctrl@59810000 {
241 compatible = "socionext,uniphier-pro4-mioctrl",
242 "simple-mfd", "syscon";
243 reg = <0x59810000 0x800>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900244
245 mio_clk: clock {
246 compatible = "socionext,uniphier-pro4-mio-clock";
247 #clock-cells = <1>;
248 };
249
250 mio_rst: reset {
251 compatible = "socionext,uniphier-pro4-mio-reset";
252 #reset-cells = <1>;
253 };
254 };
255
256 perictrl@59820000 {
257 compatible = "socionext,uniphier-pro4-perictrl",
258 "simple-mfd", "syscon";
259 reg = <0x59820000 0x200>;
260
261 peri_clk: clock {
262 compatible = "socionext,uniphier-pro4-peri-clock";
263 #clock-cells = <1>;
264 };
265
266 peri_rst: reset {
267 compatible = "socionext,uniphier-pro4-peri-reset";
268 #reset-cells = <1>;
269 };
270 };
271
272 sd: sdhc@5a400000 {
Masahiro Yamadac3ab1e12018-09-10 12:58:35 +0900273 compatible = "socionext,uniphier-sd-v2.91";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900274 status = "disabled";
275 reg = <0x5a400000 0x200>;
276 interrupts = <0 76 4>;
Masahiro Yamadac3ab1e12018-09-10 12:58:35 +0900277 pinctrl-names = "default", "uhs";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900278 pinctrl-0 = <&pinctrl_sd>;
Masahiro Yamadac3ab1e12018-09-10 12:58:35 +0900279 pinctrl-1 = <&pinctrl_sd_uhs>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900280 clocks = <&mio_clk 0>;
281 reset-names = "host", "bridge";
282 resets = <&mio_rst 0>, <&mio_rst 3>;
283 bus-width = <4>;
284 cap-sd-highspeed;
285 sd-uhs-sdr12;
286 sd-uhs-sdr25;
287 sd-uhs-sdr50;
288 };
289
290 emmc: sdhc@5a500000 {
Masahiro Yamadac3ab1e12018-09-10 12:58:35 +0900291 compatible = "socionext,uniphier-sd-v2.91";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900292 status = "disabled";
293 reg = <0x5a500000 0x200>;
294 interrupts = <0 78 4>;
Masahiro Yamada33aae6b2018-09-10 12:58:32 +0900295 pinctrl-names = "default";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900296 pinctrl-0 = <&pinctrl_emmc>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900297 clocks = <&mio_clk 1>;
Masahiro Yamadac3ab1e12018-09-10 12:58:35 +0900298 reset-names = "host", "bridge", "hw";
299 resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900300 bus-width = <8>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900301 cap-mmc-highspeed;
302 cap-mmc-hw-reset;
Masahiro Yamadac3ab1e12018-09-10 12:58:35 +0900303 non-removable;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900304 };
305
306 sd1: sdhc@5a600000 {
Masahiro Yamadac3ab1e12018-09-10 12:58:35 +0900307 compatible = "socionext,uniphier-sd-v2.91";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900308 status = "disabled";
309 reg = <0x5a600000 0x200>;
310 interrupts = <0 85 4>;
Masahiro Yamadac3ab1e12018-09-10 12:58:35 +0900311 pinctrl-names = "default";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900312 pinctrl-0 = <&pinctrl_sd1>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900313 clocks = <&mio_clk 2>;
Masahiro Yamadac3ab1e12018-09-10 12:58:35 +0900314 reset-names = "host", "bridge";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900315 resets = <&mio_rst 2>, <&mio_rst 5>;
316 bus-width = <4>;
317 cap-sd-highspeed;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900318 };
319
320 usb2: usb@5a800100 {
321 compatible = "socionext,uniphier-ehci", "generic-ehci";
322 status = "disabled";
323 reg = <0x5a800100 0x100>;
324 interrupts = <0 80 4>;
325 pinctrl-names = "default";
326 pinctrl-0 = <&pinctrl_usb2>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900327 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
328 <&mio_clk 12>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900329 resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
330 <&mio_rst 12>;
Masahiro Yamada2001a812018-12-19 20:03:21 +0900331 phy-names = "usb";
332 phys = <&usb_phy0>;
Masahiro Yamada46820e32018-03-15 11:43:03 +0900333 has-transaction-translator;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900334 };
335
336 usb3: usb@5a810100 {
337 compatible = "socionext,uniphier-ehci", "generic-ehci";
338 status = "disabled";
339 reg = <0x5a810100 0x100>;
340 interrupts = <0 81 4>;
341 pinctrl-names = "default";
342 pinctrl-0 = <&pinctrl_usb3>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900343 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
344 <&mio_clk 13>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900345 resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
346 <&mio_rst 13>;
Masahiro Yamada2001a812018-12-19 20:03:21 +0900347 phy-names = "usb";
348 phys = <&usb_phy1>;
Masahiro Yamada46820e32018-03-15 11:43:03 +0900349 has-transaction-translator;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900350 };
351
Kunihiko Hayashi69b3d4e2018-05-11 18:49:14 +0900352 soc_glue: soc-glue@5f800000 {
Masahiro Yamadacd622142016-12-05 18:31:39 +0900353 compatible = "socionext,uniphier-pro4-soc-glue",
354 "simple-mfd", "syscon";
355 reg = <0x5f800000 0x2000>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900356
357 pinctrl: pinctrl {
358 compatible = "socionext,uniphier-pro4-pinctrl";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900359 };
Masahiro Yamada2001a812018-12-19 20:03:21 +0900360
361 usb-phy {
362 compatible = "socionext,uniphier-pro4-usb2-phy";
363 #address-cells = <1>;
364 #size-cells = <0>;
365
366 usb_phy0: phy@0 {
367 reg = <0>;
368 #phy-cells = <0>;
369 };
370
371 usb_phy1: phy@1 {
372 reg = <1>;
373 #phy-cells = <0>;
374 };
375
376 usb_phy2: phy@2 {
377 reg = <2>;
378 #phy-cells = <0>;
379 vbus-supply = <&usb0_vbus>;
380 };
381
382 usb_phy3: phy@3 {
383 reg = <3>;
384 #phy-cells = <0>;
385 vbus-supply = <&usb1_vbus>;
386 };
387 };
Masahiro Yamadacd622142016-12-05 18:31:39 +0900388 };
389
Masahiro Yamada46820e32018-03-15 11:43:03 +0900390 soc-glue@5f900000 {
391 compatible = "socionext,uniphier-pro4-soc-glue-debug",
392 "simple-mfd";
393 #address-cells = <1>;
394 #size-cells = <1>;
395 ranges = <0 0x5f900000 0x2000>;
396
397 efuse@100 {
398 compatible = "socionext,uniphier-efuse";
399 reg = <0x100 0x28>;
400 };
401
402 efuse@130 {
403 compatible = "socionext,uniphier-efuse";
404 reg = <0x130 0x8>;
405 };
406
407 efuse@200 {
408 compatible = "socionext,uniphier-efuse";
409 reg = <0x200 0x14>;
410 };
411 };
412
Masahiro Yamada6c9e46e2017-08-29 12:20:52 +0900413 aidet: aidet@5fc20000 {
414 compatible = "socionext,uniphier-pro4-aidet";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900415 reg = <0x5fc20000 0x200>;
Masahiro Yamada6c9e46e2017-08-29 12:20:52 +0900416 interrupt-controller;
417 #interrupt-cells = <2>;
Masahiro Yamadacd622142016-12-05 18:31:39 +0900418 };
419
420 timer@60000200 {
421 compatible = "arm,cortex-a9-global-timer";
422 reg = <0x60000200 0x20>;
423 interrupts = <1 11 0x304>;
424 clocks = <&arm_timer_clk>;
425 };
426
427 timer@60000600 {
428 compatible = "arm,cortex-a9-twd-timer";
429 reg = <0x60000600 0x20>;
430 interrupts = <1 13 0x304>;
431 clocks = <&arm_timer_clk>;
432 };
433
434 intc: interrupt-controller@60001000 {
435 compatible = "arm,cortex-a9-gic";
436 reg = <0x60001000 0x1000>,
437 <0x60000100 0x100>;
438 #interrupt-cells = <3>;
439 interrupt-controller;
440 };
441
442 sysctrl@61840000 {
443 compatible = "socionext,uniphier-pro4-sysctrl",
444 "simple-mfd", "syscon";
445 reg = <0x61840000 0x10000>;
446
447 sys_clk: clock {
448 compatible = "socionext,uniphier-pro4-clock";
449 #clock-cells = <1>;
450 };
451
452 sys_rst: reset {
453 compatible = "socionext,uniphier-pro4-reset";
454 #reset-cells = <1>;
455 };
456 };
457
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900458 eth: ethernet@65000000 {
459 compatible = "socionext,uniphier-pro4-ave4";
460 status = "disabled";
461 reg = <0x65000000 0x8500>;
462 interrupts = <0 66 4>;
463 pinctrl-names = "default";
464 pinctrl-0 = <&pinctrl_ether_rgmii>;
Kunihiko Hayashi3c0fa6c2018-05-11 18:49:16 +0900465 clock-names = "gio", "ether", "ether-gb", "ether-phy";
Kunihiko Hayashi28cd3d22018-05-11 18:49:15 +0900466 clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>,
Masahiro Yamadae885c5a2018-06-19 16:11:46 +0900467 <&sys_clk 10>;
Kunihiko Hayashi3c0fa6c2018-05-11 18:49:16 +0900468 reset-names = "gio", "ether";
Kunihiko Hayashi28cd3d22018-05-11 18:49:15 +0900469 resets = <&sys_rst 12>, <&sys_rst 6>;
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900470 phy-mode = "rgmii";
471 local-mac-address = [00 00 00 00 00 00];
Kunihiko Hayashi69b3d4e2018-05-11 18:49:14 +0900472 socionext,syscon-phy-mode = <&soc_glue 0>;
Masahiro Yamada3e98fc12018-04-16 12:35:33 +0900473
474 mdio: mdio {
475 #address-cells = <1>;
476 #size-cells = <0>;
477 };
478 };
479
Masahiro Yamada2001a812018-12-19 20:03:21 +0900480 _usb0: usb@65a00000 {
481 compatible = "socionext,uniphier-dwc3", "snps,dwc3";
482 status = "disabled";
483 reg = <0x65a00000 0xcd00>;
484 interrupt-names = "host", "peripheral";
485 interrupts = <0 134 4>, <0 135 4>;
486 pinctrl-names = "default";
487 pinctrl-0 = <&pinctrl_usb0>;
488 clock-names = "ref", "bus_early", "suspend";
489 clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
490 resets = <&usb0_rst 4>;
491 phys = <&usb_phy2>, <&usb0_ssphy>;
492 dr_mode = "host";
493 };
494
495 usb-glue@65b00000 {
496 compatible = "socionext,uniphier-pro4-dwc3-glue",
497 "simple-mfd";
498 #address-cells = <1>;
499 #size-cells = <1>;
500 ranges = <0 0x65b00000 0x100>;
501
502 usb0_vbus: regulator@0 {
503 compatible = "socionext,uniphier-pro4-usb3-regulator";
504 reg = <0 0x10>;
505 clock-names = "gio", "link";
506 clocks = <&sys_clk 12>, <&sys_clk 14>;
507 reset-names = "gio", "link";
508 resets = <&sys_rst 12>, <&sys_rst 14>;
509 };
510
511 usb0_ssphy: ss-phy@10 {
512 compatible = "socionext,uniphier-pro4-usb3-ssphy";
513 reg = <0x10 0x10>;
514 #phy-cells = <0>;
515 clock-names = "gio", "link";
516 clocks = <&sys_clk 12>, <&sys_clk 14>;
517 reset-names = "gio", "link";
518 resets = <&sys_rst 12>, <&sys_rst 14>;
519 vbus-supply = <&usb0_vbus>;
520 };
521
522 usb0_rst: reset@40 {
523 compatible = "socionext,uniphier-pro4-usb3-reset";
524 reg = <0x40 0x4>;
525 #reset-cells = <1>;
526 clock-names = "gio", "link";
527 clocks = <&sys_clk 12>, <&sys_clk 14>;
528 reset-names = "gio", "link";
529 resets = <&sys_rst 12>, <&sys_rst 14>;
530 };
531 };
532
533 /* FIXME: U-Boot own node */
Masahiro Yamadacd622142016-12-05 18:31:39 +0900534 usb0: usb@65b00000 {
535 compatible = "socionext,uniphier-pro4-dwc3";
536 status = "disabled";
537 reg = <0x65b00000 0x1000>;
538 #address-cells = <1>;
539 #size-cells = <1>;
540 ranges;
541 pinctrl-names = "default";
542 pinctrl-0 = <&pinctrl_usb0>;
543 dwc3@65a00000 {
544 compatible = "snps,dwc3";
545 reg = <0x65a00000 0x10000>;
546 interrupts = <0 134 4>;
Masahiro Yamada3444d1d2017-08-13 09:01:17 +0900547 dr_mode = "host";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900548 tx-fifo-resize;
549 };
550 };
551
Masahiro Yamada2001a812018-12-19 20:03:21 +0900552 _usb1: usb@65c00000 {
553 compatible = "socionext,uniphier-dwc3", "snps,dwc3";
554 status = "disabled";
555 reg = <0x65c00000 0xcd00>;
556 interrupt-names = "host", "peripheral";
557 interrupts = <0 137 4>, <0 138 4>;
558 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_usb1>;
560 clock-names = "ref", "bus_early", "suspend";
561 clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
562 resets = <&usb1_rst 4>;
563 phys = <&usb_phy3>;
564 dr_mode = "host";
565 };
566
567 usb-glue@65d00000 {
568 compatible = "socionext,uniphier-pro4-dwc3-glue",
569 "simple-mfd";
570 #address-cells = <1>;
571 #size-cells = <1>;
572 ranges = <0 0x65d00000 0x100>;
573
574 usb1_vbus: regulator@0 {
575 compatible = "socionext,uniphier-pro4-usb3-regulator";
576 reg = <0 0x10>;
577 clock-names = "gio", "link";
578 clocks = <&sys_clk 12>, <&sys_clk 15>;
579 reset-names = "gio", "link";
580 resets = <&sys_rst 12>, <&sys_rst 15>;
581 };
582
583 usb1_rst: reset@40 {
584 compatible = "socionext,uniphier-pro4-usb3-reset";
585 reg = <0x40 0x4>;
586 #reset-cells = <1>;
587 clock-names = "gio", "link";
588 clocks = <&sys_clk 12>, <&sys_clk 15>;
589 reset-names = "gio", "link";
590 resets = <&sys_rst 12>, <&sys_rst 15>;
591 };
592 };
593
594 /* FIXME: U-Boot own node */
Masahiro Yamadacd622142016-12-05 18:31:39 +0900595 usb1: usb@65d00000 {
596 compatible = "socionext,uniphier-pro4-dwc3";
597 status = "disabled";
598 reg = <0x65d00000 0x1000>;
599 #address-cells = <1>;
600 #size-cells = <1>;
601 ranges;
602 pinctrl-names = "default";
603 pinctrl-0 = <&pinctrl_usb1>;
604 dwc3@65c00000 {
605 compatible = "snps,dwc3";
606 reg = <0x65c00000 0x10000>;
607 interrupts = <0 137 4>;
Masahiro Yamada3444d1d2017-08-13 09:01:17 +0900608 dr_mode = "host";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900609 tx-fifo-resize;
610 };
611 };
612
613 nand: nand@68000000 {
Masahiro Yamadaabb6ac22017-05-15 14:23:46 +0900614 compatible = "socionext,uniphier-denali-nand-v5a";
Masahiro Yamadacd622142016-12-05 18:31:39 +0900615 status = "disabled";
616 reg-names = "nand_data", "denali_reg";
617 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
618 interrupts = <0 65 4>;
619 pinctrl-names = "default";
620 pinctrl-0 = <&pinctrl_nand>;
Masahiro Yamada2001a812018-12-19 20:03:21 +0900621 clock-names = "nand", "nand_x", "ecc";
622 clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
Masahiro Yamadab443fb42017-11-25 00:25:35 +0900623 resets = <&sys_rst 2>;
Masahiro Yamadad243c182015-08-28 22:33:13 +0900624 };
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +0900625 };
Masahiro Yamada8f062432015-12-16 10:54:07 +0900626};
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +0900627
Masahiro Yamada6c9e46e2017-08-29 12:20:52 +0900628#include "uniphier-pinctrl.dtsi"