Samuel Holland | e210ec0 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | // Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz> |
| 3 | // Based on sun50i-a64-pine64.dts, which is: |
| 4 | // Copyright (c) 2016 ARM Ltd. |
Andre Przywara | df3ebdc | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | #include "sun50i-a64-sopine.dtsi" |
| 9 | |
| 10 | / { |
| 11 | model = "SoPine with baseboard"; |
| 12 | compatible = "pine64,sopine-baseboard", "pine64,sopine", |
| 13 | "allwinner,sun50i-a64"; |
| 14 | |
| 15 | aliases { |
| 16 | ethernet0 = &emac; |
| 17 | serial0 = &uart0; |
Samuel Holland | e210ec0 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 18 | serial1 = &uart1; |
| 19 | serial2 = &uart2; |
| 20 | serial3 = &uart3; |
| 21 | serial4 = &uart4; |
Andre Przywara | df3ebdc | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 22 | }; |
| 23 | |
| 24 | chosen { |
| 25 | stdout-path = "serial0:115200n8"; |
| 26 | }; |
| 27 | |
Andre Przywara | 1b39a18 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 28 | hdmi-connector { |
| 29 | compatible = "hdmi-connector"; |
| 30 | type = "a"; |
| 31 | |
| 32 | port { |
| 33 | hdmi_con_in: endpoint { |
| 34 | remote-endpoint = <&hdmi_out_con>; |
| 35 | }; |
| 36 | }; |
| 37 | }; |
| 38 | |
Andre Przywara | df3ebdc | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 39 | reg_vcc1v8: vcc1v8 { |
| 40 | compatible = "regulator-fixed"; |
| 41 | regulator-name = "vcc1v8"; |
| 42 | regulator-min-microvolt = <1800000>; |
| 43 | regulator-max-microvolt = <1800000>; |
| 44 | }; |
| 45 | }; |
| 46 | |
Samuel Holland | e210ec0 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 47 | &ac_power_supply { |
| 48 | status = "okay"; |
| 49 | }; |
| 50 | |
| 51 | &battery_power_supply { |
| 52 | status = "okay"; |
| 53 | }; |
| 54 | |
| 55 | &codec { |
| 56 | status = "okay"; |
| 57 | }; |
| 58 | |
| 59 | &codec_analog { |
| 60 | status = "okay"; |
| 61 | }; |
| 62 | |
| 63 | &dai { |
| 64 | status = "okay"; |
| 65 | }; |
| 66 | |
Andre Przywara | 1b39a18 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 67 | &de { |
| 68 | status = "okay"; |
| 69 | }; |
| 70 | |
Andre Przywara | df3ebdc | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 71 | &ehci0 { |
| 72 | status = "okay"; |
| 73 | }; |
| 74 | |
| 75 | &ehci1 { |
| 76 | status = "okay"; |
| 77 | }; |
| 78 | |
| 79 | &emac { |
| 80 | pinctrl-names = "default"; |
| 81 | pinctrl-0 = <&rgmii_pins>; |
| 82 | phy-mode = "rgmii"; |
| 83 | phy-handle = <&ext_rgmii_phy>; |
| 84 | phy-supply = <®_dc1sw>; |
| 85 | status = "okay"; |
| 86 | }; |
| 87 | |
Andre Przywara | 1b39a18 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 88 | &hdmi { |
| 89 | hvcc-supply = <®_dldo1>; |
| 90 | status = "okay"; |
| 91 | }; |
| 92 | |
| 93 | &hdmi_out { |
| 94 | hdmi_out_con: endpoint { |
| 95 | remote-endpoint = <&hdmi_con_in>; |
| 96 | }; |
| 97 | }; |
| 98 | |
Andre Przywara | df3ebdc | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 99 | &mdio { |
| 100 | ext_rgmii_phy: ethernet-phy@1 { |
| 101 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 102 | reg = <1>; |
| 103 | }; |
| 104 | }; |
| 105 | |
| 106 | &mmc2 { |
| 107 | pinctrl-names = "default"; |
| 108 | pinctrl-0 = <&mmc2_pins>; |
| 109 | vmmc-supply = <®_dcdc1>; |
| 110 | vqmmc-supply = <®_vcc1v8>; |
| 111 | bus-width = <8>; |
| 112 | non-removable; |
| 113 | cap-mmc-hw-reset; |
| 114 | status = "okay"; |
| 115 | }; |
| 116 | |
| 117 | &ohci0 { |
| 118 | status = "okay"; |
| 119 | }; |
| 120 | |
| 121 | &ohci1 { |
| 122 | status = "okay"; |
| 123 | }; |
| 124 | |
| 125 | ®_dc1sw { |
Samuel Holland | e210ec0 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 126 | /* |
| 127 | * Ethernet PHY needs 30ms to properly power up and some more |
| 128 | * to initialize. 100ms should be plenty of time to finish |
| 129 | * whole process. |
| 130 | */ |
| 131 | regulator-enable-ramp-delay = <100000>; |
Andre Przywara | df3ebdc | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 132 | regulator-name = "vcc-phy"; |
| 133 | }; |
| 134 | |
| 135 | ®_dldo1 { |
| 136 | regulator-min-microvolt = <3300000>; |
| 137 | regulator-max-microvolt = <3300000>; |
| 138 | regulator-name = "vcc-hdmi"; |
| 139 | }; |
| 140 | |
| 141 | ®_dldo2 { |
| 142 | regulator-min-microvolt = <3300000>; |
| 143 | regulator-max-microvolt = <3300000>; |
| 144 | regulator-name = "vcc-mipi"; |
| 145 | }; |
| 146 | |
| 147 | ®_dldo4 { |
| 148 | regulator-min-microvolt = <3300000>; |
| 149 | regulator-max-microvolt = <3300000>; |
| 150 | regulator-name = "vcc-wifi"; |
| 151 | }; |
| 152 | |
Andre Przywara | 1b39a18 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 153 | &simplefb_hdmi { |
| 154 | vcc-hdmi-supply = <®_dldo1>; |
| 155 | }; |
| 156 | |
Samuel Holland | e210ec0 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 157 | &sound { |
| 158 | simple-audio-card,aux-devs = <&codec_analog>; |
| 159 | simple-audio-card,widgets = "Microphone", "Microphone Jack", |
| 160 | "Headphone", "Headphone Jack"; |
| 161 | simple-audio-card,routing = |
| 162 | "Left DAC", "AIF1 Slot 0 Left", |
| 163 | "Right DAC", "AIF1 Slot 0 Right", |
| 164 | "Headphone Jack", "HP", |
| 165 | "AIF1 Slot 0 Left ADC", "Left ADC", |
| 166 | "AIF1 Slot 0 Right ADC", "Right ADC", |
| 167 | "MIC2", "Microphone Jack"; |
| 168 | status = "okay"; |
| 169 | }; |
| 170 | |
Andre Przywara | df3ebdc | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 171 | &uart0 { |
| 172 | pinctrl-names = "default"; |
Andre Przywara | 1b39a18 | 2018-10-29 00:56:47 +0000 | [diff] [blame] | 173 | pinctrl-0 = <&uart0_pb_pins>; |
Andre Przywara | df3ebdc | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 174 | status = "okay"; |
| 175 | }; |
| 176 | |
Samuel Holland | e210ec0 | 2020-10-24 10:21:55 -0500 | [diff] [blame] | 177 | /* On Pi-2 connector */ |
| 178 | &uart2 { |
| 179 | pinctrl-names = "default"; |
| 180 | pinctrl-0 = <&uart2_pins>; |
| 181 | status = "disabled"; |
| 182 | }; |
| 183 | |
| 184 | /* On Euler connector */ |
| 185 | &uart3 { |
| 186 | pinctrl-names = "default"; |
| 187 | pinctrl-0 = <&uart3_pins>; |
| 188 | status = "disabled"; |
| 189 | }; |
| 190 | |
| 191 | /* On Euler connector, RTS/CTS optional */ |
| 192 | &uart4 { |
| 193 | pinctrl-names = "default"; |
| 194 | pinctrl-0 = <&uart4_pins>; |
| 195 | status = "disabled"; |
| 196 | }; |
| 197 | |
Andre Przywara | df3ebdc | 2018-07-04 14:16:39 +0100 | [diff] [blame] | 198 | &usb_otg { |
| 199 | dr_mode = "host"; |
| 200 | status = "okay"; |
| 201 | }; |
| 202 | |
| 203 | &usbphy { |
| 204 | status = "okay"; |
| 205 | }; |