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Vadim Bendebury5e124722011-10-17 08:36:14 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Vadim Bendebury5e124722011-10-17 08:36:14 +00005 */
6
7/*
8 * The code in this file is based on the article "Writing a TPM Device Driver"
9 * published on http://ptgmedia.pearsoncmg.com.
10 *
11 * One principal difference is that in the simplest config the other than 0
12 * TPM localities do not get mapped by some devices (for instance, by Infineon
13 * slb9635), so this driver provides access to locality 0 only.
14 */
15
16#include <common.h>
Simon Glassd616ba52015-08-22 18:31:39 -060017#include <dm.h>
18#include <mapmem.h>
Vadim Bendebury5e124722011-10-17 08:36:14 +000019#include <tpm.h>
Simon Glassd616ba52015-08-22 18:31:39 -060020#include <asm/io.h>
Vadim Bendebury5e124722011-10-17 08:36:14 +000021
22#define PREFIX "lpc_tpm: "
23
24struct tpm_locality {
25 u32 access;
26 u8 padding0[4];
27 u32 int_enable;
28 u8 vector;
29 u8 padding1[3];
30 u32 int_status;
31 u32 int_capability;
32 u32 tpm_status;
33 u8 padding2[8];
34 u8 data;
35 u8 padding3[3803];
36 u32 did_vid;
37 u8 rid;
38 u8 padding4[251];
39};
40
Simon Glassd616ba52015-08-22 18:31:39 -060041struct tpm_tis_lpc_priv {
42 struct tpm_locality *regs;
43};
44
Vadim Bendebury5e124722011-10-17 08:36:14 +000045/*
46 * This pointer refers to the TPM chip, 5 of its localities are mapped as an
47 * array.
48 */
49#define TPM_TOTAL_LOCALITIES 5
Vadim Bendebury5e124722011-10-17 08:36:14 +000050
51/* Some registers' bit field definitions */
52#define TIS_STS_VALID (1 << 7) /* 0x80 */
53#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */
54#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */
55#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */
56#define TIS_STS_EXPECT (1 << 3) /* 0x08 */
57#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */
58
59#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */
60#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */
61#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */
62#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */
63#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */
64#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */
65#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */
66
67#define TIS_STS_BURST_COUNT_MASK (0xffff)
68#define TIS_STS_BURST_COUNT_SHIFT (8)
69
Vadim Bendebury5e124722011-10-17 08:36:14 +000070 /* 1 second is plenty for anything TPM does. */
71#define MAX_DELAY_US (1000 * 1000)
72
73/* Retrieve burst count value out of the status register contents. */
74static u16 burst_count(u32 status)
75{
Simon Glassd616ba52015-08-22 18:31:39 -060076 return (status >> TIS_STS_BURST_COUNT_SHIFT) &
77 TIS_STS_BURST_COUNT_MASK;
Vadim Bendebury5e124722011-10-17 08:36:14 +000078}
79
Vadim Bendebury5e124722011-10-17 08:36:14 +000080/* TPM access wrappers to support tracing */
Simon Glassd616ba52015-08-22 18:31:39 -060081static u8 tpm_read_byte(struct tpm_tis_lpc_priv *priv, const u8 *ptr)
Vadim Bendebury5e124722011-10-17 08:36:14 +000082{
83 u8 ret = readb(ptr);
84 debug(PREFIX "Read reg 0x%4.4x returns 0x%2.2x\n",
Simon Glassd616ba52015-08-22 18:31:39 -060085 (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
Vadim Bendebury5e124722011-10-17 08:36:14 +000086 return ret;
87}
88
Simon Glassd616ba52015-08-22 18:31:39 -060089static u32 tpm_read_word(struct tpm_tis_lpc_priv *priv, const u32 *ptr)
Vadim Bendebury5e124722011-10-17 08:36:14 +000090{
91 u32 ret = readl(ptr);
92 debug(PREFIX "Read reg 0x%4.4x returns 0x%8.8x\n",
Simon Glassd616ba52015-08-22 18:31:39 -060093 (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, ret);
Vadim Bendebury5e124722011-10-17 08:36:14 +000094 return ret;
95}
96
Simon Glassd616ba52015-08-22 18:31:39 -060097static void tpm_write_byte(struct tpm_tis_lpc_priv *priv, u8 value, u8 *ptr)
Vadim Bendebury5e124722011-10-17 08:36:14 +000098{
99 debug(PREFIX "Write reg 0x%4.4x with 0x%2.2x\n",
Simon Glassd616ba52015-08-22 18:31:39 -0600100 (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000101 writeb(value, ptr);
102}
103
Simon Glassd616ba52015-08-22 18:31:39 -0600104static void tpm_write_word(struct tpm_tis_lpc_priv *priv, u32 value,
105 u32 *ptr)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000106{
107 debug(PREFIX "Write reg 0x%4.4x with 0x%8.8x\n",
Simon Glassd616ba52015-08-22 18:31:39 -0600108 (u32)(uintptr_t)ptr - (u32)(uintptr_t)priv->regs, value);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000109 writel(value, ptr);
110}
111
112/*
113 * tis_wait_reg()
114 *
115 * Wait for at least a second for a register to change its state to match the
116 * expected state. Normally the transition happens within microseconds.
117 *
118 * @reg - pointer to the TPM register
119 * @mask - bitmask for the bitfield(s) to watch
120 * @expected - value the field(s) are supposed to be set to
121 *
122 * Returns the register contents in case the expected value was found in the
Simon Glassd616ba52015-08-22 18:31:39 -0600123 * appropriate register bits, or -ETIMEDOUT on timeout.
Vadim Bendebury5e124722011-10-17 08:36:14 +0000124 */
Simon Glassd616ba52015-08-22 18:31:39 -0600125static int tis_wait_reg(struct tpm_tis_lpc_priv *priv, u32 *reg, u8 mask,
126 u8 expected)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000127{
128 u32 time_us = MAX_DELAY_US;
129
130 while (time_us > 0) {
Simon Glassd616ba52015-08-22 18:31:39 -0600131 u32 value = tpm_read_word(priv, reg);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000132 if ((value & mask) == expected)
133 return value;
134 udelay(1); /* 1 us */
135 time_us--;
136 }
Simon Glassd616ba52015-08-22 18:31:39 -0600137
138 return -ETIMEDOUT;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000139}
140
141/*
142 * Probe the TPM device and try determining its manufacturer/device name.
143 *
Simon Glassd616ba52015-08-22 18:31:39 -0600144 * Returns 0 on success, -ve on error
Vadim Bendebury5e124722011-10-17 08:36:14 +0000145 */
Simon Glassd616ba52015-08-22 18:31:39 -0600146static int tpm_tis_lpc_probe(struct udevice *dev)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000147{
Simon Glassd616ba52015-08-22 18:31:39 -0600148 struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
149 u32 vid, did;
150 fdt_addr_t addr;
151 u32 didvid;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000152
Simon Glassd616ba52015-08-22 18:31:39 -0600153 addr = dev_get_addr(dev);
154 if (addr == FDT_ADDR_T_NONE)
155 return -EINVAL;
156 priv->regs = map_sysmem(addr, 0);
157 didvid = tpm_read_word(priv, &priv->regs[0].did_vid);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000158
159 vid = didvid & 0xffff;
160 did = (didvid >> 16) & 0xffff;
Simon Glassd616ba52015-08-22 18:31:39 -0600161 if (vid != 0x15d1 || did != 0xb) {
162 debug("Invalid vendor/device ID %04x/%04x\n", vid, did);
163 return -ENOSYS;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000164 }
165
Simon Glassd616ba52015-08-22 18:31:39 -0600166 debug("Found TPM %s by %s\n", "SLB9635 TT 1.2", "Infineon");
167
Vadim Bendebury5e124722011-10-17 08:36:14 +0000168 return 0;
169}
170
171/*
172 * tis_senddata()
173 *
174 * send the passed in data to the TPM device.
175 *
176 * @data - address of the data to send, byte by byte
177 * @len - length of the data to send
178 *
Simon Glassd616ba52015-08-22 18:31:39 -0600179 * Returns 0 on success, -ve on error (in case the device does not accept
180 * the entire command).
Vadim Bendebury5e124722011-10-17 08:36:14 +0000181 */
Simon Glassd616ba52015-08-22 18:31:39 -0600182static int tis_senddata(struct udevice *dev, const u8 *data, size_t len)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000183{
Simon Glassd616ba52015-08-22 18:31:39 -0600184 struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
185 struct tpm_locality *regs = priv->regs;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000186 u32 offset = 0;
187 u16 burst = 0;
188 u32 max_cycles = 0;
189 u8 locality = 0;
190 u32 value;
191
Simon Glassd616ba52015-08-22 18:31:39 -0600192 value = tis_wait_reg(priv, &regs[locality].tpm_status,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000193 TIS_STS_COMMAND_READY, TIS_STS_COMMAND_READY);
Simon Glassd616ba52015-08-22 18:31:39 -0600194 if (value == -ETIMEDOUT) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000195 printf("%s:%d - failed to get 'command_ready' status\n",
196 __FILE__, __LINE__);
Simon Glassd616ba52015-08-22 18:31:39 -0600197 return value;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000198 }
199 burst = burst_count(value);
200
201 while (1) {
202 unsigned count;
203
204 /* Wait till the device is ready to accept more data. */
205 while (!burst) {
206 if (max_cycles++ == MAX_DELAY_US) {
Simon Glass22230e92016-09-25 21:33:20 -0600207 printf("%s:%d failed to feed %zd bytes of %zd\n",
Vadim Bendebury5e124722011-10-17 08:36:14 +0000208 __FILE__, __LINE__, len - offset, len);
Simon Glassd616ba52015-08-22 18:31:39 -0600209 return -ETIMEDOUT;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000210 }
211 udelay(1);
Simon Glassd616ba52015-08-22 18:31:39 -0600212 burst = burst_count(tpm_read_word(priv,
213 &regs[locality].tpm_status));
Vadim Bendebury5e124722011-10-17 08:36:14 +0000214 }
215
216 max_cycles = 0;
217
218 /*
219 * Calculate number of bytes the TPM is ready to accept in one
220 * shot.
221 *
222 * We want to send the last byte outside of the loop (hence
223 * the -1 below) to make sure that the 'expected' status bit
224 * changes to zero exactly after the last byte is fed into the
225 * FIFO.
226 */
Simon Glass22230e92016-09-25 21:33:20 -0600227 count = min((size_t)burst, len - offset - 1);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000228 while (count--)
Simon Glassd616ba52015-08-22 18:31:39 -0600229 tpm_write_byte(priv, data[offset++],
230 &regs[locality].data);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000231
Simon Glassd616ba52015-08-22 18:31:39 -0600232 value = tis_wait_reg(priv, &regs[locality].tpm_status,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000233 TIS_STS_VALID, TIS_STS_VALID);
234
Simon Glassd616ba52015-08-22 18:31:39 -0600235 if ((value == -ETIMEDOUT) || !(value & TIS_STS_EXPECT)) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000236 printf("%s:%d TPM command feed overflow\n",
237 __FILE__, __LINE__);
Simon Glassd616ba52015-08-22 18:31:39 -0600238 return value == -ETIMEDOUT ? value : -EIO;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000239 }
240
241 burst = burst_count(value);
242 if ((offset == (len - 1)) && burst) {
243 /*
244 * We need to be able to send the last byte to the
245 * device, so burst size must be nonzero before we
246 * break out.
247 */
248 break;
249 }
250 }
251
252 /* Send the last byte. */
Simon Glassd616ba52015-08-22 18:31:39 -0600253 tpm_write_byte(priv, data[offset++], &regs[locality].data);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000254 /*
255 * Verify that TPM does not expect any more data as part of this
256 * command.
257 */
Simon Glassd616ba52015-08-22 18:31:39 -0600258 value = tis_wait_reg(priv, &regs[locality].tpm_status,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000259 TIS_STS_VALID, TIS_STS_VALID);
Simon Glassd616ba52015-08-22 18:31:39 -0600260 if ((value == -ETIMEDOUT) || (value & TIS_STS_EXPECT)) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000261 printf("%s:%d unexpected TPM status 0x%x\n",
262 __FILE__, __LINE__, value);
Simon Glassd616ba52015-08-22 18:31:39 -0600263 return value == -ETIMEDOUT ? value : -EIO;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000264 }
265
266 /* OK, sitting pretty, let's start the command execution. */
Simon Glassd616ba52015-08-22 18:31:39 -0600267 tpm_write_word(priv, TIS_STS_TPM_GO, &regs[locality].tpm_status);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000268 return 0;
269}
270
271/*
272 * tis_readresponse()
273 *
274 * read the TPM device response after a command was issued.
275 *
276 * @buffer - address where to read the response, byte by byte.
277 * @len - pointer to the size of buffer
278 *
279 * On success stores the number of received bytes to len and returns 0. On
280 * errors (misformatted TPM data or synchronization problems) returns
Simon Glassd616ba52015-08-22 18:31:39 -0600281 * -ve value.
Vadim Bendebury5e124722011-10-17 08:36:14 +0000282 */
Simon Glassd616ba52015-08-22 18:31:39 -0600283static int tis_readresponse(struct udevice *dev, u8 *buffer, size_t len)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000284{
Simon Glassd616ba52015-08-22 18:31:39 -0600285 struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
286 struct tpm_locality *regs = priv->regs;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000287 u16 burst;
288 u32 value;
289 u32 offset = 0;
290 u8 locality = 0;
291 const u32 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID;
Simon Glassd616ba52015-08-22 18:31:39 -0600292 u32 expected_count = len;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000293 int max_cycles = 0;
294
295 /* Wait for the TPM to process the command. */
Simon Glassd616ba52015-08-22 18:31:39 -0600296 value = tis_wait_reg(priv, &regs[locality].tpm_status,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000297 has_data, has_data);
Simon Glassd616ba52015-08-22 18:31:39 -0600298 if (value == -ETIMEDOUT) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000299 printf("%s:%d failed processing command\n",
300 __FILE__, __LINE__);
Simon Glassd616ba52015-08-22 18:31:39 -0600301 return value;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000302 }
303
304 do {
305 while ((burst = burst_count(value)) == 0) {
306 if (max_cycles++ == MAX_DELAY_US) {
307 printf("%s:%d TPM stuck on read\n",
308 __FILE__, __LINE__);
Simon Glassd616ba52015-08-22 18:31:39 -0600309 return -EIO;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000310 }
311 udelay(1);
Simon Glassd616ba52015-08-22 18:31:39 -0600312 value = tpm_read_word(priv, &regs[locality].tpm_status);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000313 }
314
315 max_cycles = 0;
316
317 while (burst-- && (offset < expected_count)) {
Simon Glassd616ba52015-08-22 18:31:39 -0600318 buffer[offset++] = tpm_read_byte(priv,
319 &regs[locality].data);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000320
321 if (offset == 6) {
322 /*
323 * We got the first six bytes of the reply,
324 * let's figure out how many bytes to expect
325 * total - it is stored as a 4 byte number in
326 * network order, starting with offset 2 into
327 * the body of the reply.
328 */
329 u32 real_length;
330 memcpy(&real_length,
331 buffer + 2,
332 sizeof(real_length));
333 expected_count = be32_to_cpu(real_length);
334
335 if ((expected_count < offset) ||
Simon Glassd616ba52015-08-22 18:31:39 -0600336 (expected_count > len)) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000337 printf("%s:%d bad response size %d\n",
338 __FILE__, __LINE__,
339 expected_count);
Simon Glassd616ba52015-08-22 18:31:39 -0600340 return -ENOSPC;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000341 }
342 }
343 }
344
345 /* Wait for the next portion. */
Simon Glassd616ba52015-08-22 18:31:39 -0600346 value = tis_wait_reg(priv, &regs[locality].tpm_status,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000347 TIS_STS_VALID, TIS_STS_VALID);
Simon Glassd616ba52015-08-22 18:31:39 -0600348 if (value == -ETIMEDOUT) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000349 printf("%s:%d failed to read response\n",
350 __FILE__, __LINE__);
Simon Glassd616ba52015-08-22 18:31:39 -0600351 return value;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000352 }
353
354 if (offset == expected_count)
355 break; /* We got all we needed. */
356
357 } while ((value & has_data) == has_data);
358
359 /*
360 * Make sure we indeed read all there was. The TIS_STS_VALID bit is
361 * known to be set.
362 */
363 if (value & TIS_STS_DATA_AVAILABLE) {
364 printf("%s:%d wrong receive status %x\n",
365 __FILE__, __LINE__, value);
Simon Glassd616ba52015-08-22 18:31:39 -0600366 return -EBADMSG;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000367 }
368
369 /* Tell the TPM that we are done. */
Simon Glassd616ba52015-08-22 18:31:39 -0600370 tpm_write_word(priv, TIS_STS_COMMAND_READY,
371 &regs[locality].tpm_status);
372
373 return offset;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000374}
375
Simon Glassd616ba52015-08-22 18:31:39 -0600376static int tpm_tis_lpc_open(struct udevice *dev)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000377{
Simon Glassd616ba52015-08-22 18:31:39 -0600378 struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
379 struct tpm_locality *regs = priv->regs;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000380 u8 locality = 0; /* we use locality zero for everything. */
Simon Glassd616ba52015-08-22 18:31:39 -0600381 int ret;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000382
Vadim Bendebury5e124722011-10-17 08:36:14 +0000383 /* now request access to locality. */
Simon Glassd616ba52015-08-22 18:31:39 -0600384 tpm_write_word(priv, TIS_ACCESS_REQUEST_USE, &regs[locality].access);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000385
386 /* did we get a lock? */
Simon Glassd616ba52015-08-22 18:31:39 -0600387 ret = tis_wait_reg(priv, &regs[locality].access,
Vadim Bendebury5e124722011-10-17 08:36:14 +0000388 TIS_ACCESS_ACTIVE_LOCALITY,
Simon Glassd616ba52015-08-22 18:31:39 -0600389 TIS_ACCESS_ACTIVE_LOCALITY);
390 if (ret == -ETIMEDOUT) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000391 printf("%s:%d - failed to lock locality %d\n",
392 __FILE__, __LINE__, locality);
Simon Glassd616ba52015-08-22 18:31:39 -0600393 return ret;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000394 }
395
Simon Glassd616ba52015-08-22 18:31:39 -0600396 tpm_write_word(priv, TIS_STS_COMMAND_READY,
397 &regs[locality].tpm_status);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000398 return 0;
399}
400
Simon Glassd616ba52015-08-22 18:31:39 -0600401static int tpm_tis_lpc_close(struct udevice *dev)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000402{
Simon Glassd616ba52015-08-22 18:31:39 -0600403 struct tpm_tis_lpc_priv *priv = dev_get_priv(dev);
404 struct tpm_locality *regs = priv->regs;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000405 u8 locality = 0;
406
Simon Glassd616ba52015-08-22 18:31:39 -0600407 if (tpm_read_word(priv, &regs[locality].access) &
Vadim Bendebury5e124722011-10-17 08:36:14 +0000408 TIS_ACCESS_ACTIVE_LOCALITY) {
Simon Glassd616ba52015-08-22 18:31:39 -0600409 tpm_write_word(priv, TIS_ACCESS_ACTIVE_LOCALITY,
410 &regs[locality].access);
Vadim Bendebury5e124722011-10-17 08:36:14 +0000411
Simon Glassd616ba52015-08-22 18:31:39 -0600412 if (tis_wait_reg(priv, &regs[locality].access,
413 TIS_ACCESS_ACTIVE_LOCALITY, 0) == -ETIMEDOUT) {
Vadim Bendebury5e124722011-10-17 08:36:14 +0000414 printf("%s:%d - failed to release locality %d\n",
415 __FILE__, __LINE__, locality);
Simon Glassd616ba52015-08-22 18:31:39 -0600416 return -ETIMEDOUT;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000417 }
418 }
419 return 0;
420}
421
Simon Glassd616ba52015-08-22 18:31:39 -0600422static int tpm_tis_get_desc(struct udevice *dev, char *buf, int size)
Vadim Bendebury5e124722011-10-17 08:36:14 +0000423{
Simon Glassd616ba52015-08-22 18:31:39 -0600424 if (size < 50)
425 return -ENOSPC;
Vadim Bendebury5e124722011-10-17 08:36:14 +0000426
Simon Glassd616ba52015-08-22 18:31:39 -0600427 return snprintf(buf, size, "1.2 TPM (vendor %s, chip %s)",
428 "Infineon", "SLB9635 TT 1.2");
Vadim Bendebury5e124722011-10-17 08:36:14 +0000429}
Simon Glassd616ba52015-08-22 18:31:39 -0600430
431
432static const struct tpm_ops tpm_tis_lpc_ops = {
433 .open = tpm_tis_lpc_open,
434 .close = tpm_tis_lpc_close,
435 .get_desc = tpm_tis_get_desc,
436 .send = tis_senddata,
437 .recv = tis_readresponse,
438};
439
440static const struct udevice_id tpm_tis_lpc_ids[] = {
441 { .compatible = "infineon,slb9635lpc" },
442 { }
443};
444
445U_BOOT_DRIVER(tpm_tis_lpc) = {
446 .name = "tpm_tis_lpc",
447 .id = UCLASS_TPM,
448 .of_match = tpm_tis_lpc_ids,
449 .ops = &tpm_tis_lpc_ops,
450 .probe = tpm_tis_lpc_probe,
451 .priv_auto_alloc_size = sizeof(struct tpm_tis_lpc_priv),
452};