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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Masahiro Yamadac21f5852017-02-17 16:17:22 +09002/*
3 * Copyright (C) 2017 Socionext Inc.
Masahiro Yamadac21f5852017-02-17 16:17:22 +09004 */
5
Masahiro Yamadaa184fb82017-09-15 21:43:22 +09006#include <linux/bitops.h>
Masahiro Yamadac21f5852017-02-17 16:17:22 +09007#include <linux/io.h>
8
9#include "../init.h"
Masahiro Yamadaa184fb82017-09-15 21:43:22 +090010#include "../sc64-regs.h"
Masahiro Yamadac21f5852017-02-17 16:17:22 +090011
12#define SDCTRL_EMMC_HW_RESET 0x59810280
13
14void uniphier_ld20_clk_init(void)
15{
Masahiro Yamadaa184fb82017-09-15 21:43:22 +090016 u32 tmp;
17
Masahiro Yamada739ba412019-07-10 20:07:41 +090018 tmp = readl(sc_base + SC_RSTCTRL6);
Masahiro Yamadaa184fb82017-09-15 21:43:22 +090019 tmp |= BIT(8); /* Mali */
Masahiro Yamada739ba412019-07-10 20:07:41 +090020 writel(tmp, sc_base + SC_RSTCTRL6);
Masahiro Yamadaa184fb82017-09-15 21:43:22 +090021
Masahiro Yamada739ba412019-07-10 20:07:41 +090022 tmp = readl(sc_base + SC_CLKCTRL6);
Masahiro Yamadaa184fb82017-09-15 21:43:22 +090023 tmp |= BIT(8); /* Mali */
Masahiro Yamada739ba412019-07-10 20:07:41 +090024 writel(tmp, sc_base + SC_CLKCTRL6);
Masahiro Yamadaa184fb82017-09-15 21:43:22 +090025
Masahiro Yamadac21f5852017-02-17 16:17:22 +090026 /* TODO: use "mmc-pwrseq-emmc" */
27 writel(1, SDCTRL_EMMC_HW_RESET);
28}