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Dipen Dudhatd789b5f2011-01-20 16:29:35 +05301/*
2 * Copyright 2010-2011 Freescale Semiconductor, Inc.
3 * Author: Dipen Dudhat <dipen.dudhat@freescale.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Dipen Dudhatd789b5f2011-01-20 16:29:35 +05306 */
7
8#include <common.h>
York Sun0b665132013-10-22 12:39:02 -07009#include <fsl_ifc.h>
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053010
11void print_ifc_regs(void)
12{
13 int i, j;
14
15 printf("IFC Controller Registers\n");
Mingkai Hu362ee042013-05-16 10:18:13 +080016 for (i = 0; i < CONFIG_SYS_FSL_IFC_BANK_COUNT; i++) {
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053017 printf("CSPR%d:0x%08X\tAMASK%d:0x%08X\tCSOR%d:0x%08X\n",
18 i, get_ifc_cspr(i), i, get_ifc_amask(i),
19 i, get_ifc_csor(i));
20 for (j = 0; j < 4; j++)
21 printf("IFC_FTIM%d:0x%08X\n", j, get_ifc_ftim(i, j));
22 }
23}
24
25void init_early_memctl_regs(void)
26{
27#if defined(CONFIG_SYS_CSPR0) && defined(CONFIG_SYS_CSOR0)
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053028 set_ifc_ftim(IFC_CS0, IFC_FTIM0, CONFIG_SYS_CS0_FTIM0);
29 set_ifc_ftim(IFC_CS0, IFC_FTIM1, CONFIG_SYS_CS0_FTIM1);
30 set_ifc_ftim(IFC_CS0, IFC_FTIM2, CONFIG_SYS_CS0_FTIM2);
31 set_ifc_ftim(IFC_CS0, IFC_FTIM3, CONFIG_SYS_CS0_FTIM3);
Dipen Dudhatd7da1482011-04-08 16:04:51 +053032
Prabhakar Kushwaha74fa22e2013-04-16 13:27:44 +053033#ifndef CONFIG_A003399_NOR_WORKAROUND
Kumar Galaffdf8892012-08-17 08:20:25 +000034#ifdef CONFIG_SYS_CSPR0_EXT
35 set_ifc_cspr_ext(IFC_CS0, CONFIG_SYS_CSPR0_EXT);
36#endif
Prabhakar Kushwaha71220f82013-10-04 10:05:36 +053037#ifdef CONFIG_SYS_CSOR0_EXT
38 set_ifc_csor_ext(IFC_CS0, CONFIG_SYS_CSOR0_EXT);
39#endif
Dipen Dudhatd7da1482011-04-08 16:04:51 +053040 set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0);
41 set_ifc_amask(IFC_CS0, CONFIG_SYS_AMASK0);
42 set_ifc_csor(IFC_CS0, CONFIG_SYS_CSOR0);
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053043#endif
Poonam Aggrwalbc6bbd62011-07-07 20:36:47 +053044#endif
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053045
Kumar Galaffdf8892012-08-17 08:20:25 +000046#ifdef CONFIG_SYS_CSPR1_EXT
47 set_ifc_cspr_ext(IFC_CS1, CONFIG_SYS_CSPR1_EXT);
48#endif
Prabhakar Kushwaha71220f82013-10-04 10:05:36 +053049#ifdef CONFIG_SYS_CSOR1_EXT
50 set_ifc_csor_ext(IFC_CS1, CONFIG_SYS_CSOR1_EXT);
51#endif
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053052#if defined(CONFIG_SYS_CSPR1) && defined(CONFIG_SYS_CSOR1)
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053053 set_ifc_ftim(IFC_CS1, IFC_FTIM0, CONFIG_SYS_CS1_FTIM0);
54 set_ifc_ftim(IFC_CS1, IFC_FTIM1, CONFIG_SYS_CS1_FTIM1);
55 set_ifc_ftim(IFC_CS1, IFC_FTIM2, CONFIG_SYS_CS1_FTIM2);
56 set_ifc_ftim(IFC_CS1, IFC_FTIM3, CONFIG_SYS_CS1_FTIM3);
Dipen Dudhatd7da1482011-04-08 16:04:51 +053057
58 set_ifc_csor(IFC_CS1, CONFIG_SYS_CSOR1);
59 set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1);
60 set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1);
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053061#endif
62
Kumar Galaffdf8892012-08-17 08:20:25 +000063#ifdef CONFIG_SYS_CSPR2_EXT
64 set_ifc_cspr_ext(IFC_CS2, CONFIG_SYS_CSPR2_EXT);
65#endif
Prabhakar Kushwaha71220f82013-10-04 10:05:36 +053066#ifdef CONFIG_SYS_CSOR2_EXT
67 set_ifc_csor_ext(IFC_CS2, CONFIG_SYS_CSOR2_EXT);
68#endif
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053069#if defined(CONFIG_SYS_CSPR2) && defined(CONFIG_SYS_CSOR2)
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053070 set_ifc_ftim(IFC_CS2, IFC_FTIM0, CONFIG_SYS_CS2_FTIM0);
71 set_ifc_ftim(IFC_CS2, IFC_FTIM1, CONFIG_SYS_CS2_FTIM1);
72 set_ifc_ftim(IFC_CS2, IFC_FTIM2, CONFIG_SYS_CS2_FTIM2);
73 set_ifc_ftim(IFC_CS2, IFC_FTIM3, CONFIG_SYS_CS2_FTIM3);
74
Dipen Dudhatd7da1482011-04-08 16:04:51 +053075 set_ifc_csor(IFC_CS2, CONFIG_SYS_CSOR2);
76 set_ifc_amask(IFC_CS2, CONFIG_SYS_AMASK2);
77 set_ifc_cspr(IFC_CS2, CONFIG_SYS_CSPR2);
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053078#endif
79
Kumar Galaffdf8892012-08-17 08:20:25 +000080#ifdef CONFIG_SYS_CSPR3_EXT
81 set_ifc_cspr_ext(IFC_CS3, CONFIG_SYS_CSPR3_EXT);
82#endif
Prabhakar Kushwaha71220f82013-10-04 10:05:36 +053083#ifdef CONFIG_SYS_CSOR3_EXT
84 set_ifc_csor_ext(IFC_CS3, CONFIG_SYS_CSOR3_EXT);
85#endif
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053086#if defined(CONFIG_SYS_CSPR3) && defined(CONFIG_SYS_CSOR3)
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053087 set_ifc_ftim(IFC_CS3, IFC_FTIM0, CONFIG_SYS_CS3_FTIM0);
88 set_ifc_ftim(IFC_CS3, IFC_FTIM1, CONFIG_SYS_CS3_FTIM1);
89 set_ifc_ftim(IFC_CS3, IFC_FTIM2, CONFIG_SYS_CS3_FTIM2);
90 set_ifc_ftim(IFC_CS3, IFC_FTIM3, CONFIG_SYS_CS3_FTIM3);
Dipen Dudhatd7da1482011-04-08 16:04:51 +053091
92 set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3);
93 set_ifc_amask(IFC_CS3, CONFIG_SYS_AMASK3);
94 set_ifc_csor(IFC_CS3, CONFIG_SYS_CSOR3);
Dipen Dudhatd789b5f2011-01-20 16:29:35 +053095#endif
Mingkai Hu362ee042013-05-16 10:18:13 +080096
97#ifdef CONFIG_SYS_CSPR4_EXT
98 set_ifc_cspr_ext(IFC_CS4, CONFIG_SYS_CSPR4_EXT);
99#endif
Prabhakar Kushwaha71220f82013-10-04 10:05:36 +0530100#ifdef CONFIG_SYS_CSOR4_EXT
101 set_ifc_csor_ext(IFC_CS4, CONFIG_SYS_CSOR4_EXT);
102#endif
Mingkai Hu362ee042013-05-16 10:18:13 +0800103#if defined(CONFIG_SYS_CSPR4) && defined(CONFIG_SYS_CSOR4)
104 set_ifc_ftim(IFC_CS4, IFC_FTIM0, CONFIG_SYS_CS4_FTIM0);
105 set_ifc_ftim(IFC_CS4, IFC_FTIM1, CONFIG_SYS_CS4_FTIM1);
106 set_ifc_ftim(IFC_CS4, IFC_FTIM2, CONFIG_SYS_CS4_FTIM2);
107 set_ifc_ftim(IFC_CS4, IFC_FTIM3, CONFIG_SYS_CS4_FTIM3);
108
109 set_ifc_cspr(IFC_CS4, CONFIG_SYS_CSPR4);
110 set_ifc_amask(IFC_CS4, CONFIG_SYS_AMASK4);
111 set_ifc_csor(IFC_CS4, CONFIG_SYS_CSOR4);
112#endif
113
114#ifdef CONFIG_SYS_CSPR5_EXT
115 set_ifc_cspr_ext(IFC_CS5, CONFIG_SYS_CSPR5_EXT);
116#endif
Prabhakar Kushwaha71220f82013-10-04 10:05:36 +0530117#ifdef CONFIG_SYS_CSOR5_EXT
118 set_ifc_csor_ext(IFC_CS5, CONFIG_SYS_CSOR5_EXT);
119#endif
Mingkai Hu362ee042013-05-16 10:18:13 +0800120#if defined(CONFIG_SYS_CSPR5) && defined(CONFIG_SYS_CSOR5)
121 set_ifc_ftim(IFC_CS5, IFC_FTIM0, CONFIG_SYS_CS5_FTIM0);
122 set_ifc_ftim(IFC_CS5, IFC_FTIM1, CONFIG_SYS_CS5_FTIM1);
123 set_ifc_ftim(IFC_CS5, IFC_FTIM2, CONFIG_SYS_CS5_FTIM2);
124 set_ifc_ftim(IFC_CS5, IFC_FTIM3, CONFIG_SYS_CS5_FTIM3);
125
126 set_ifc_cspr(IFC_CS5, CONFIG_SYS_CSPR5);
127 set_ifc_amask(IFC_CS5, CONFIG_SYS_AMASK5);
128 set_ifc_csor(IFC_CS5, CONFIG_SYS_CSOR5);
129#endif
130
131#ifdef CONFIG_SYS_CSPR6_EXT
132 set_ifc_cspr_ext(IFC_CS6, CONFIG_SYS_CSPR6_EXT);
133#endif
Prabhakar Kushwaha71220f82013-10-04 10:05:36 +0530134#ifdef CONFIG_SYS_CSOR6_EXT
135 set_ifc_csor_ext(IFC_CS6, CONFIG_SYS_CSOR6_EXT);
136#endif
Mingkai Hu362ee042013-05-16 10:18:13 +0800137#if defined(CONFIG_SYS_CSPR6) && defined(CONFIG_SYS_CSOR6)
138 set_ifc_ftim(IFC_CS6, IFC_FTIM0, CONFIG_SYS_CS6_FTIM0);
139 set_ifc_ftim(IFC_CS6, IFC_FTIM1, CONFIG_SYS_CS6_FTIM1);
140 set_ifc_ftim(IFC_CS6, IFC_FTIM2, CONFIG_SYS_CS6_FTIM2);
141 set_ifc_ftim(IFC_CS6, IFC_FTIM3, CONFIG_SYS_CS6_FTIM3);
142
143 set_ifc_cspr(IFC_CS6, CONFIG_SYS_CSPR6);
144 set_ifc_amask(IFC_CS6, CONFIG_SYS_AMASK6);
145 set_ifc_csor(IFC_CS6, CONFIG_SYS_CSOR6);
146#endif
147
148#ifdef CONFIG_SYS_CSPR7_EXT
149 set_ifc_cspr_ext(IFC_CS7, CONFIG_SYS_CSPR7_EXT);
150#endif
Prabhakar Kushwaha71220f82013-10-04 10:05:36 +0530151#ifdef CONFIG_SYS_CSOR7_EXT
152 set_ifc_csor_ext(IFC_CS7, CONFIG_SYS_CSOR7_EXT);
153#endif
Mingkai Hu362ee042013-05-16 10:18:13 +0800154#if defined(CONFIG_SYS_CSPR7) && defined(CONFIG_SYS_CSOR7)
155 set_ifc_ftim(IFC_CS7, IFC_FTIM0, CONFIG_SYS_CS7_FTIM0);
156 set_ifc_ftim(IFC_CS7, IFC_FTIM1, CONFIG_SYS_CS7_FTIM1);
157 set_ifc_ftim(IFC_CS7, IFC_FTIM2, CONFIG_SYS_CS7_FTIM2);
158 set_ifc_ftim(IFC_CS7, IFC_FTIM3, CONFIG_SYS_CS7_FTIM3);
159
160 set_ifc_cspr(IFC_CS7, CONFIG_SYS_CSPR7);
161 set_ifc_amask(IFC_CS7, CONFIG_SYS_AMASK7);
162 set_ifc_csor(IFC_CS7, CONFIG_SYS_CSOR7);
163#endif
Dipen Dudhatd789b5f2011-01-20 16:29:35 +0530164}
York Sune77224e2014-03-19 13:52:34 -0700165
166void init_final_memctl_regs(void)
167{
168#ifdef CONFIG_SYS_CSPR0_FINAL
169 set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0_FINAL);
170#endif
171}