blob: 7ba1948659f96b72d6f88ed284da29750e29d01b [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Vasutbd390502017-07-21 23:15:21 +02002/*
3 * board/renesas/ulcb/ulcb.c
4 * This file is ULCB board support.
5 *
6 * Copyright (C) 2017 Renesas Electronics Corporation
Marek Vasutbd390502017-07-21 23:15:21 +02007 */
8
9#include <common.h>
Simon Glass4d72caa2020-05-10 11:40:01 -060010#include <image.h>
Simon Glass691d7192020-05-10 11:40:02 -060011#include <init.h>
Marek Vasutbd390502017-07-21 23:15:21 +020012#include <malloc.h>
13#include <netdev.h>
14#include <dm.h>
Simon Glass401d1c42020-10-30 21:38:53 -060015#include <asm/global_data.h>
Marek Vasutbd390502017-07-21 23:15:21 +020016#include <dm/platform_data/serial_sh.h>
17#include <asm/processor.h>
18#include <asm/mach-types.h>
19#include <asm/io.h>
Simon Glasscd93d622020-05-10 11:40:13 -060020#include <linux/bitops.h>
Marek Vasutbd390502017-07-21 23:15:21 +020021#include <linux/errno.h>
22#include <asm/arch/sys_proto.h>
23#include <asm/gpio.h>
24#include <asm/arch/gpio.h>
25#include <asm/arch/rmobile.h>
26#include <asm/arch/rcar-mstp.h>
27#include <asm/arch/sh_sdhi.h>
28#include <i2c.h>
29#include <mmc.h>
30
31DECLARE_GLOBAL_DATA_PTR;
32
Marek Vasutbd390502017-07-21 23:15:21 +020033#define DVFS_MSTP926 BIT(26)
Marek Vasutef603232017-09-12 19:07:22 +020034#define HSUSB_MSTP704 BIT(4) /* HSUSB */
Marek Vasutbd390502017-07-21 23:15:21 +020035
Marek Vasutbd390502017-07-21 23:15:21 +020036int board_early_init_f(void)
37{
Marek Vasutbd390502017-07-21 23:15:21 +020038#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
39 /* DVFS for reset */
Hiroyuki Yokoyamacf97b222018-09-26 16:00:09 +090040 mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
Marek Vasutbd390502017-07-21 23:15:21 +020041#endif
42 return 0;
43}
44
Marek Vasutef603232017-09-12 19:07:22 +020045/* HSUSB block registers */
46#define HSUSB_REG_LPSTS 0xE6590102
47#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
48#define HSUSB_REG_UGCTRL2 0xE6590184
49#define HSUSB_REG_UGCTRL2_USB0SEL 0x30
50#define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10
51
Marek Vasutbd390502017-07-21 23:15:21 +020052int board_init(void)
53{
54 /* adress of boot parameters */
55 gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
56
Marek Vasutbd390502017-07-21 23:15:21 +020057 /* USB1 pull-up */
58 setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
59
Marek Vasutef603232017-09-12 19:07:22 +020060 /* Configure the HSUSB block */
Hiroyuki Yokoyamacf97b222018-09-26 16:00:09 +090061 mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
Marek Vasutef603232017-09-12 19:07:22 +020062 /* Choice USB0SEL */
63 clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
64 HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
65 /* low power status */
66 setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);
67
Marek Vasut6f380852017-08-20 17:13:48 +020068 return 0;
Marek Vasutbd390502017-07-21 23:15:21 +020069}
Marek Vasutbd390502017-07-21 23:15:21 +020070
Marek Vasut04513802018-12-04 01:44:34 +010071#ifdef CONFIG_MULTI_DTB_FIT
72int board_fit_config_name_match(const char *name)
73{
74 /* PRR driver is not available yet */
75 u32 cpu_type = rmobile_get_cpu_type();
76
77 if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
Marek Vasutc7d68122020-04-04 16:12:48 +020078 !strcmp(name, "r8a77950-ulcb-u-boot"))
Marek Vasut04513802018-12-04 01:44:34 +010079 return 0;
80
81 if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
Marek Vasutc7d68122020-04-04 16:12:48 +020082 !strcmp(name, "r8a77960-ulcb-u-boot"))
Marek Vasut04513802018-12-04 01:44:34 +010083 return 0;
84
Marek Vasutc4ea43d2019-03-04 12:34:50 +010085 if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
Marek Vasutc7d68122020-04-04 16:12:48 +020086 !strcmp(name, "r8a77965-ulcb-u-boot"))
Marek Vasutc4ea43d2019-03-04 12:34:50 +010087 return 0;
88
Marek Vasut04513802018-12-04 01:44:34 +010089 return -1;
90}
91#endif