blob: 81a7226d62d8753ab5df0077db4685062acb2423 [file] [log] [blame]
Nobuhiro Iwamatsue525d342016-04-01 03:51:36 +09001/*
2 * include/configs/salvator-x.h
3 * This file is Salvator-X board configuration.
4 *
5 * Copyright (C) 2015 Renesas Electronics Corporation
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __SALVATOR_X_H
11#define __SALVATOR_X_H
12
13#undef DEBUG
14
15#define CONFIG_RCAR_BOARD_STRING "Salvator-X"
16
17#include "rcar-gen3-common.h"
18
19/* SCIF */
20#define CONFIG_SCIF_CONSOLE
21#define CONFIG_CONS_SCIF2
22#define CONFIG_CONS_INDEX 2
23#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
24
25/* [A] Hyper Flash */
26/* use to RPC(SPI Multi I/O Bus Controller) */
Nobuhiro Iwamatsue525d342016-04-01 03:51:36 +090027#define CONFIG_ENV_IS_NOWHERE
28
29/* Board Clock */
30/* XTAL_CLK : 33.33MHz */
31#define RCAR_XTAL_CLK 33333333u
32#define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK
33/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
34/* CPclk 16.66MHz, S3D2 133.33MHz */
35#define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
36#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2)
37#define CONFIG_S3D2_CLK_FREQ (266666666u/2)
38
39/* Generic Timer Definitions (use in assembler source) */
40#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
41
42/* Generic Interrupt Controller Definitions */
43#define CONFIG_GICV2
44#define GICD_BASE 0xF1010000
45#define GICC_BASE 0xF1020000
46
47/* Module stop status bits */
48/* MFIS, SCIF1 */
49#define CONFIG_SMSTP2_ENA 0x00002040
50/* INTC-AP, IRQC */
51#define CONFIG_SMSTP4_ENA 0x00000180
52
53#endif /* __SALVATOR_X_H */