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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 22fc991dafee0142fc6bf621e7bd558bd58020b4 / . / arch / arm / lib / bootm-fdt.c
blob: 29020bd1c6bc84c76dd3cc6bca38a78ef77df3dc [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Glass6caa1952013-05-08 08:06:03 +0000[diff] [blame]2/*
3 * Copyright (c) 2013, Google Inc.
4 *
5 * Copyright (C) 2011
6 * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
7 * - Added prep subcommand support
8 * - Reorganized source - modeled after powerpc version
9 *
10 * (C) Copyright 2002
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Marius Groeger <mgroeger@sysgo.de>
13 *
14 * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
Simon Glass6caa1952013-05-08 08:06:03 +0000[diff] [blame]15 */
16
17#include <common.h>
18#include <fdt_support.h>
Tom Rini4588d612015-05-14 11:07:03 -0400[diff] [blame]19#ifdef CONFIG_ARMV7_NONSEC
Jan Kiszkad6b72da2015-04-21 07:18:32 +0200[diff] [blame]20#include <asm/armv7.h>
Tom Rini4588d612015-05-14 11:07:03 -0400[diff] [blame]21#endif
Simon Glass401d1c42020-10-30 21:38:53 -0600[diff] [blame]22#include <asm/global_data.h>
Tom Rinidd09f7e2015-03-05 20:19:36 -0500[diff] [blame]23#include <asm/psci.h>
Masahiro Yamada6b6024e2016-06-27 19:31:05 +0900[diff] [blame]24#include <asm/spin_table.h>
Simon Glass6caa1952013-05-08 08:06:03 +0000[diff] [blame]25
26DECLARE_GLOBAL_DATA_PTR;
27
Prabhakar Kushwaha6bedf442017-11-23 16:51:41 +0530[diff] [blame]28#ifdef CONFIG_FMAN_ENET
29__weak int fdt_update_ethernet_dt(void *blob)
30{
31 return 0;
32}
33#endif
34
Ma Haijune29607e2014-07-12 14:24:06 +0100[diff] [blame]35int arch_fixup_fdt(void *blob)
Simon Glass6caa1952013-05-08 08:06:03 +0000[diff] [blame]36{
Heiko Schocher020da842018-01-17 07:00:37 +0100[diff] [blame]37 __maybe_unused int ret = 0;
B, Ravi984a3c82017-04-18 17:27:26 +0530[diff] [blame]38#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT)
Masahiro Yamadab75d8dc2020-06-26 15:13:33 +0900[diff] [blame]39 struct bd_info *bd = gd->bd;
B, Ravi984a3c82017-04-18 17:27:26 +0530[diff] [blame]40 int bank;
Simon Glass6caa1952013-05-08 08:06:03 +0000[diff] [blame]41 u64 start[CONFIG_NR_DRAM_BANKS];
42 u64 size[CONFIG_NR_DRAM_BANKS];
43
44 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
45 start[bank] = bd->bi_dram[bank].start;
46 size[bank] = bd->bi_dram[bank].size;
Jan Kiszkad6b72da2015-04-21 07:18:32 +0200[diff] [blame]47#ifdef CONFIG_ARMV7_NONSEC
48 ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);
49 if (ret)
50 return ret;
51#endif
Simon Glass6caa1952013-05-08 08:06:03 +0000[diff] [blame]52 }
53
B, Ravi984a3c82017-04-18 17:27:26 +0530[diff] [blame]54#ifdef CONFIG_OF_LIBFDT
Marc Zyngiere771a3d2014-07-12 14:24:07 +0100[diff] [blame]55 ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
Marc Zyngiere771a3d2014-07-12 14:24:07 +0100[diff] [blame]56 if (ret)
57 return ret;
B, Ravi984a3c82017-04-18 17:27:26 +0530[diff] [blame]58#endif
Marc Zyngiere771a3d2014-07-12 14:24:07 +0100[diff] [blame]59
Masahiro Yamada6b6024e2016-06-27 19:31:05 +0900[diff] [blame]60#ifdef CONFIG_ARMV8_SPIN_TABLE
61 ret = spin_table_update_dt(blob);
62 if (ret)
63 return ret;
64#endif
65
macro.wave.z@gmail.com9a561752016-12-08 11:58:25 +0800[diff] [blame]66#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI) || \
Michael Walle59b07a22020-11-18 17:45:54 +0100[diff] [blame]67 CONFIG_IS_ENABLED(SEC_FIRMWARE_ARMV8_PSCI)
Tom Rinidd09f7e2015-03-05 20:19:36 -0500[diff] [blame]68 ret = psci_update_dt(blob);
Masahiro Yamada6441e3d2016-06-17 21:51:48 +0900[diff] [blame]69 if (ret)
70 return ret;
Marc Zyngiere771a3d2014-07-12 14:24:07 +0100[diff] [blame]71#endif
B, Ravi984a3c82017-04-18 17:27:26 +0530[diff] [blame]72#endif
Masahiro Yamada6441e3d2016-06-17 21:51:48 +0900[diff] [blame]73
Prabhakar Kushwaha6bedf442017-11-23 16:51:41 +0530[diff] [blame]74#ifdef CONFIG_FMAN_ENET
75 ret = fdt_update_ethernet_dt(blob);
76 if (ret)
77 return ret;
78#endif
Masahiro Yamada6441e3d2016-06-17 21:51:48 +0900[diff] [blame]79 return 0;
Simon Glass6caa1952013-05-08 08:06:03 +0000[diff] [blame]80}