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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 22fc991dafee0142fc6bf621e7bd558bd58020b4 / . / board / renesas / lager / qos.c
blob: f01ca2fac71bfd1906f9364838e9b6f33f2000e6 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]2/*
3 * board/renesas/lager/qos.c
4 *
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]5 * Copyright (C) 2013,2014 Renesas Electronics Corporation
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]6 */
7
8#include <common.h>
9#include <asm/processor.h>
10#include <asm/mach-types.h>
11#include <asm/io.h>
12#include <asm/arch/rmobile.h>
13
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]14/* QoS version 0.955 for ES1 and version 0.973 for ES2 */
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +0900[diff] [blame]15#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]16enum {
Nobuhiro Iwamatsu96c434b2014-07-29 12:13:16 +0900[diff] [blame]17 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
18 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
19 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
20 DBSC3_15,
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]21 DBSC3_NR,
22};
23
Nobuhiro Iwamatsu96c434b2014-07-29 12:13:16 +0900[diff] [blame]24static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
25 [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
26 [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
27 [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
28 [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
29 [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
30 [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
31 [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
32 [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
33 [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
34 [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
35 [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
36 [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
37 [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
38 [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
39 [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
40 [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]41};
42
Nobuhiro Iwamatsu96c434b2014-07-29 12:13:16 +0900[diff] [blame]43static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
44 [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
45 [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
46 [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
47 [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
48 [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
49 [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
50 [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
51 [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
52 [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
53 [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
54 [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
55 [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
56 [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
57 [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
58 [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
59 [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
60};
61
62/* QoS version 0.955 for ES1 */
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]63static void qos_init_es1(void)
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]64{
65 int i;
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]66 struct rcar_s3c *s3c;
67 struct rcar_s3c_qos *s3c_qos;
68 struct rcar_dbsc3_qos *qos_addr;
69 struct rcar_mxi *mxi;
70 struct rcar_mxi_qos *mxi_qos;
71 struct rcar_axi_qos *axi_qos;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]72
73 /* DBSC DBADJ2 */
74 writel(0x20042004, DBSC3_0_DBADJ2);
75
76 /* S3C -QoS */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]77 s3c = (struct rcar_s3c *)S3C_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]78 writel(0x80FF1C1E, &s3c->s3cadsplcr);
79 writel(0x1F060505, &s3c->s3crorr);
80 writel(0x1F020100, &s3c->s3cworr);
81
82 /* QoS Control Registers */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]83 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]84 writel(0x00800080, &s3c_qos->s3cqos0);
85 writel(0x22000010, &s3c_qos->s3cqos1);
86 writel(0x22002200, &s3c_qos->s3cqos2);
87 writel(0x2F002200, &s3c_qos->s3cqos3);
88 writel(0x2F002F00, &s3c_qos->s3cqos4);
89 writel(0x22000010, &s3c_qos->s3cqos5);
90 writel(0x22002200, &s3c_qos->s3cqos6);
91 writel(0x2F002200, &s3c_qos->s3cqos7);
92 writel(0x2F002F00, &s3c_qos->s3cqos8);
93
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]94 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]95 writel(0x00800080, &s3c_qos->s3cqos0);
96 writel(0x22000010, &s3c_qos->s3cqos1);
97 writel(0x22002200, &s3c_qos->s3cqos2);
98 writel(0x2F002200, &s3c_qos->s3cqos3);
99 writel(0x2F002F00, &s3c_qos->s3cqos4);
100 writel(0x22000010, &s3c_qos->s3cqos5);
101 writel(0x22002200, &s3c_qos->s3cqos6);
102 writel(0x2F002200, &s3c_qos->s3cqos7);
103 writel(0x2F002F00, &s3c_qos->s3cqos8);
104
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]105 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]106 writel(0x80918099, &s3c_qos->s3cqos0);
107 writel(0x20410010, &s3c_qos->s3cqos1);
108 writel(0x200A2023, &s3c_qos->s3cqos2);
109 writel(0x20502001, &s3c_qos->s3cqos3);
110 writel(0x00002032, &s3c_qos->s3cqos4);
111 writel(0x20410FFF, &s3c_qos->s3cqos5);
112 writel(0x200A2023, &s3c_qos->s3cqos6);
113 writel(0x20502001, &s3c_qos->s3cqos7);
114 writel(0x20142032, &s3c_qos->s3cqos8);
115
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]116 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]117 writel(0x00810089, &s3c_qos->s3cqos0);
118 writel(0x20410001, &s3c_qos->s3cqos1);
119 writel(0x200A2023, &s3c_qos->s3cqos2);
120 writel(0x20502001, &s3c_qos->s3cqos3);
121 writel(0x00002032, &s3c_qos->s3cqos4);
122 writel(0x20410FFF, &s3c_qos->s3cqos5);
123 writel(0x200A2023, &s3c_qos->s3cqos6);
124 writel(0x20502001, &s3c_qos->s3cqos7);
125 writel(0x20142032, &s3c_qos->s3cqos8);
126
127 writel(0x00200808, &s3c->s3carcr11);
128
129 /* DBSC -QoS */
Nobuhiro Iwamatsu96c434b2014-07-29 12:13:16 +0900[diff] [blame]130 /* DBSC0 - Read */
131 for (i = DBSC3_00; i < DBSC3_NR; i++) {
132 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]133 writel(0x00000203, &qos_addr->dblgcnt);
134 writel(0x00002064, &qos_addr->dbtmval0);
135 writel(0x00002048, &qos_addr->dbtmval1);
136 writel(0x00002032, &qos_addr->dbtmval2);
137 writel(0x00002019, &qos_addr->dbtmval3);
138 writel(0x00000001, &qos_addr->dbrqctr);
139 writel(0x00002019, &qos_addr->dbthres0);
140 writel(0x00002019, &qos_addr->dbthres1);
141 writel(0x00002019, &qos_addr->dbthres2);
142 writel(0x00000000, &qos_addr->dblgqon);
143 }
Nobuhiro Iwamatsu96c434b2014-07-29 12:13:16 +0900[diff] [blame]144
145 /* DBSC0 - Write */
146 for (i = DBSC3_00; i < DBSC3_NR; i++) {
147 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
148 writel(0x00000203, &qos_addr->dblgcnt);
149 writel(0x00002064, &qos_addr->dbtmval0);
150 writel(0x00002048, &qos_addr->dbtmval1);
151 writel(0x00002032, &qos_addr->dbtmval2);
152 writel(0x00002019, &qos_addr->dbtmval3);
153 writel(0x00000001, &qos_addr->dbrqctr);
154 writel(0x00002019, &qos_addr->dbthres0);
155 writel(0x00002019, &qos_addr->dbthres1);
156 writel(0x00002019, &qos_addr->dbthres2);
157 writel(0x00000000, &qos_addr->dblgqon);
158 }
159
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]160 /* CCI-400 -QoS */
161 writel(0x20001000, CCI_400_MAXOT_1);
162 writel(0x20001000, CCI_400_MAXOT_2);
163 writel(0x0000000C, CCI_400_QOSCNTL_1);
164 writel(0x0000000C, CCI_400_QOSCNTL_2);
165
166 /* MXI -QoS */
167 /* Transaction Control (MXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]168 mxi = (struct rcar_mxi *)MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]169 writel(0x00000013, &mxi->mxrtcr);
170 writel(0x00000013, &mxi->mxwtcr);
171 writel(0x00B800C0, &mxi->mxsaar0);
172 writel(0x02000800, &mxi->mxsaar1);
173 writel(0x00200000, &mxi->mxs3cracr);
174 writel(0x00200000, &mxi->mxs3cwacr);
175 writel(0x00200000, &mxi->mxaxiracr);
176 writel(0x00200000, &mxi->mxaxiwacr);
177
178 /* QoS Control (MXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]179 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]180 writel(0x0000000C, &mxi_qos->vspdu0);
181 writel(0x0000000C, &mxi_qos->vspdu1);
182 writel(0x0000000D, &mxi_qos->du0);
183 writel(0x0000000D, &mxi_qos->du1);
184
185 /* AXI -QoS */
186 /* Transaction Control (MXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]187 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]188 writel(0x00000002, &axi_qos->qosconf);
189 writel(0x0000200F, &axi_qos->qosctset0);
190 writel(0x00002009, &axi_qos->qosctset1);
191 writel(0x00002003, &axi_qos->qosctset2);
192 writel(0x00002003, &axi_qos->qosctset3);
193 writel(0x00000001, &axi_qos->qosreqctr);
194 writel(0x00002006, &axi_qos->qosthres0);
195 writel(0x00002001, &axi_qos->qosthres1);
196 writel(0x00000000, &axi_qos->qosthres2);
197 writel(0x00000001, &axi_qos->qosqon);
198
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]199 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]200 writel(0x00000000, &axi_qos->qosconf);
201 writel(0x0000200A, &axi_qos->qosctset0);
202 writel(0x00000001, &axi_qos->qosreqctr);
203 writel(0x00002006, &axi_qos->qosthres0);
204 writel(0x00002001, &axi_qos->qosthres1);
205 writel(0x00000000, &axi_qos->qosthres2);
206 writel(0x00000001, &axi_qos->qosqon);
207
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]208 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]209 writel(0x00000000, &axi_qos->qosconf);
210 writel(0x0000200A, &axi_qos->qosctset0);
211 writel(0x00000001, &axi_qos->qosreqctr);
212 writel(0x00002006, &axi_qos->qosthres0);
213 writel(0x00002001, &axi_qos->qosthres1);
214 writel(0x00000000, &axi_qos->qosthres2);
215 writel(0x00000001, &axi_qos->qosqon);
216
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]217 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]218 writel(0x00000000, &axi_qos->qosconf);
219 writel(0x00002002, &axi_qos->qosctset0);
220 writel(0x00000001, &axi_qos->qosreqctr);
221 writel(0x00002006, &axi_qos->qosthres0);
222 writel(0x00002001, &axi_qos->qosthres1);
223 writel(0x00000000, &axi_qos->qosthres2);
224 writel(0x00000001, &axi_qos->qosqon);
225
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]226 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]227 writel(0x00000000, &axi_qos->qosconf);
228 writel(0x00002004, &axi_qos->qosctset0);
229 writel(0x00000001, &axi_qos->qosreqctr);
230 writel(0x00002006, &axi_qos->qosthres0);
231 writel(0x00002001, &axi_qos->qosthres1);
232 writel(0x00000000, &axi_qos->qosthres2);
233 writel(0x00000001, &axi_qos->qosqon);
234
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]235 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]236 writel(0x00000002, &axi_qos->qosconf);
237 writel(0x0000200F, &axi_qos->qosctset0);
238 writel(0x00002009, &axi_qos->qosctset1);
239 writel(0x00002003, &axi_qos->qosctset2);
240 writel(0x00002003, &axi_qos->qosctset3);
241 writel(0x00000001, &axi_qos->qosreqctr);
242 writel(0x00002006, &axi_qos->qosthres0);
243 writel(0x00002001, &axi_qos->qosthres1);
244 writel(0x00000000, &axi_qos->qosthres2);
245 writel(0x00000001, &axi_qos->qosqon);
246
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]247 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]248 writel(0x00000002, &axi_qos->qosconf);
249 writel(0x0000200F, &axi_qos->qosctset0);
250 writel(0x00002009, &axi_qos->qosctset1);
251 writel(0x00002003, &axi_qos->qosctset2);
252 writel(0x00002003, &axi_qos->qosctset3);
253 writel(0x00000001, &axi_qos->qosreqctr);
254 writel(0x00002006, &axi_qos->qosthres0);
255 writel(0x00002001, &axi_qos->qosthres1);
256 writel(0x00000000, &axi_qos->qosthres2);
257 writel(0x00000001, &axi_qos->qosqon);
258
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]259 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]260 writel(0x00000002, &axi_qos->qosconf);
261 writel(0x0000200F, &axi_qos->qosctset0);
262 writel(0x00002009, &axi_qos->qosctset1);
263 writel(0x00002003, &axi_qos->qosctset2);
264 writel(0x00002003, &axi_qos->qosctset3);
265 writel(0x00000001, &axi_qos->qosreqctr);
266 writel(0x00002006, &axi_qos->qosthres0);
267 writel(0x00002001, &axi_qos->qosthres1);
268 writel(0x00000000, &axi_qos->qosthres2);
269 writel(0x00000001, &axi_qos->qosqon);
270
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]271 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]272 writel(0x00000000, &axi_qos->qosconf);
273 writel(0x00002014, &axi_qos->qosctset0);
274 writel(0x00000001, &axi_qos->qosreqctr);
275 writel(0x00002006, &axi_qos->qosthres0);
276 writel(0x00002001, &axi_qos->qosthres1);
277 writel(0x00000000, &axi_qos->qosthres2);
278 writel(0x00000001, &axi_qos->qosqon);
279
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]280 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]281 writel(0x00000001, &axi_qos->qosconf);
282 writel(0x00002001, &axi_qos->qosctset0);
283 writel(0x00002009, &axi_qos->qosctset1);
284 writel(0x00002003, &axi_qos->qosctset2);
285 writel(0x00002003, &axi_qos->qosctset3);
286 writel(0x00000001, &axi_qos->qosreqctr);
287 writel(0x00002006, &axi_qos->qosthres0);
288 writel(0x00002001, &axi_qos->qosthres1);
289 writel(0x00000000, &axi_qos->qosthres2);
290 writel(0x00000001, &axi_qos->qosqon);
291
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]292 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]293 writel(0x00000001, &axi_qos->qosconf);
294 writel(0x00002001, &axi_qos->qosctset0);
295 writel(0x00002009, &axi_qos->qosctset1);
296 writel(0x00002003, &axi_qos->qosctset2);
297 writel(0x00002003, &axi_qos->qosctset3);
298 writel(0x00000001, &axi_qos->qosreqctr);
299 writel(0x00002006, &axi_qos->qosthres0);
300 writel(0x00002001, &axi_qos->qosthres1);
301 writel(0x00000000, &axi_qos->qosthres2);
302 writel(0x00000001, &axi_qos->qosqon);
303
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]304 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]305 writel(0x00000001, &axi_qos->qosconf);
306 writel(0x00002001, &axi_qos->qosctset0);
307 writel(0x00002009, &axi_qos->qosctset1);
308 writel(0x00002003, &axi_qos->qosctset2);
309 writel(0x00002003, &axi_qos->qosctset3);
310 writel(0x00000001, &axi_qos->qosreqctr);
311 writel(0x00002006, &axi_qos->qosthres0);
312 writel(0x00002001, &axi_qos->qosthres1);
313 writel(0x00000000, &axi_qos->qosthres2);
314 writel(0x00000001, &axi_qos->qosqon);
315
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]316 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]317 writel(0x00000001, &axi_qos->qosconf);
318 writel(0x00002001, &axi_qos->qosctset0);
319 writel(0x00002009, &axi_qos->qosctset1);
320 writel(0x00002003, &axi_qos->qosctset2);
321 writel(0x00002003, &axi_qos->qosctset3);
322 writel(0x00000001, &axi_qos->qosreqctr);
323 writel(0x00002006, &axi_qos->qosthres0);
324 writel(0x00002001, &axi_qos->qosthres1);
325 writel(0x00000000, &axi_qos->qosthres2);
326 writel(0x00000001, &axi_qos->qosqon);
327
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]328 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]329 writel(0x00000001, &axi_qos->qosconf);
330 writel(0x00002001, &axi_qos->qosctset0);
331 writel(0x00002009, &axi_qos->qosctset1);
332 writel(0x00002003, &axi_qos->qosctset2);
333 writel(0x00002003, &axi_qos->qosctset3);
334 writel(0x00000001, &axi_qos->qosreqctr);
335 writel(0x00002006, &axi_qos->qosthres0);
336 writel(0x00002001, &axi_qos->qosthres1);
337 writel(0x00000000, &axi_qos->qosthres2);
338 writel(0x00000001, &axi_qos->qosqon);
339
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]340 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]341 writel(0x00000000, &axi_qos->qosconf);
342 writel(0x00002002, &axi_qos->qosctset0);
343 writel(0x00000001, &axi_qos->qosreqctr);
344 writel(0x00002006, &axi_qos->qosthres0);
345 writel(0x00002001, &axi_qos->qosthres1);
346 writel(0x00000000, &axi_qos->qosthres2);
347 writel(0x00000001, &axi_qos->qosqon);
348
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]349 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]350 writel(0x00000000, &axi_qos->qosconf);
351 writel(0x00002002, &axi_qos->qosctset0);
352 writel(0x00000001, &axi_qos->qosreqctr);
353 writel(0x00002006, &axi_qos->qosthres0);
354 writel(0x00002001, &axi_qos->qosthres1);
355 writel(0x00000000, &axi_qos->qosthres2);
356 writel(0x00000001, &axi_qos->qosqon);
357
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]358 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]359 writel(0x00000000, &axi_qos->qosconf);
360 writel(0x00002014, &axi_qos->qosctset0);
361 writel(0x00000001, &axi_qos->qosreqctr);
362 writel(0x00002006, &axi_qos->qosthres0);
363 writel(0x00002001, &axi_qos->qosthres1);
364 writel(0x00000000, &axi_qos->qosthres2);
365 writel(0x00000001, &axi_qos->qosqon);
366
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]367 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]368 writel(0x00000002, &axi_qos->qosconf);
369 writel(0x0000200F, &axi_qos->qosctset0);
370 writel(0x00002009, &axi_qos->qosctset1);
371 writel(0x00002003, &axi_qos->qosctset2);
372 writel(0x00002003, &axi_qos->qosctset3);
373 writel(0x00000001, &axi_qos->qosreqctr);
374 writel(0x00002006, &axi_qos->qosthres0);
375 writel(0x00002001, &axi_qos->qosthres1);
376 writel(0x00000000, &axi_qos->qosthres2);
377 writel(0x00000001, &axi_qos->qosqon);
378
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]379 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]380 writel(0x00000000, &axi_qos->qosconf);
381 writel(0x0000200A, &axi_qos->qosctset0);
382 writel(0x00000001, &axi_qos->qosreqctr);
383 writel(0x00002006, &axi_qos->qosthres0);
384 writel(0x00002001, &axi_qos->qosthres1);
385 writel(0x00000000, &axi_qos->qosthres2);
386 writel(0x00000001, &axi_qos->qosqon);
387
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]388 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]389 writel(0x00000000, &axi_qos->qosconf);
390 writel(0x0000200A, &axi_qos->qosctset0);
391 writel(0x00000001, &axi_qos->qosreqctr);
392 writel(0x00002006, &axi_qos->qosthres0);
393 writel(0x00002001, &axi_qos->qosthres1);
394 writel(0x00000000, &axi_qos->qosthres2);
395 writel(0x00000001, &axi_qos->qosqon);
396
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]397 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]398 writel(0x00000000, &axi_qos->qosconf);
399 writel(0x00002005, &axi_qos->qosctset0);
400 writel(0x00000001, &axi_qos->qosreqctr);
401 writel(0x00002006, &axi_qos->qosthres0);
402 writel(0x00002001, &axi_qos->qosthres1);
403 writel(0x00000000, &axi_qos->qosthres2);
404 writel(0x00000001, &axi_qos->qosqon);
405
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]406 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]407 writel(0x00000000, &axi_qos->qosconf);
408 writel(0x00002005, &axi_qos->qosctset0);
409 writel(0x00000001, &axi_qos->qosreqctr);
410 writel(0x00002006, &axi_qos->qosthres0);
411 writel(0x00002001, &axi_qos->qosthres1);
412 writel(0x00000000, &axi_qos->qosthres2);
413 writel(0x00000001, &axi_qos->qosqon);
414
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]415 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]416 writel(0x00000000, &axi_qos->qosconf);
417 writel(0x00002005, &axi_qos->qosctset0);
418 writel(0x00000001, &axi_qos->qosreqctr);
419 writel(0x00002006, &axi_qos->qosthres0);
420 writel(0x00002001, &axi_qos->qosthres1);
421 writel(0x00000000, &axi_qos->qosthres2);
422 writel(0x00000001, &axi_qos->qosqon);
423
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]424 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]425 writel(0x00000000, &axi_qos->qosconf);
426 writel(0x00002014, &axi_qos->qosctset0);
427 writel(0x00000001, &axi_qos->qosreqctr);
428 writel(0x00002006, &axi_qos->qosthres0);
429 writel(0x00002001, &axi_qos->qosthres1);
430 writel(0x00000000, &axi_qos->qosthres2);
431 writel(0x00000001, &axi_qos->qosqon);
432
433 /* QoS Register (RT-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]434 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]435 writel(0x00000000, &axi_qos->qosconf);
436 writel(0x00002005, &axi_qos->qosctset0);
437 writel(0x00002009, &axi_qos->qosctset1);
438 writel(0x00002003, &axi_qos->qosctset2);
439 writel(0x00002003, &axi_qos->qosctset3);
440 writel(0x00000001, &axi_qos->qosreqctr);
441 writel(0x00002006, &axi_qos->qosthres0);
442 writel(0x00002001, &axi_qos->qosthres1);
443 writel(0x00000000, &axi_qos->qosthres2);
444 writel(0x00000001, &axi_qos->qosqon);
445
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]446 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]447 writel(0x00000000, &axi_qos->qosconf);
448 writel(0x00002007, &axi_qos->qosctset0);
449 writel(0x00000001, &axi_qos->qosreqctr);
450 writel(0x00002006, &axi_qos->qosthres0);
451 writel(0x00002001, &axi_qos->qosthres1);
452 writel(0x00000000, &axi_qos->qosthres2);
453 writel(0x00000001, &axi_qos->qosqon);
454
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]455 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]456 writel(0x00000002, &axi_qos->qosconf);
457 writel(0x0000200F, &axi_qos->qosctset0);
458 writel(0x00002009, &axi_qos->qosctset1);
459 writel(0x00002003, &axi_qos->qosctset2);
460 writel(0x00002003, &axi_qos->qosctset3);
461 writel(0x00000001, &axi_qos->qosreqctr);
462 writel(0x00002006, &axi_qos->qosthres0);
463 writel(0x00002001, &axi_qos->qosthres1);
464 writel(0x00000000, &axi_qos->qosthres2);
465 writel(0x00000001, &axi_qos->qosqon);
466
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]467 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]468 writel(0x00000000, &axi_qos->qosconf);
469 writel(0x00002003, &axi_qos->qosctset0);
470 writel(0x00002009, &axi_qos->qosctset1);
471 writel(0x00002003, &axi_qos->qosctset2);
472 writel(0x00002003, &axi_qos->qosctset3);
473 writel(0x00000001, &axi_qos->qosreqctr);
474 writel(0x00002006, &axi_qos->qosthres0);
475 writel(0x00002001, &axi_qos->qosthres1);
476 writel(0x00000000, &axi_qos->qosthres2);
477 writel(0x00000001, &axi_qos->qosqon);
478
479 /* QoS Register (MP-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]480 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]481 writel(0x00000000, &axi_qos->qosconf);
482 writel(0x00002007, &axi_qos->qosctset0);
483 writel(0x00000001, &axi_qos->qosreqctr);
484 writel(0x00002006, &axi_qos->qosthres0);
485 writel(0x00002001, &axi_qos->qosthres1);
486 writel(0x00000000, &axi_qos->qosthres2);
487 writel(0x00000001, &axi_qos->qosqon);
488
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]489 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]490 writel(0x00000001, &axi_qos->qosconf);
491 writel(0x00002014, &axi_qos->qosctset0);
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]492 writel(0x00000040, &axi_qos->qosreqctr);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]493 writel(0x00002006, &axi_qos->qosthres0);
494 writel(0x00002001, &axi_qos->qosthres1);
495 writel(0x00000000, &axi_qos->qosthres2);
496 writel(0x00000001, &axi_qos->qosqon);
497
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]498 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]499 writel(0x00000001, &axi_qos->qosconf);
500 writel(0x00002014, &axi_qos->qosctset0);
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]501 writel(0x00000040, &axi_qos->qosreqctr);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]502 writel(0x00002006, &axi_qos->qosthres0);
503 writel(0x00002001, &axi_qos->qosthres1);
504 writel(0x00000000, &axi_qos->qosthres2);
505 writel(0x00000001, &axi_qos->qosqon);
506
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]507 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]508 writel(0x00000001, &axi_qos->qosconf);
509 writel(0x00001FF0, &axi_qos->qosctset0);
510 writel(0x00000020, &axi_qos->qosreqctr);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]511 writel(0x00002006, &axi_qos->qosthres0);
512 writel(0x00002001, &axi_qos->qosthres1);
Nobuhiro Iwamatsu3f0fd592014-03-28 14:10:06 +0900[diff] [blame]513 writel(0x00002001, &axi_qos->qosthres2);
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]514 writel(0x00000001, &axi_qos->qosqon);
515
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]516 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]517 writel(0x00000001, &axi_qos->qosconf);
518 writel(0x00002001, &axi_qos->qosctset0);
519 writel(0x00002009, &axi_qos->qosctset1);
520 writel(0x00002003, &axi_qos->qosctset2);
521 writel(0x00002003, &axi_qos->qosctset3);
522 writel(0x00000001, &axi_qos->qosreqctr);
523 writel(0x00002006, &axi_qos->qosthres0);
524 writel(0x00002001, &axi_qos->qosthres1);
525 writel(0x00000000, &axi_qos->qosthres2);
526 writel(0x00000001, &axi_qos->qosqon);
527
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]528 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]529 writel(0x00000000, &axi_qos->qosconf);
530 writel(0x00002018, &axi_qos->qosctset0);
531 writel(0x00000001, &axi_qos->qosreqctr);
532 writel(0x00002006, &axi_qos->qosthres0);
533 writel(0x00002001, &axi_qos->qosthres1);
534 writel(0x00000000, &axi_qos->qosthres2);
535 writel(0x00000001, &axi_qos->qosqon);
536
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]537 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]538 writel(0x00000000, &axi_qos->qosconf);
539 writel(0x0000200D, &axi_qos->qosctset0);
540 writel(0x00000001, &axi_qos->qosreqctr);
541 writel(0x00002006, &axi_qos->qosthres0);
542 writel(0x00002001, &axi_qos->qosthres1);
543 writel(0x00000000, &axi_qos->qosthres2);
544 writel(0x00000001, &axi_qos->qosqon);
545
546 /* QoS Register (SYS-AXI256) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]547 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]548 writel(0x00000002, &axi_qos->qosconf);
549 writel(0x0000200F, &axi_qos->qosctset0);
550 writel(0x00002009, &axi_qos->qosctset1);
551 writel(0x00002003, &axi_qos->qosctset2);
552 writel(0x00002003, &axi_qos->qosctset3);
553 writel(0x00000001, &axi_qos->qosreqctr);
554 writel(0x00002006, &axi_qos->qosthres0);
555 writel(0x00002001, &axi_qos->qosthres1);
556 writel(0x00000000, &axi_qos->qosthres2);
557 writel(0x00000001, &axi_qos->qosqon);
558
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]559 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]560 writel(0x00000002, &axi_qos->qosconf);
561 writel(0x0000200F, &axi_qos->qosctset0);
562 writel(0x00002009, &axi_qos->qosctset1);
563 writel(0x00002003, &axi_qos->qosctset2);
564 writel(0x00002003, &axi_qos->qosctset3);
565 writel(0x00000001, &axi_qos->qosreqctr);
566 writel(0x00002006, &axi_qos->qosthres0);
567 writel(0x00002001, &axi_qos->qosthres1);
568 writel(0x00000000, &axi_qos->qosthres2);
569 writel(0x00000001, &axi_qos->qosqon);
570
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]571 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]572 writel(0x00000002, &axi_qos->qosconf);
573 writel(0x0000200F, &axi_qos->qosctset0);
574 writel(0x00002009, &axi_qos->qosctset1);
575 writel(0x00002003, &axi_qos->qosctset2);
576 writel(0x00002003, &axi_qos->qosctset3);
577 writel(0x00000001, &axi_qos->qosreqctr);
578 writel(0x00002006, &axi_qos->qosthres0);
579 writel(0x00002001, &axi_qos->qosthres1);
580 writel(0x00000000, &axi_qos->qosthres2);
581 writel(0x00000001, &axi_qos->qosqon);
582
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]583 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]584 writel(0x00000002, &axi_qos->qosconf);
585 writel(0x0000200F, &axi_qos->qosctset0);
586 writel(0x00002009, &axi_qos->qosctset1);
587 writel(0x00002003, &axi_qos->qosctset2);
588 writel(0x00002003, &axi_qos->qosctset3);
589 writel(0x00000001, &axi_qos->qosreqctr);
590 writel(0x00002006, &axi_qos->qosthres0);
591 writel(0x00002001, &axi_qos->qosthres1);
592 writel(0x00000000, &axi_qos->qosthres2);
593 writel(0x00000001, &axi_qos->qosqon);
594
595 /* QoS Register (CCI-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]596 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]597 writel(0x00000001, &axi_qos->qosconf);
598 writel(0x00002001, &axi_qos->qosctset0);
599 writel(0x00002009, &axi_qos->qosctset1);
600 writel(0x00002003, &axi_qos->qosctset2);
601 writel(0x00002003, &axi_qos->qosctset3);
602 writel(0x00000001, &axi_qos->qosreqctr);
603 writel(0x00002006, &axi_qos->qosthres0);
604 writel(0x00002001, &axi_qos->qosthres1);
605 writel(0x00000000, &axi_qos->qosthres2);
606 writel(0x00000001, &axi_qos->qosqon);
607
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]608 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]609 writel(0x00000002, &axi_qos->qosconf);
610 writel(0x0000200F, &axi_qos->qosctset0);
611 writel(0x00002009, &axi_qos->qosctset1);
612 writel(0x00002003, &axi_qos->qosctset2);
613 writel(0x00002003, &axi_qos->qosctset3);
614 writel(0x00000001, &axi_qos->qosreqctr);
615 writel(0x00002006, &axi_qos->qosthres0);
616 writel(0x00002001, &axi_qos->qosthres1);
617 writel(0x00000000, &axi_qos->qosthres2);
618 writel(0x00000001, &axi_qos->qosqon);
619
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]620 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]621 writel(0x00000001, &axi_qos->qosconf);
622 writel(0x00002001, &axi_qos->qosctset0);
623 writel(0x00002009, &axi_qos->qosctset1);
624 writel(0x00002003, &axi_qos->qosctset2);
625 writel(0x00002003, &axi_qos->qosctset3);
626 writel(0x00000001, &axi_qos->qosreqctr);
627 writel(0x00002006, &axi_qos->qosthres0);
628 writel(0x00002001, &axi_qos->qosthres1);
629 writel(0x00000000, &axi_qos->qosthres2);
630 writel(0x00000001, &axi_qos->qosqon);
631
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]632 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]633 writel(0x00000001, &axi_qos->qosconf);
634 writel(0x00002001, &axi_qos->qosctset0);
635 writel(0x00002009, &axi_qos->qosctset1);
636 writel(0x00002003, &axi_qos->qosctset2);
637 writel(0x00002003, &axi_qos->qosctset3);
638 writel(0x00000001, &axi_qos->qosreqctr);
639 writel(0x00002006, &axi_qos->qosthres0);
640 writel(0x00002001, &axi_qos->qosthres1);
641 writel(0x00000000, &axi_qos->qosthres2);
642 writel(0x00000001, &axi_qos->qosqon);
643
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]644 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]645 writel(0x00000001, &axi_qos->qosconf);
646 writel(0x00002001, &axi_qos->qosctset0);
647 writel(0x00002009, &axi_qos->qosctset1);
648 writel(0x00002003, &axi_qos->qosctset2);
649 writel(0x00002003, &axi_qos->qosctset3);
650 writel(0x00000001, &axi_qos->qosreqctr);
651 writel(0x00002006, &axi_qos->qosthres0);
652 writel(0x00002001, &axi_qos->qosthres1);
653 writel(0x00000000, &axi_qos->qosthres2);
654 writel(0x00000001, &axi_qos->qosqon);
655
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]656 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]657 writel(0x00000002, &axi_qos->qosconf);
658 writel(0x0000200F, &axi_qos->qosctset0);
659 writel(0x00002009, &axi_qos->qosctset1);
660 writel(0x00002003, &axi_qos->qosctset2);
661 writel(0x00002003, &axi_qos->qosctset3);
662 writel(0x00000001, &axi_qos->qosreqctr);
663 writel(0x00002006, &axi_qos->qosthres0);
664 writel(0x00002001, &axi_qos->qosthres1);
665 writel(0x00000000, &axi_qos->qosthres2);
666 writel(0x00000001, &axi_qos->qosqon);
667
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]668 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]669 writel(0x00000001, &axi_qos->qosconf);
670 writel(0x00002001, &axi_qos->qosctset0);
671 writel(0x00002009, &axi_qos->qosctset1);
672 writel(0x00002003, &axi_qos->qosctset2);
673 writel(0x00002003, &axi_qos->qosctset3);
674 writel(0x00000001, &axi_qos->qosreqctr);
675 writel(0x00002006, &axi_qos->qosthres0);
676 writel(0x00002001, &axi_qos->qosthres1);
677 writel(0x00000000, &axi_qos->qosthres2);
678 writel(0x00000001, &axi_qos->qosqon);
679
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]680 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]681 writel(0x00000001, &axi_qos->qosconf);
682 writel(0x00002001, &axi_qos->qosctset0);
683 writel(0x00002009, &axi_qos->qosctset1);
684 writel(0x00002003, &axi_qos->qosctset2);
685 writel(0x00002003, &axi_qos->qosctset3);
686 writel(0x00000001, &axi_qos->qosreqctr);
687 writel(0x00002006, &axi_qos->qosthres0);
688 writel(0x00002001, &axi_qos->qosthres1);
689 writel(0x00000000, &axi_qos->qosthres2);
690 writel(0x00000001, &axi_qos->qosqon);
691
692 /* QoS Register (Media-AXI) */
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]693 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]694 writel(0x00000001, &axi_qos->qosconf);
695 writel(0x00002018, &axi_qos->qosctset0);
696 writel(0x00000020, &axi_qos->qosreqctr);
697 writel(0x00002006, &axi_qos->qosthres0);
698 writel(0x00002001, &axi_qos->qosthres1);
699 writel(0x00000001, &axi_qos->qosthres2);
700 writel(0x00000001, &axi_qos->qosqon);
701
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]702 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]703 writel(0x00000001, &axi_qos->qosconf);
704 writel(0x00002018, &axi_qos->qosctset0);
705 writel(0x00000020, &axi_qos->qosreqctr);
706 writel(0x00002006, &axi_qos->qosthres0);
707 writel(0x00002001, &axi_qos->qosthres1);
708 writel(0x00000001, &axi_qos->qosthres2);
709 writel(0x00000001, &axi_qos->qosqon);
710
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]711 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]712 writel(0x00000001, &axi_qos->qosconf);
713 writel(0x00002018, &axi_qos->qosctset0);
714 writel(0x00000020, &axi_qos->qosreqctr);
715 writel(0x00002006, &axi_qos->qosthres0);
716 writel(0x00002001, &axi_qos->qosthres1);
717 writel(0x00000001, &axi_qos->qosthres2);
718 writel(0x00000001, &axi_qos->qosqon);
719
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]720 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]721 writel(0x00000001, &axi_qos->qosconf);
722 writel(0x00002018, &axi_qos->qosctset0);
723 writel(0x00000020, &axi_qos->qosreqctr);
724 writel(0x00002006, &axi_qos->qosthres0);
725 writel(0x00002001, &axi_qos->qosthres1);
726 writel(0x00000001, &axi_qos->qosthres2);
727 writel(0x00000001, &axi_qos->qosqon);
728
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]729 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]730 writel(0x00000001, &axi_qos->qosconf);
731 writel(0x00002018, &axi_qos->qosctset0);
732 writel(0x00000020, &axi_qos->qosreqctr);
733 writel(0x00002006, &axi_qos->qosthres0);
734 writel(0x00002001, &axi_qos->qosthres1);
735 writel(0x00000001, &axi_qos->qosthres2);
736 writel(0x00000001, &axi_qos->qosqon);
737
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]738 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]739 writel(0x00000001, &axi_qos->qosconf);
740 writel(0x00002018, &axi_qos->qosctset0);
741 writel(0x00000020, &axi_qos->qosreqctr);
742 writel(0x00002006, &axi_qos->qosthres0);
743 writel(0x00002001, &axi_qos->qosthres1);
744 writel(0x00000001, &axi_qos->qosthres2);
745 writel(0x00000001, &axi_qos->qosqon);
746
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]747 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]748 writel(0x00000001, &axi_qos->qosconf);
749 writel(0x00002018, &axi_qos->qosctset0);
750 writel(0x00000020, &axi_qos->qosreqctr);
751 writel(0x00002006, &axi_qos->qosthres0);
752 writel(0x00002001, &axi_qos->qosthres1);
753 writel(0x00000001, &axi_qos->qosthres2);
754 writel(0x00000001, &axi_qos->qosqon);
755
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]756 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]757 writel(0x00000001, &axi_qos->qosconf);
758 writel(0x00002018, &axi_qos->qosctset0);
759 writel(0x00000020, &axi_qos->qosreqctr);
760 writel(0x00002006, &axi_qos->qosthres0);
761 writel(0x00002001, &axi_qos->qosthres1);
762 writel(0x00000001, &axi_qos->qosthres2);
763 writel(0x00000001, &axi_qos->qosqon);
764
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]765 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]766 writel(0x00000001, &axi_qos->qosconf);
767 writel(0x00002018, &axi_qos->qosctset0);
768 writel(0x00000020, &axi_qos->qosreqctr);
769 writel(0x00002006, &axi_qos->qosthres0);
770 writel(0x00002001, &axi_qos->qosthres1);
771 writel(0x00000001, &axi_qos->qosthres2);
772 writel(0x00000001, &axi_qos->qosqon);
773
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]774 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]775 writel(0x00000001, &axi_qos->qosconf);
776 writel(0x00002018, &axi_qos->qosctset0);
777 writel(0x00000020, &axi_qos->qosreqctr);
778 writel(0x00002006, &axi_qos->qosthres0);
779 writel(0x00002001, &axi_qos->qosthres1);
780 writel(0x00000001, &axi_qos->qosthres2);
781 writel(0x00000001, &axi_qos->qosqon);
782
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]783 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]784 writel(0x00000001, &axi_qos->qosconf);
785 writel(0x00002018, &axi_qos->qosctset0);
786 writel(0x00000020, &axi_qos->qosreqctr);
787 writel(0x00002006, &axi_qos->qosthres0);
788 writel(0x00002001, &axi_qos->qosthres1);
789 writel(0x00000001, &axi_qos->qosthres2);
790 writel(0x00000001, &axi_qos->qosqon);
791
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]792 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]793 writel(0x00000001, &axi_qos->qosconf);
794 writel(0x00002018, &axi_qos->qosctset0);
795 writel(0x00000020, &axi_qos->qosreqctr);
796 writel(0x00002006, &axi_qos->qosthres0);
797 writel(0x00002001, &axi_qos->qosthres1);
798 writel(0x00000001, &axi_qos->qosthres2);
799 writel(0x00000001, &axi_qos->qosqon);
800
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]801 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]802 writel(0x00000001, &axi_qos->qosconf);
803 writel(0x00002018, &axi_qos->qosctset0);
804 writel(0x00000020, &axi_qos->qosreqctr);
805 writel(0x00002006, &axi_qos->qosthres0);
806 writel(0x00002001, &axi_qos->qosthres1);
807 writel(0x00000001, &axi_qos->qosthres2);
808 writel(0x00000001, &axi_qos->qosqon);
809
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]810 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]811 writel(0x00000001, &axi_qos->qosconf);
812 writel(0x00002018, &axi_qos->qosctset0);
813 writel(0x00000020, &axi_qos->qosreqctr);
814 writel(0x00002006, &axi_qos->qosthres0);
815 writel(0x00002001, &axi_qos->qosthres1);
816 writel(0x00000001, &axi_qos->qosthres2);
817 writel(0x00000001, &axi_qos->qosqon);
818
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]819 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]820 writel(0x00000001, &axi_qos->qosconf);
821 writel(0x00002018, &axi_qos->qosctset0);
822 writel(0x00000020, &axi_qos->qosreqctr);
823 writel(0x00002006, &axi_qos->qosthres0);
824 writel(0x00002001, &axi_qos->qosthres1);
825 writel(0x00000001, &axi_qos->qosthres2);
826 writel(0x00000001, &axi_qos->qosqon);
827
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]828 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]829 writel(0x00000001, &axi_qos->qosconf);
830 writel(0x00002018, &axi_qos->qosctset0);
831 writel(0x00000020, &axi_qos->qosreqctr);
832 writel(0x00002006, &axi_qos->qosthres0);
833 writel(0x00002001, &axi_qos->qosthres1);
834 writel(0x00000001, &axi_qos->qosthres2);
835 writel(0x00000001, &axi_qos->qosqon);
836
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]837 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]838 writel(0x00000001, &axi_qos->qosconf);
839 writel(0x0000200C, &axi_qos->qosctset0);
840 writel(0x00000020, &axi_qos->qosreqctr);
841 writel(0x00002006, &axi_qos->qosthres0);
842 writel(0x00002001, &axi_qos->qosthres1);
843 writel(0x00000001, &axi_qos->qosthres2);
844 writel(0x00000001, &axi_qos->qosqon);
845
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]846 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]847 writel(0x00000001, &axi_qos->qosconf);
848 writel(0x0000200C, &axi_qos->qosctset0);
849 writel(0x00000020, &axi_qos->qosreqctr);
850 writel(0x00002006, &axi_qos->qosthres0);
851 writel(0x00002001, &axi_qos->qosthres1);
852 writel(0x00000001, &axi_qos->qosthres2);
853 writel(0x00000001, &axi_qos->qosqon);
854
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]855 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]856 writel(0x00000001, &axi_qos->qosconf);
857 writel(0x0000200C, &axi_qos->qosctset0);
858 writel(0x00000020, &axi_qos->qosreqctr);
859 writel(0x00002006, &axi_qos->qosthres0);
860 writel(0x00002001, &axi_qos->qosthres1);
861 writel(0x00000001, &axi_qos->qosthres2);
862 writel(0x00000001, &axi_qos->qosqon);
863
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]864 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]865 writel(0x00000001, &axi_qos->qosconf);
866 writel(0x0000200C, &axi_qos->qosctset0);
867 writel(0x00000020, &axi_qos->qosreqctr);
868 writel(0x00002006, &axi_qos->qosthres0);
869 writel(0x00002001, &axi_qos->qosthres1);
870 writel(0x00000001, &axi_qos->qosthres2);
871 writel(0x00000001, &axi_qos->qosqon);
872
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]873 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]874 writel(0x00000001, &axi_qos->qosconf);
875 writel(0x0000200C, &axi_qos->qosctset0);
876 writel(0x00000020, &axi_qos->qosreqctr);
877 writel(0x00002006, &axi_qos->qosthres0);
878 writel(0x00002001, &axi_qos->qosthres1);
879 writel(0x00000001, &axi_qos->qosthres2);
880 writel(0x00000001, &axi_qos->qosqon);
881
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]882 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]883 writel(0x00000001, &axi_qos->qosconf);
884 writel(0x0000200C, &axi_qos->qosctset0);
885 writel(0x00000020, &axi_qos->qosreqctr);
886 writel(0x00002006, &axi_qos->qosthres0);
887 writel(0x00002001, &axi_qos->qosthres1);
888 writel(0x00000001, &axi_qos->qosthres2);
889 writel(0x00000001, &axi_qos->qosqon);
890
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]891 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]892 writel(0x00000001, &axi_qos->qosconf);
893 writel(0x0000200C, &axi_qos->qosctset0);
894 writel(0x00000020, &axi_qos->qosreqctr);
895 writel(0x00002006, &axi_qos->qosthres0);
896 writel(0x00002001, &axi_qos->qosthres1);
897 writel(0x00000001, &axi_qos->qosthres2);
898 writel(0x00000001, &axi_qos->qosqon);
899
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]900 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]901 writel(0x00000001, &axi_qos->qosconf);
902 writel(0x0000200C, &axi_qos->qosctset0);
903 writel(0x00000020, &axi_qos->qosreqctr);
904 writel(0x00002006, &axi_qos->qosthres0);
905 writel(0x00002001, &axi_qos->qosthres1);
906 writel(0x00000001, &axi_qos->qosthres2);
907 writel(0x00000001, &axi_qos->qosqon);
908
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]909 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]910 writel(0x00000001, &axi_qos->qosconf);
911 writel(0x0000200C, &axi_qos->qosctset0);
912 writel(0x00000020, &axi_qos->qosreqctr);
913 writel(0x00002006, &axi_qos->qosthres0);
914 writel(0x00002001, &axi_qos->qosthres1);
915 writel(0x00000001, &axi_qos->qosthres2);
916 writel(0x00000001, &axi_qos->qosqon);
917
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]918 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]919 writel(0x00000001, &axi_qos->qosconf);
920 writel(0x0000200C, &axi_qos->qosctset0);
921 writel(0x00000020, &axi_qos->qosreqctr);
922 writel(0x00002006, &axi_qos->qosthres0);
923 writel(0x00002001, &axi_qos->qosthres1);
924 writel(0x00000001, &axi_qos->qosthres2);
925 writel(0x00000001, &axi_qos->qosqon);
926
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]927 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]928 writel(0x00000001, &axi_qos->qosconf);
929 writel(0x0000200C, &axi_qos->qosctset0);
930 writel(0x00000020, &axi_qos->qosreqctr);
931 writel(0x00002006, &axi_qos->qosthres0);
932 writel(0x00002001, &axi_qos->qosthres1);
933 writel(0x00000001, &axi_qos->qosthres2);
934 writel(0x00000001, &axi_qos->qosqon);
935
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]936 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]937 writel(0x00000001, &axi_qos->qosconf);
938 writel(0x0000200C, &axi_qos->qosctset0);
939 writel(0x00000020, &axi_qos->qosreqctr);
940 writel(0x00002006, &axi_qos->qosthres0);
941 writel(0x00002001, &axi_qos->qosthres1);
942 writel(0x00000001, &axi_qos->qosthres2);
943 writel(0x00000001, &axi_qos->qosqon);
944
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]945 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]946 writel(0x00000001, &axi_qos->qosconf);
947 writel(0x0000200C, &axi_qos->qosctset0);
948 writel(0x00000020, &axi_qos->qosreqctr);
949 writel(0x00002006, &axi_qos->qosthres0);
950 writel(0x00002001, &axi_qos->qosthres1);
951 writel(0x00000001, &axi_qos->qosthres2);
952 writel(0x00000001, &axi_qos->qosqon);
953
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]954 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]955 writel(0x00000001, &axi_qos->qosconf);
956 writel(0x0000200C, &axi_qos->qosctset0);
957 writel(0x00000020, &axi_qos->qosreqctr);
958 writel(0x00002006, &axi_qos->qosthres0);
959 writel(0x00002001, &axi_qos->qosthres1);
960 writel(0x00000001, &axi_qos->qosthres2);
961 writel(0x00000001, &axi_qos->qosqon);
962
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]963 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]964 writel(0x00000001, &axi_qos->qosconf);
965 writel(0x0000200C, &axi_qos->qosctset0);
966 writel(0x00000020, &axi_qos->qosreqctr);
967 writel(0x00002006, &axi_qos->qosthres0);
968 writel(0x00002001, &axi_qos->qosthres1);
969 writel(0x00000001, &axi_qos->qosthres2);
970 writel(0x00000001, &axi_qos->qosqon);
971
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]972 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]973 writel(0x00000000, &axi_qos->qosconf);
974 writel(0x0000200C, &axi_qos->qosctset0);
975 writel(0x00000001, &axi_qos->qosreqctr);
976 writel(0x00002006, &axi_qos->qosthres0);
977 writel(0x00002001, &axi_qos->qosthres1);
978 writel(0x00000001, &axi_qos->qosthres2);
979 writel(0x00000001, &axi_qos->qosqon);
980
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]981 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]982 writel(0x00000000, &axi_qos->qosconf);
983 writel(0x0000200C, &axi_qos->qosctset0);
984 writel(0x00000001, &axi_qos->qosreqctr);
985 writel(0x00002006, &axi_qos->qosthres0);
986 writel(0x00002001, &axi_qos->qosthres1);
987 writel(0x00000001, &axi_qos->qosthres2);
988 writel(0x00000001, &axi_qos->qosqon);
989
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]990 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]991 writel(0x00000000, &axi_qos->qosconf);
992 writel(0x0000200C, &axi_qos->qosctset0);
993 writel(0x00000001, &axi_qos->qosreqctr);
994 writel(0x00002006, &axi_qos->qosthres0);
995 writel(0x00002001, &axi_qos->qosthres1);
996 writel(0x00000001, &axi_qos->qosthres2);
997 writel(0x00000001, &axi_qos->qosqon);
998
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]999 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1000 writel(0x00000000, &axi_qos->qosconf);
1001 writel(0x0000200C, &axi_qos->qosctset0);
1002 writel(0x00000001, &axi_qos->qosreqctr);
1003 writel(0x00002006, &axi_qos->qosthres0);
1004 writel(0x00002001, &axi_qos->qosthres1);
1005 writel(0x00000001, &axi_qos->qosthres2);
1006 writel(0x00000001, &axi_qos->qosqon);
1007
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1008 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1009 writel(0x00000000, &axi_qos->qosconf);
1010 writel(0x0000200C, &axi_qos->qosctset0);
1011 writel(0x00000001, &axi_qos->qosreqctr);
1012 writel(0x00002006, &axi_qos->qosthres0);
1013 writel(0x00002001, &axi_qos->qosthres1);
1014 writel(0x00000001, &axi_qos->qosthres2);
1015 writel(0x00000001, &axi_qos->qosqon);
1016
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1017 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1018 writel(0x00000000, &axi_qos->qosconf);
1019 writel(0x0000200C, &axi_qos->qosctset0);
1020 writel(0x00000001, &axi_qos->qosreqctr);
1021 writel(0x00002006, &axi_qos->qosthres0);
1022 writel(0x00002001, &axi_qos->qosthres1);
1023 writel(0x00000001, &axi_qos->qosthres2);
1024 writel(0x00000001, &axi_qos->qosqon);
1025
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1026 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1027 writel(0x00000000, &axi_qos->qosconf);
1028 writel(0x0000200C, &axi_qos->qosctset0);
1029 writel(0x00000001, &axi_qos->qosreqctr);
1030 writel(0x00002006, &axi_qos->qosthres0);
1031 writel(0x00002001, &axi_qos->qosthres1);
1032 writel(0x00000001, &axi_qos->qosthres2);
1033 writel(0x00000001, &axi_qos->qosqon);
1034
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1035 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1W_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1036 writel(0x00000000, &axi_qos->qosconf);
1037 writel(0x0000200C, &axi_qos->qosctset0);
1038 writel(0x00000001, &axi_qos->qosreqctr);
1039 writel(0x00002006, &axi_qos->qosthres0);
1040 writel(0x00002001, &axi_qos->qosthres1);
1041 writel(0x00000001, &axi_qos->qosthres2);
1042 writel(0x00000001, &axi_qos->qosqon);
1043
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1044 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1045 writel(0x00000001, &axi_qos->qosconf);
1046 writel(0x00002007, &axi_qos->qosctset0);
1047 writel(0x00000020, &axi_qos->qosreqctr);
1048 writel(0x00002006, &axi_qos->qosthres0);
1049 writel(0x00002001, &axi_qos->qosthres1);
1050 writel(0x00000001, &axi_qos->qosthres2);
1051 writel(0x00000001, &axi_qos->qosqon);
1052
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1053 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1054 writel(0x00000001, &axi_qos->qosconf);
1055 writel(0x00002007, &axi_qos->qosctset0);
1056 writel(0x00000020, &axi_qos->qosreqctr);
1057 writel(0x00002006, &axi_qos->qosthres0);
1058 writel(0x00002001, &axi_qos->qosthres1);
1059 writel(0x00000001, &axi_qos->qosthres2);
1060 writel(0x00000001, &axi_qos->qosqon);
1061
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1062 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1063 writel(0x00000001, &axi_qos->qosconf);
1064 writel(0x00002007, &axi_qos->qosctset0);
1065 writel(0x00000020, &axi_qos->qosreqctr);
1066 writel(0x00002006, &axi_qos->qosthres0);
1067 writel(0x00002001, &axi_qos->qosthres1);
1068 writel(0x00000001, &axi_qos->qosthres2);
1069 writel(0x00000001, &axi_qos->qosqon);
1070
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1071 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1072 writel(0x00000001, &axi_qos->qosconf);
1073 writel(0x00002007, &axi_qos->qosctset0);
1074 writel(0x00000020, &axi_qos->qosreqctr);
1075 writel(0x00002006, &axi_qos->qosthres0);
1076 writel(0x00002001, &axi_qos->qosthres1);
1077 writel(0x00000001, &axi_qos->qosthres2);
1078 writel(0x00000001, &axi_qos->qosqon);
1079
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1080 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1081 writel(0x00000001, &axi_qos->qosconf);
1082 writel(0x00002007, &axi_qos->qosctset0);
1083 writel(0x00000020, &axi_qos->qosreqctr);
1084 writel(0x00002006, &axi_qos->qosthres0);
1085 writel(0x00002001, &axi_qos->qosthres1);
1086 writel(0x00000001, &axi_qos->qosthres2);
1087 writel(0x00000001, &axi_qos->qosqon);
1088
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1089 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1090 writel(0x00000001, &axi_qos->qosconf);
1091 writel(0x00002007, &axi_qos->qosctset0);
1092 writel(0x00000020, &axi_qos->qosreqctr);
1093 writel(0x00002006, &axi_qos->qosthres0);
1094 writel(0x00002001, &axi_qos->qosthres1);
1095 writel(0x00000001, &axi_qos->qosthres2);
1096 writel(0x00000001, &axi_qos->qosqon);
1097
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1098 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1099 writel(0x00000001, &axi_qos->qosconf);
1100 writel(0x00002007, &axi_qos->qosctset0);
1101 writel(0x00000020, &axi_qos->qosreqctr);
1102 writel(0x00002006, &axi_qos->qosthres0);
1103 writel(0x00002001, &axi_qos->qosthres1);
1104 writel(0x00000001, &axi_qos->qosthres2);
1105 writel(0x00000001, &axi_qos->qosqon);
1106
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1107 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VR_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1108 writel(0x00000001, &axi_qos->qosconf);
1109 writel(0x00002007, &axi_qos->qosctset0);
1110 writel(0x00000020, &axi_qos->qosreqctr);
1111 writel(0x00002006, &axi_qos->qosthres0);
1112 writel(0x00002001, &axi_qos->qosthres1);
1113 writel(0x00000001, &axi_qos->qosthres2);
1114 writel(0x00000001, &axi_qos->qosqon);
1115
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1116 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VW_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1117 writel(0x00000001, &axi_qos->qosconf);
1118 writel(0x00002007, &axi_qos->qosctset0);
1119 writel(0x00000020, &axi_qos->qosreqctr);
1120 writel(0x00002006, &axi_qos->qosthres0);
1121 writel(0x00002001, &axi_qos->qosthres1);
1122 writel(0x00000001, &axi_qos->qosthres2);
1123 writel(0x00000001, &axi_qos->qosqon);
1124
Nobuhiro Iwamatsudc535e12014-03-27 16:18:19 +0900[diff] [blame]1125 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC1R_BASE;
Nobuhiro Iwamatsuf4ec4522013-11-21 17:06:46 +0900[diff] [blame]1126 writel(0x00000001, &axi_qos->qosconf);
1127 writel(0x00002007, &axi_qos->qosctset0);
1128 writel(0x00000020, &axi_qos->qosreqctr);
1129 writel(0x00002006, &axi_qos->qosthres0);
1130 writel(0x00002001, &axi_qos->qosthres1);
1131 writel(0x00000001, &axi_qos->qosthres2);
1132 writel(0x00000000, &axi_qos->qosqon);
1133}
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1134
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1135#if defined(CONFIG_QOS_PRI_MEDIA)
1136#define is_qos_pri_media() 1
1137#else
1138#define is_qos_pri_media() 0
1139#endif
1140
1141#if defined(CONFIG_QOS_PRI_NORMAL)
1142#define is_qos_pri_normal() 1
1143#else
1144#define is_qos_pri_normal() 0
1145#endif
1146
1147#if defined(CONFIG_QOS_PRI_GFX)
1148#define is_qos_pri_gfx() 1
1149#else
1150#define is_qos_pri_gfx() 0
1151#endif
1152
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1153/* QoS version 0.963 for ES2 */
1154static void qos_init_es2(void)
1155{
1156 int i;
1157 struct rcar_s3c *s3c;
1158 struct rcar_s3c_qos *s3c_qos;
1159 struct rcar_dbsc3_qos *qos_addr;
1160 struct rcar_mxi *mxi;
1161 struct rcar_mxi_qos *mxi_qos;
1162 struct rcar_axi_qos *axi_qos;
1163
1164 /* DBSC DBADJ2 */
1165 writel(0x20042004, DBSC3_0_DBADJ2);
1166
1167 /* S3C -QoS */
1168 s3c = (struct rcar_s3c *)S3C_BASE;
1169 writel(0x80000000, &s3c->s3cadsplcr);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1170 if (is_qos_pri_media()) {
1171 writel(0x1F060302, &s3c->s3crorr);
1172 writel(0x07070302, &s3c->s3cworr);
1173 } else if (is_qos_pri_normal()) {
1174 writel(0x1F060504, &s3c->s3crorr);
1175 writel(0x07070503, &s3c->s3cworr);
1176 } else if (is_qos_pri_gfx()) {
1177 writel(0x1F060606, &s3c->s3crorr);
1178 writel(0x07070606, &s3c->s3cworr);
1179 }
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1180 /* QoS Control Registers */
1181 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
1182 writel(0x00890089, &s3c_qos->s3cqos0);
1183 writel(0x20960010, &s3c_qos->s3cqos1);
1184 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1185 if (is_qos_pri_media())
1186 writel(0x20AA2300, &s3c_qos->s3cqos3);
1187 else if (is_qos_pri_normal())
1188 writel(0x20AA2200, &s3c_qos->s3cqos3);
1189 else if (is_qos_pri_gfx())
1190 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1191 writel(0x00002032, &s3c_qos->s3cqos4);
1192 writel(0x20960010, &s3c_qos->s3cqos5);
1193 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1194 if (is_qos_pri_media())
1195 writel(0x20AA2300, &s3c_qos->s3cqos7);
1196 else if (is_qos_pri_normal())
1197 writel(0x20AA2200, &s3c_qos->s3cqos7);
1198 else if (is_qos_pri_gfx())
1199 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1200 writel(0x00002032, &s3c_qos->s3cqos8);
1201
1202 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
1203 writel(0x00890089, &s3c_qos->s3cqos0);
1204 writel(0x20960010, &s3c_qos->s3cqos1);
1205 writel(0x20302030, &s3c_qos->s3cqos2);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1206 if (is_qos_pri_media())
1207 writel(0x20AA2300, &s3c_qos->s3cqos3);
1208 else if (is_qos_pri_normal())
1209 writel(0x20AA2200, &s3c_qos->s3cqos3);
1210 else if (is_qos_pri_gfx())
1211 writel(0x20AA2100, &s3c_qos->s3cqos3);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1212 writel(0x00002032, &s3c_qos->s3cqos4);
1213 writel(0x20960010, &s3c_qos->s3cqos5);
1214 writel(0x20302030, &s3c_qos->s3cqos6);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1215 if (is_qos_pri_media())
1216 writel(0x20AA2300, &s3c_qos->s3cqos7);
1217 else if (is_qos_pri_normal())
1218 writel(0x20AA2200, &s3c_qos->s3cqos7);
1219 else if (is_qos_pri_gfx())
1220 writel(0x20AA2100, &s3c_qos->s3cqos7);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1221 writel(0x00002032, &s3c_qos->s3cqos8);
1222
1223 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
1224 writel(0x80928092, &s3c_qos->s3cqos0);
1225 writel(0x20960020, &s3c_qos->s3cqos1);
1226 writel(0x20302030, &s3c_qos->s3cqos2);
1227 writel(0x20AA20DC, &s3c_qos->s3cqos3);
1228 writel(0x00002032, &s3c_qos->s3cqos4);
1229 writel(0x20960020, &s3c_qos->s3cqos5);
1230 writel(0x20302030, &s3c_qos->s3cqos6);
1231 writel(0x20AA20DC, &s3c_qos->s3cqos7);
1232 writel(0x00002032, &s3c_qos->s3cqos8);
1233
1234 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1235 writel(0x00828092, &s3c_qos->s3cqos0);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1236 writel(0x20960020, &s3c_qos->s3cqos1);
1237 writel(0x20302030, &s3c_qos->s3cqos2);
1238 writel(0x20AA20FA, &s3c_qos->s3cqos3);
1239 writel(0x00002032, &s3c_qos->s3cqos4);
1240 writel(0x20960020, &s3c_qos->s3cqos5);
1241 writel(0x20302030, &s3c_qos->s3cqos6);
1242 writel(0x20AA20FA, &s3c_qos->s3cqos7);
1243 writel(0x00002032, &s3c_qos->s3cqos8);
1244
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1245 writel(0x00310808, &s3c->s3carcr11);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1246
1247 /* DBSC -QoS */
1248 /* DBSC0 - Read */
1249 for (i = DBSC3_00; i < DBSC3_NR; i++) {
1250 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
1251 writel(0x00000002, &qos_addr->dblgcnt);
1252 writel(0x00002096, &qos_addr->dbtmval0);
1253 writel(0x00002064, &qos_addr->dbtmval1);
1254 writel(0x00002032, &qos_addr->dbtmval2);
1255 writel(0x00001FB0, &qos_addr->dbtmval3);
1256 writel(0x00000001, &qos_addr->dbrqctr);
1257 writel(0x00002078, &qos_addr->dbthres0);
1258 writel(0x0000204B, &qos_addr->dbthres1);
1259 writel(0x0000201E, &qos_addr->dbthres2);
1260 writel(0x00000001, &qos_addr->dblgqon);
1261 }
1262
1263 /* DBSC0 - Write */
1264 for (i = DBSC3_00; i < DBSC3_NR; i++) {
1265 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
1266 writel(0x00000002, &qos_addr->dblgcnt);
1267 writel(0x00002096, &qos_addr->dbtmval0);
1268 writel(0x00002064, &qos_addr->dbtmval1);
1269 writel(0x00002050, &qos_addr->dbtmval2);
1270 writel(0x0000203A, &qos_addr->dbtmval3);
1271 writel(0x00000001, &qos_addr->dbrqctr);
1272 writel(0x00002078, &qos_addr->dbthres0);
1273 writel(0x0000204B, &qos_addr->dbthres1);
1274 writel(0x0000203C, &qos_addr->dbthres2);
1275 writel(0x00000001, &qos_addr->dblgqon);
1276 }
1277
1278 /* MXI -QoS */
1279 /* Transaction Control (MXI) */
1280 mxi = (struct rcar_mxi *)MXI_BASE;
1281 writel(0x00000013, &mxi->mxrtcr);
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1282 writel(0x00000016, &mxi->mxwtcr);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1283 writel(0x00B800C0, &mxi->mxsaar0);
1284 writel(0x02000800, &mxi->mxsaar1);
1285
1286 /* QoS Control (MXI) */
1287 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
1288 writel(0x0000000C, &mxi_qos->vspdu0);
1289 writel(0x0000000C, &mxi_qos->vspdu1);
1290 writel(0x0000000E, &mxi_qos->du0);
1291 writel(0x0000000E, &mxi_qos->du1);
1292
1293 /* AXI -QoS */
1294 /* Transaction Control (MXI) */
1295 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
1296 writel(0x00000002, &axi_qos->qosconf);
1297 writel(0x00002245, &axi_qos->qosctset0);
1298 writel(0x00002096, &axi_qos->qosctset1);
1299 writel(0x00002030, &axi_qos->qosctset2);
1300 writel(0x00002030, &axi_qos->qosctset3);
1301 writel(0x00000001, &axi_qos->qosreqctr);
1302 writel(0x00002064, &axi_qos->qosthres0);
1303 writel(0x00002004, &axi_qos->qosthres1);
1304 writel(0x00000000, &axi_qos->qosthres2);
1305 writel(0x00000001, &axi_qos->qosqon);
1306
1307 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
1308 writel(0x00000000, &axi_qos->qosconf);
1309 writel(0x000020A6, &axi_qos->qosctset0);
1310 writel(0x00000001, &axi_qos->qosreqctr);
1311 writel(0x00002064, &axi_qos->qosthres0);
1312 writel(0x00002004, &axi_qos->qosthres1);
1313 writel(0x00000000, &axi_qos->qosthres2);
1314 writel(0x00000001, &axi_qos->qosqon);
1315
1316 axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
1317 writel(0x00000000, &axi_qos->qosconf);
1318 writel(0x000020A6, &axi_qos->qosctset0);
1319 writel(0x00000001, &axi_qos->qosreqctr);
1320 writel(0x00002064, &axi_qos->qosthres0);
1321 writel(0x00002004, &axi_qos->qosthres1);
1322 writel(0x00000000, &axi_qos->qosthres2);
1323 writel(0x00000001, &axi_qos->qosqon);
1324
1325 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
1326 writel(0x00000000, &axi_qos->qosconf);
1327 writel(0x00002021, &axi_qos->qosctset0);
1328 writel(0x00000001, &axi_qos->qosreqctr);
1329 writel(0x00002064, &axi_qos->qosthres0);
1330 writel(0x00002004, &axi_qos->qosthres1);
1331 writel(0x00000000, &axi_qos->qosthres2);
1332 writel(0x00000001, &axi_qos->qosqon);
1333
1334 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
1335 writel(0x00000000, &axi_qos->qosconf);
1336 writel(0x00002037, &axi_qos->qosctset0);
1337 writel(0x00000001, &axi_qos->qosreqctr);
1338 writel(0x00002064, &axi_qos->qosthres0);
1339 writel(0x00002004, &axi_qos->qosthres1);
1340 writel(0x00000000, &axi_qos->qosthres2);
1341 writel(0x00000001, &axi_qos->qosqon);
1342
1343 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
1344 writel(0x00000002, &axi_qos->qosconf);
1345 writel(0x00002245, &axi_qos->qosctset0);
1346 writel(0x00002096, &axi_qos->qosctset1);
1347 writel(0x00002030, &axi_qos->qosctset2);
1348 writel(0x00002030, &axi_qos->qosctset3);
1349 writel(0x00000001, &axi_qos->qosreqctr);
1350 writel(0x00002064, &axi_qos->qosthres0);
1351 writel(0x00002004, &axi_qos->qosthres1);
1352 writel(0x00000000, &axi_qos->qosthres2);
1353 writel(0x00000001, &axi_qos->qosqon);
1354
1355 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
1356 writel(0x00000002, &axi_qos->qosconf);
1357 writel(0x00002245, &axi_qos->qosctset0);
1358 writel(0x00002096, &axi_qos->qosctset1);
1359 writel(0x00002030, &axi_qos->qosctset2);
1360 writel(0x00002030, &axi_qos->qosctset3);
1361 writel(0x00000001, &axi_qos->qosreqctr);
1362 writel(0x00002064, &axi_qos->qosthres0);
1363 writel(0x00002004, &axi_qos->qosthres1);
1364 writel(0x00000000, &axi_qos->qosthres2);
1365 writel(0x00000001, &axi_qos->qosqon);
1366
1367 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
1368 writel(0x00000002, &axi_qos->qosconf);
1369 writel(0x00002245, &axi_qos->qosctset0);
1370 writel(0x00002096, &axi_qos->qosctset1);
1371 writel(0x00002030, &axi_qos->qosctset2);
1372 writel(0x00002030, &axi_qos->qosctset3);
1373 writel(0x00000001, &axi_qos->qosreqctr);
1374 writel(0x00002064, &axi_qos->qosthres0);
1375 writel(0x00002004, &axi_qos->qosthres1);
1376 writel(0x00000000, &axi_qos->qosthres2);
1377 writel(0x00000001, &axi_qos->qosqon);
1378
1379 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
1380 writel(0x00000000, &axi_qos->qosconf);
1381 writel(0x0000214C, &axi_qos->qosctset0);
1382 writel(0x00000001, &axi_qos->qosreqctr);
1383 writel(0x00002064, &axi_qos->qosthres0);
1384 writel(0x00002004, &axi_qos->qosthres1);
1385 writel(0x00000000, &axi_qos->qosthres2);
1386 writel(0x00000001, &axi_qos->qosqon);
1387
1388 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
1389 writel(0x00000001, &axi_qos->qosconf);
1390 writel(0x00002004, &axi_qos->qosctset0);
1391 writel(0x00002096, &axi_qos->qosctset1);
1392 writel(0x00002030, &axi_qos->qosctset2);
1393 writel(0x00002030, &axi_qos->qosctset3);
1394 writel(0x00000001, &axi_qos->qosreqctr);
1395 writel(0x00002064, &axi_qos->qosthres0);
1396 writel(0x00002004, &axi_qos->qosthres1);
1397 writel(0x00000000, &axi_qos->qosthres2);
1398 writel(0x00000001, &axi_qos->qosqon);
1399
1400 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
1401 writel(0x00000001, &axi_qos->qosconf);
1402 writel(0x00002004, &axi_qos->qosctset0);
1403 writel(0x00002096, &axi_qos->qosctset1);
1404 writel(0x00002030, &axi_qos->qosctset2);
1405 writel(0x00002030, &axi_qos->qosctset3);
1406 writel(0x00000001, &axi_qos->qosreqctr);
1407 writel(0x00002064, &axi_qos->qosthres0);
1408 writel(0x00002004, &axi_qos->qosthres1);
1409 writel(0x00000000, &axi_qos->qosthres2);
1410 writel(0x00000001, &axi_qos->qosqon);
1411
1412 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
1413 writel(0x00000001, &axi_qos->qosconf);
1414 writel(0x00002004, &axi_qos->qosctset0);
1415 writel(0x00002096, &axi_qos->qosctset1);
1416 writel(0x00002030, &axi_qos->qosctset2);
1417 writel(0x00002030, &axi_qos->qosctset3);
1418 writel(0x00000001, &axi_qos->qosreqctr);
1419 writel(0x00002064, &axi_qos->qosthres0);
1420 writel(0x00002004, &axi_qos->qosthres1);
1421 writel(0x00000000, &axi_qos->qosthres2);
1422 writel(0x00000001, &axi_qos->qosqon);
1423
1424 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
1425 writel(0x00000001, &axi_qos->qosconf);
1426 writel(0x00002004, &axi_qos->qosctset0);
1427 writel(0x00002096, &axi_qos->qosctset1);
1428 writel(0x00002030, &axi_qos->qosctset2);
1429 writel(0x00002030, &axi_qos->qosctset3);
1430 writel(0x00000001, &axi_qos->qosreqctr);
1431 writel(0x00002064, &axi_qos->qosthres0);
1432 writel(0x00002004, &axi_qos->qosthres1);
1433 writel(0x00000000, &axi_qos->qosthres2);
1434 writel(0x00000001, &axi_qos->qosqon);
1435
1436 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
1437 writel(0x00000001, &axi_qos->qosconf);
1438 writel(0x00002004, &axi_qos->qosctset0);
1439 writel(0x00002096, &axi_qos->qosctset1);
1440 writel(0x00002030, &axi_qos->qosctset2);
1441 writel(0x00002030, &axi_qos->qosctset3);
1442 writel(0x00000001, &axi_qos->qosreqctr);
1443 writel(0x00002064, &axi_qos->qosthres0);
1444 writel(0x00002004, &axi_qos->qosthres1);
1445 writel(0x00000000, &axi_qos->qosthres2);
1446 writel(0x00000001, &axi_qos->qosqon);
1447
1448 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
1449 writel(0x00000000, &axi_qos->qosconf);
1450 writel(0x00002021, &axi_qos->qosctset0);
1451 writel(0x00000001, &axi_qos->qosreqctr);
1452 writel(0x00002064, &axi_qos->qosthres0);
1453 writel(0x00002004, &axi_qos->qosthres1);
1454 writel(0x00000000, &axi_qos->qosthres2);
1455 writel(0x00000001, &axi_qos->qosqon);
1456
1457 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
1458 writel(0x00000000, &axi_qos->qosconf);
1459 writel(0x00002021, &axi_qos->qosctset0);
1460 writel(0x00000001, &axi_qos->qosreqctr);
1461 writel(0x00002064, &axi_qos->qosthres0);
1462 writel(0x00002004, &axi_qos->qosthres1);
1463 writel(0x00000000, &axi_qos->qosthres2);
1464 writel(0x00000001, &axi_qos->qosqon);
1465
1466 axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
1467 writel(0x00000000, &axi_qos->qosconf);
1468 writel(0x0000214C, &axi_qos->qosctset0);
1469 writel(0x00000001, &axi_qos->qosreqctr);
1470 writel(0x00002064, &axi_qos->qosthres0);
1471 writel(0x00002004, &axi_qos->qosthres1);
1472 writel(0x00000000, &axi_qos->qosthres2);
1473 writel(0x00000001, &axi_qos->qosqon);
1474
1475 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
1476 writel(0x00000002, &axi_qos->qosconf);
1477 writel(0x00002245, &axi_qos->qosctset0);
1478 writel(0x00002096, &axi_qos->qosctset1);
1479 writel(0x00002030, &axi_qos->qosctset2);
1480 writel(0x00002030, &axi_qos->qosctset3);
1481 writel(0x00000001, &axi_qos->qosreqctr);
1482 writel(0x00002064, &axi_qos->qosthres0);
1483 writel(0x00002004, &axi_qos->qosthres1);
1484 writel(0x00000000, &axi_qos->qosthres2);
1485 writel(0x00000001, &axi_qos->qosqon);
1486
1487 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
1488 writel(0x00000000, &axi_qos->qosconf);
1489 writel(0x000020A6, &axi_qos->qosctset0);
1490 writel(0x00000001, &axi_qos->qosreqctr);
1491 writel(0x00002064, &axi_qos->qosthres0);
1492 writel(0x00002004, &axi_qos->qosthres1);
1493 writel(0x00000000, &axi_qos->qosthres2);
1494 writel(0x00000001, &axi_qos->qosqon);
1495
1496 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
1497 writel(0x00000000, &axi_qos->qosconf);
1498 writel(0x000020A6, &axi_qos->qosctset0);
1499 writel(0x00000001, &axi_qos->qosreqctr);
1500 writel(0x00002064, &axi_qos->qosthres0);
1501 writel(0x00002004, &axi_qos->qosthres1);
1502 writel(0x00000000, &axi_qos->qosthres2);
1503 writel(0x00000001, &axi_qos->qosqon);
1504
1505 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
1506 writel(0x00000000, &axi_qos->qosconf);
1507 writel(0x00002053, &axi_qos->qosctset0);
1508 writel(0x00000001, &axi_qos->qosreqctr);
1509 writel(0x00002064, &axi_qos->qosthres0);
1510 writel(0x00002004, &axi_qos->qosthres1);
1511 writel(0x00000000, &axi_qos->qosthres2);
1512 writel(0x00000001, &axi_qos->qosqon);
1513
1514 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
1515 writel(0x00000000, &axi_qos->qosconf);
1516 writel(0x00002053, &axi_qos->qosctset0);
1517 writel(0x00000001, &axi_qos->qosreqctr);
1518 writel(0x00002064, &axi_qos->qosthres0);
1519 writel(0x00002004, &axi_qos->qosthres1);
1520 writel(0x00000000, &axi_qos->qosthres2);
1521 writel(0x00000001, &axi_qos->qosqon);
1522
1523 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
1524 writel(0x00000000, &axi_qos->qosconf);
1525 writel(0x00002053, &axi_qos->qosctset0);
1526 writel(0x00000001, &axi_qos->qosreqctr);
1527 writel(0x00002064, &axi_qos->qosthres0);
1528 writel(0x00002004, &axi_qos->qosthres1);
1529 writel(0x00000000, &axi_qos->qosthres2);
1530 writel(0x00000001, &axi_qos->qosqon);
1531
1532 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
1533 writel(0x00000000, &axi_qos->qosconf);
1534 writel(0x0000214C, &axi_qos->qosctset0);
1535 writel(0x00000001, &axi_qos->qosreqctr);
1536 writel(0x00002064, &axi_qos->qosthres0);
1537 writel(0x00002004, &axi_qos->qosthres1);
1538 writel(0x00000000, &axi_qos->qosthres2);
1539 writel(0x00000001, &axi_qos->qosqon);
1540
1541 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
1542 writel(0x00000002, &axi_qos->qosconf);
1543 writel(0x00002245, &axi_qos->qosctset0);
1544 writel(0x00000001, &axi_qos->qosreqctr);
1545 writel(0x00002064, &axi_qos->qosthres0);
1546 writel(0x00002004, &axi_qos->qosthres1);
1547 writel(0x00000000, &axi_qos->qosthres2);
1548 writel(0x00000001, &axi_qos->qosqon);
1549
1550 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
1551 writel(0x00000000, &axi_qos->qosconf);
1552 writel(0x00002029, &axi_qos->qosctset0);
1553 writel(0x00000001, &axi_qos->qosreqctr);
1554 writel(0x00002064, &axi_qos->qosthres0);
1555 writel(0x00002004, &axi_qos->qosthres1);
1556 writel(0x00000000, &axi_qos->qosthres2);
1557 writel(0x00000001, &axi_qos->qosqon);
1558
1559 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
1560 writel(0x00000002, &axi_qos->qosconf);
1561 writel(0x00002245, &axi_qos->qosctset0);
1562 writel(0x00000001, &axi_qos->qosreqctr);
1563 writel(0x00002064, &axi_qos->qosthres0);
1564 writel(0x00002004, &axi_qos->qosthres1);
1565 writel(0x00000000, &axi_qos->qosthres2);
1566 writel(0x00000001, &axi_qos->qosqon);
1567
1568 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
1569 writel(0x00000000, &axi_qos->qosconf);
1570 writel(0x00002053, &axi_qos->qosctset0);
1571 writel(0x00000001, &axi_qos->qosreqctr);
1572 writel(0x00002064, &axi_qos->qosthres0);
1573 writel(0x00002004, &axi_qos->qosthres1);
1574 writel(0x00000000, &axi_qos->qosthres2);
1575 writel(0x00000001, &axi_qos->qosqon);
1576
1577 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
1578 writel(0x00000000, &axi_qos->qosconf);
1579 writel(0x000020A6, &axi_qos->qosctset0);
1580 writel(0x00000001, &axi_qos->qosreqctr);
1581 writel(0x00002064, &axi_qos->qosthres0);
1582 writel(0x00002004, &axi_qos->qosthres1);
1583 writel(0x00000000, &axi_qos->qosthres2);
1584 writel(0x00000001, &axi_qos->qosqon);
1585
1586 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
1587 writel(0x00000000, &axi_qos->qosconf);
1588 writel(0x00002053, &axi_qos->qosctset0);
1589 writel(0x00000001, &axi_qos->qosreqctr);
1590 writel(0x00002064, &axi_qos->qosthres0);
1591 writel(0x00002004, &axi_qos->qosthres1);
1592 writel(0x00000000, &axi_qos->qosthres2);
1593 writel(0x00000001, &axi_qos->qosqon);
1594
1595 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
1596 writel(0x00000002, &axi_qos->qosconf);
1597 writel(0x00002245, &axi_qos->qosctset0);
1598 writel(0x00000001, &axi_qos->qosreqctr);
1599 writel(0x00002064, &axi_qos->qosthres0);
1600 writel(0x00002004, &axi_qos->qosthres1);
1601 writel(0x00000000, &axi_qos->qosthres2);
1602 writel(0x00000001, &axi_qos->qosqon);
1603
1604 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE;
1605 writel(0x00000000, &axi_qos->qosconf);
1606 writel(0x00002053, &axi_qos->qosctset0);
1607 writel(0x00000001, &axi_qos->qosreqctr);
1608 writel(0x00002064, &axi_qos->qosthres0);
1609 writel(0x00002004, &axi_qos->qosthres1);
1610 writel(0x00000000, &axi_qos->qosthres2);
1611 writel(0x00000001, &axi_qos->qosqon);
1612
1613 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE;
1614 writel(0x00000000, &axi_qos->qosconf);
1615 writel(0x00002053, &axi_qos->qosctset0);
1616 writel(0x00000001, &axi_qos->qosreqctr);
1617 writel(0x00002064, &axi_qos->qosthres0);
1618 writel(0x00002004, &axi_qos->qosthres1);
1619 writel(0x00000000, &axi_qos->qosthres2);
1620 writel(0x00000001, &axi_qos->qosqon);
1621
1622 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
1623 writel(0x00000000, &axi_qos->qosconf);
1624 writel(0x0000214C, &axi_qos->qosctset0);
1625 writel(0x00000001, &axi_qos->qosreqctr);
1626 writel(0x00002064, &axi_qos->qosthres0);
1627 writel(0x00002004, &axi_qos->qosthres1);
1628 writel(0x00000000, &axi_qos->qosthres2);
1629 writel(0x00000001, &axi_qos->qosqon);
1630
1631 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
1632 writel(0x00000000, &axi_qos->qosconf);
1633 writel(0x0000214C, &axi_qos->qosctset0);
1634 writel(0x00000001, &axi_qos->qosreqctr);
1635 writel(0x00002064, &axi_qos->qosthres0);
1636 writel(0x00002004, &axi_qos->qosthres1);
1637 writel(0x00000000, &axi_qos->qosthres2);
1638 writel(0x00000001, &axi_qos->qosqon);
1639
1640 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
1641 writel(0x00000000, &axi_qos->qosconf);
1642 writel(0x000020A6, &axi_qos->qosctset0);
1643 writel(0x00000001, &axi_qos->qosreqctr);
1644 writel(0x00002064, &axi_qos->qosthres0);
1645 writel(0x00002004, &axi_qos->qosthres1);
1646 writel(0x00000000, &axi_qos->qosthres2);
1647 writel(0x00000001, &axi_qos->qosqon);
1648
1649 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
1650 writel(0x00000000, &axi_qos->qosconf);
1651 writel(0x00002053, &axi_qos->qosctset0);
1652 writel(0x00000001, &axi_qos->qosreqctr);
1653 writel(0x00002064, &axi_qos->qosthres0);
1654 writel(0x00002004, &axi_qos->qosthres1);
1655 writel(0x00000000, &axi_qos->qosthres2);
1656 writel(0x00000001, &axi_qos->qosqon);
1657
1658 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
1659 writel(0x00000000, &axi_qos->qosconf);
1660 writel(0x00002053, &axi_qos->qosctset0);
1661 writel(0x00000001, &axi_qos->qosreqctr);
1662 writel(0x00002064, &axi_qos->qosthres0);
1663 writel(0x00002004, &axi_qos->qosthres1);
1664 writel(0x00000000, &axi_qos->qosthres2);
1665 writel(0x00000001, &axi_qos->qosqon);
1666
1667 /* QoS Register (RT-AXI) */
1668 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
Nobuhiro Iwamatsud20d6d72015-03-05 08:30:37 +0900[diff] [blame]1669 writel(0x00000001, &axi_qos->qosconf);
Nobuhiro Iwamatsu9f1c3be2014-07-29 12:14:05 +0900[diff] [blame]1670 writel(0x00002053, &axi_qos->qosctset0);
1671 writel(0x00002096, &axi_qos->qosctset1);
1672 writel(0x00002030, &axi_qos->qosctset2);
1673 writel(0x00002030, &axi_qos->qosctset3);
1674 writel(0x00000001, &axi_qos->qosreqctr);
1675 writel(0x00002064, &axi_qos->qosthres0);
1676 writel(0x00002004, &axi_qos->qosthres1);
1677 writel(0x00000000, &axi_qos->qosthres2);
1678 writel(0x00000001, &axi_qos->qosqon);
1679
1680 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
1681 writel(0x00000000, &axi_qos->qosconf);
1682 writel(0x00002053, &axi_qos->qosctset0);
1683 writel(0x00002096, &axi_qos->qosctset1);
1684 writel(0x00002030, &axi_qos->qosctset2);
1685 writel(0x00002030, &axi_qos->qosctset3);
1686 writel(0x00000001, &axi_qos->qosreqctr);
1687 writel(0x00002064, &axi_qos->qosthres0);
1688 writel(0x00002004, &axi_qos->qosthres1);
1689 writel(0x00000000, &axi_qos->qosthres2);
1690 writel(0x00000001, &axi_qos->qosqon);
1691
1692 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE;
1693 writel(0x00000000, &axi_qos->qosconf);
1694 writel(0x00002299, &axi_qos->qosctset0);
1695 writel(0x00000001, &axi_qos->qosreqctr);
1696 writel(0x00002064, &axi_qos->qosthres0);
1697 writel(0x00002004, &axi_qos->qosthres1);
1698 writel(0x00000000, &axi_qos->qosthres2);
1699 writel(0x00000001, &axi_qos->qosqon);
1700
1701 axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
1702 writel(0x00000000, &axi_qos->qosconf);
1703 writel(0x00002029, &axi_qos->qosctset0);
1704 writel(0x00000001, &axi_qos->qosreqctr);
1705 writel(0x00002064, &axi_qos->qosthres0);
1706 writel(0x00002004, &axi_qos->qosthres1);
1707 writel(0x00000000, &axi_qos->qosthres2);
1708 writel(0x00000001, &axi_qos->qosqon);
1709
1710 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
1711 writel(0x00000002, &axi_qos->qosconf);
1712 writel(0x00002245, &axi_qos->qosctset0);
1713 writel(0x00002096, &axi_qos->qosctset1);
1714 writel(0x00002030, &axi_qos->qosctset2);
1715 writel(0x00002030, &axi_qos->qosctset3);
1716 writel(0x00000001, &axi_qos->qosreqctr);
1717 writel(0x00002064, &axi_qos->qosthres0);
1718 writel(0x00002004, &axi_qos->qosthres1);
1719 writel(0x00000000, &axi_qos->qosthres2);
1720 writel(0x00000001, &axi_qos->qosqon);
1721
1722 axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
1723 writel(0x00000000, &axi_qos->qosconf);
1724 writel(0x00002029, &axi_qos->qosctset0);
1725 writel(0x00002096, &axi_qos->qosctset1);
1726 writel(0x00002030, &axi_qos->qosctset2);
1727 writel(0x00002030, &axi_qos->qosctset3);
1728 writel(0x00000001, &axi_qos->qosreqctr);
1729 writel(0x00002064, &axi_qos->qosthres0);
1730 writel(0x00002004, &axi_qos->qosthres1);
1731 writel(0x00000000, &axi_qos->qosthres2);
1732 writel(0x00000001, &axi_qos->qosqon);
1733
1734 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
1735 writel(0x00000002, &axi_qos->qosconf);
1736 writel(0x00002245, &axi_qos->qosctset0);
1737 writel(0x00000001, &axi_qos->qosreqctr);
1738 writel(0x00002064, &axi_qos->qosthres0);
1739 writel(0x00002004, &axi_qos->qosthres1);
1740 writel(0x00000000, &axi_qos->qosthres2);
1741 writel(0x00000001, &axi_qos->qosqon);
1742
1743 /* QoS Register (MP-AXI) */
1744 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
1745 writel(0x00000000, &axi_qos->qosconf);
1746 writel(0x00002037, &axi_qos->qosctset0);
1747 writel(0x00000001, &axi_qos->qosreqctr);
1748 writel(0x00002064, &axi_qos->qosthres0);
1749 writel(0x00002004, &axi_qos->qosthres1);
1750 writel(0x00000000, &axi_qos->qosthres2);
1751 writel(0x00000001, &axi_qos->qosqon);
1752
1753 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
1754 writel(0x00000001, &axi_qos->qosconf);
1755 writel(0x00002014, &axi_qos->qosctset0);
1756 writel(0x00000040, &axi_qos->qosreqctr);
1757 writel(0x00002064, &axi_qos->qosthres0);
1758 writel(0x00002004, &axi_qos->qosthres1);
1759 writel(0x00000000, &axi_qos->qosthres2);
1760 writel(0x00000001, &axi_qos->qosqon);
1761
1762 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
1763 writel(0x00000001, &axi_qos->qosconf);
1764 writel(0x00002014, &axi_qos->qosctset0);
1765 writel(0x00000040, &axi_qos->qosreqctr);
1766 writel(0x00002064, &axi_qos->qosthres0);
1767 writel(0x00002004, &axi_qos->qosthres1);
1768 writel(0x00000000, &axi_qos->qosthres2);
1769 writel(0x00000001, &axi_qos->qosqon);
1770
1771 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
1772 writel(0x00000001, &axi_qos->qosconf);
1773 writel(0x00001FF0, &axi_qos->qosctset0);
1774 writel(0x00000020, &axi_qos->qosreqctr);
1775 writel(0x00002064, &axi_qos->qosthres0);
1776 writel(0x00002004, &axi_qos->qosthres1);
1777 writel(0x00002001, &axi_qos->qosthres2);
1778 writel(0x00000001, &axi_qos->qosqon);
1779
1780 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
1781 writel(0x00000001, &axi_qos->qosconf);
1782 writel(0x00002004, &axi_qos->qosctset0);
1783 writel(0x00002096, &axi_qos->qosctset1);
1784 writel(0x00002030, &axi_qos->qosctset2);
1785 writel(0x00002030, &axi_qos->qosctset3);
1786 writel(0x00000001, &axi_qos->qosreqctr);
1787 writel(0x00002064, &axi_qos->qosthres0);
1788 writel(0x00002004, &axi_qos->qosthres1);
1789 writel(0x00000000, &axi_qos->qosthres2);
1790 writel(0x00000001, &axi_qos->qosqon);
1791
1792 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
1793 writel(0x00000000, &axi_qos->qosconf);
1794 writel(0x00002053, &axi_qos->qosctset0);
1795 writel(0x00000001, &axi_qos->qosreqctr);
1796 writel(0x00002064, &axi_qos->qosthres0);
1797 writel(0x00002004, &axi_qos->qosthres1);
1798 writel(0x00000000, &axi_qos->qosthres2);
1799 writel(0x00000001, &axi_qos->qosqon);
1800
1801 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
1802 writel(0x00000000, &axi_qos->qosconf);
1803 writel(0x0000206E, &axi_qos->qosctset0);
1804 writel(0x00000001, &axi_qos->qosreqctr);
1805 writel(0x00002064, &axi_qos->qosthres0);
1806 writel(0x00002004, &axi_qos->qosthres1);
1807 writel(0x00000000, &axi_qos->qosthres2);
1808 writel(0x00000001, &axi_qos->qosqon);
1809
1810 /* QoS Register (SYS-AXI256) */
1811 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
1812 writel(0x00000002, &axi_qos->qosconf);
1813 writel(0x000020EB, &axi_qos->qosctset0);
1814 writel(0x00002096, &axi_qos->qosctset1);
1815 writel(0x00002030, &axi_qos->qosctset2);
1816 writel(0x00002030, &axi_qos->qosctset3);
1817 writel(0x00000001, &axi_qos->qosreqctr);
1818 writel(0x00002064, &axi_qos->qosthres0);
1819 writel(0x00002004, &axi_qos->qosthres1);
1820 writel(0x00000000, &axi_qos->qosthres2);
1821 writel(0x00000001, &axi_qos->qosqon);
1822
1823 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
1824 writel(0x00000002, &axi_qos->qosconf);
1825 writel(0x000020EB, &axi_qos->qosctset0);
1826 writel(0x00002096, &axi_qos->qosctset1);
1827 writel(0x00002030, &axi_qos->qosctset2);
1828 writel(0x00002030, &axi_qos->qosctset3);
1829 writel(0x00000001, &axi_qos->qosreqctr);
1830 writel(0x00002064, &axi_qos->qosthres0);
1831 writel(0x00002004, &axi_qos->qosthres1);
1832 writel(0x00000000, &axi_qos->qosthres2);
1833 writel(0x00000001, &axi_qos->qosqon);
1834
1835 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
1836 writel(0x00000002, &axi_qos->qosconf);
1837 writel(0x000020EB, &axi_qos->qosctset0);
1838 writel(0x00002096, &axi_qos->qosctset1);
1839 writel(0x00002030, &axi_qos->qosctset2);
1840 writel(0x00002030, &axi_qos->qosctset3);
1841 writel(0x00000001, &axi_qos->qosreqctr);
1842 writel(0x00002064, &axi_qos->qosthres0);
1843 writel(0x00002004, &axi_qos->qosthres1);
1844 writel(0x00000000, &axi_qos->qosthres2);
1845 writel(0x00000001, &axi_qos->qosqon);
1846
1847 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
1848 writel(0x00000002, &axi_qos->qosconf);
1849 writel(0x000020EB, &axi_qos->qosctset0);
1850 writel(0x00002096, &axi_qos->qosctset1);
1851 writel(0x00002030, &axi_qos->qosctset2);
1852 writel(0x00002030, &axi_qos->qosctset3);
1853 writel(0x00000001, &axi_qos->qosreqctr);
1854 writel(0x00002064, &axi_qos->qosthres0);
1855 writel(0x00002004, &axi_qos->qosthres1);
1856 writel(0x00000000, &axi_qos->qosthres2);
1857 writel(0x00000001, &axi_qos->qosqon);
1858
1859 /* QoS Register (CCI-AXI) */
1860 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
1861 writel(0x00000001, &axi_qos->qosconf);
1862 writel(0x00002004, &axi_qos->qosctset0);
1863 writel(0x00002096, &axi_qos->qosctset1);
1864 writel(0x00002030, &axi_qos->qosctset2);
1865 writel(0x00002030, &axi_qos->qosctset3);
1866 writel(0x00000001, &axi_qos->qosreqctr);
1867 writel(0x00002064, &axi_qos->qosthres0);
1868 writel(0x00002004, &axi_qos->qosthres1);
1869 writel(0x00000000, &axi_qos->qosthres2);
1870 writel(0x00000001, &axi_qos->qosqon);
1871
1872 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
1873 writel(0x00000002, &axi_qos->qosconf);
1874 writel(0x00002245, &axi_qos->qosctset0);
1875 writel(0x00002096, &axi_qos->qosctset1);
1876 writel(0x00002030, &axi_qos->qosctset2);
1877 writel(0x00002030, &axi_qos->qosctset3);
1878 writel(0x00000001, &axi_qos->qosreqctr);
1879 writel(0x00002064, &axi_qos->qosthres0);
1880 writel(0x00002004, &axi_qos->qosthres1);
1881 writel(0x00000000, &axi_qos->qosthres2);
1882 writel(0x00000001, &axi_qos->qosqon);
1883
1884 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
1885 writel(0x00000001, &axi_qos->qosconf);
1886 writel(0x00002004, &axi_qos->qosctset0);
1887 writel(0x00002096, &axi_qos->qosctset1);
1888 writel(0x00002030, &axi_qos->qosctset2);
1889 writel(0x00002030, &axi_qos->qosctset3);
1890 writel(0x00000001, &axi_qos->qosreqctr);
1891 writel(0x00002064, &axi_qos->qosthres0);
1892 writel(0x00002004, &axi_qos->qosthres1);
1893 writel(0x00000000, &axi_qos->qosthres2);
1894 writel(0x00000001, &axi_qos->qosqon);
1895
1896 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
1897 writel(0x00000001, &axi_qos->qosconf);
1898 writel(0x00002004, &axi_qos->qosctset0);
1899 writel(0x00002096, &axi_qos->qosctset1);
1900 writel(0x00002030, &axi_qos->qosctset2);
1901 writel(0x00002030, &axi_qos->qosctset3);
1902 writel(0x00000001, &axi_qos->qosreqctr);
1903 writel(0x00002064, &axi_qos->qosthres0);
1904 writel(0x00002004, &axi_qos->qosthres1);
1905 writel(0x00000000, &axi_qos->qosthres2);
1906 writel(0x00000001, &axi_qos->qosqon);
1907
1908 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
1909 writel(0x00000001, &axi_qos->qosconf);
1910 writel(0x00002004, &axi_qos->qosctset0);
1911 writel(0x00002096, &axi_qos->qosctset1);
1912 writel(0x00002030, &axi_qos->qosctset2);
1913 writel(0x00002030, &axi_qos->qosctset3);
1914 writel(0x00000001, &axi_qos->qosreqctr);
1915 writel(0x00002064, &axi_qos->qosthres0);
1916 writel(0x00002004, &axi_qos->qosthres1);
1917 writel(0x00000000, &axi_qos->qosthres2);
1918 writel(0x00000001, &axi_qos->qosqon);
1919
1920 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
1921 writel(0x00000002, &axi_qos->qosconf);
1922 writel(0x00002245, &axi_qos->qosctset0);
1923 writel(0x00002096, &axi_qos->qosctset1);
1924 writel(0x00002030, &axi_qos->qosctset2);
1925 writel(0x00002030, &axi_qos->qosctset3);
1926 writel(0x00000001, &axi_qos->qosreqctr);
1927 writel(0x00002064, &axi_qos->qosthres0);
1928 writel(0x00002004, &axi_qos->qosthres1);
1929 writel(0x00000000, &axi_qos->qosthres2);
1930 writel(0x00000001, &axi_qos->qosqon);
1931
1932 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
1933 writel(0x00000001, &axi_qos->qosconf);
1934 writel(0x00002004, &axi_qos->qosctset0);
1935 writel(0x00002096, &axi_qos->qosctset1);
1936 writel(0x00002030, &axi_qos->qosctset2);
1937 writel(0x00002030, &axi_qos->qosctset3);
1938 writel(0x00000001, &axi_qos->qosreqctr);
1939 writel(0x00002064, &axi_qos->qosthres0);
1940 writel(0x00002004, &axi_qos->qosthres1);
1941 writel(0x00000000, &axi_qos->qosthres2);
1942 writel(0x00000001, &axi_qos->qosqon);
1943
1944 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
1945 writel(0x00000001, &axi_qos->qosconf);
1946 writel(0x00002004, &axi_qos->qosctset0);
1947 writel(0x00002096, &axi_qos->qosctset1);
1948 writel(0x00002030, &axi_qos->qosctset2);
1949 writel(0x00002030, &axi_qos->qosctset3);
1950 writel(0x00000001, &axi_qos->qosreqctr);
1951 writel(0x00002064, &axi_qos->qosthres0);
1952 writel(0x00002004, &axi_qos->qosthres1);
1953 writel(0x00000000, &axi_qos->qosthres2);
1954 writel(0x00000001, &axi_qos->qosqon);
1955
1956 /* QoS Register (Media-AXI) */
1957 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
1958 writel(0x00000002, &axi_qos->qosconf);
1959 writel(0x000020dc, &axi_qos->qosctset0);
1960 writel(0x00002096, &axi_qos->qosctset1);
1961 writel(0x00002030, &axi_qos->qosctset2);
1962 writel(0x00002030, &axi_qos->qosctset3);
1963 writel(0x00000020, &axi_qos->qosreqctr);
1964 writel(0x000020AA, &axi_qos->qosthres0);
1965 writel(0x00002032, &axi_qos->qosthres1);
1966 writel(0x00000001, &axi_qos->qosthres2);
1967
1968 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
1969 writel(0x00000002, &axi_qos->qosconf);
1970 writel(0x000020dc, &axi_qos->qosctset0);
1971 writel(0x00002096, &axi_qos->qosctset1);
1972 writel(0x00002030, &axi_qos->qosctset2);
1973 writel(0x00002030, &axi_qos->qosctset3);
1974 writel(0x00000020, &axi_qos->qosreqctr);
1975 writel(0x000020AA, &axi_qos->qosthres0);
1976 writel(0x00002032, &axi_qos->qosthres1);
1977 writel(0x00000001, &axi_qos->qosthres2);
1978
1979 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
1980 writel(0x00000001, &axi_qos->qosconf);
1981 writel(0x00002190, &axi_qos->qosctset0);
1982 writel(0x00000020, &axi_qos->qosreqctr);
1983 writel(0x00002064, &axi_qos->qosthres0);
1984 writel(0x00002004, &axi_qos->qosthres1);
1985 writel(0x00000001, &axi_qos->qosthres2);
1986 writel(0x00000001, &axi_qos->qosqon);
1987
1988 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
1989 writel(0x00000001, &axi_qos->qosconf);
1990 writel(0x00002190, &axi_qos->qosctset0);
1991 writel(0x00000020, &axi_qos->qosreqctr);
1992 writel(0x00002004, &axi_qos->qosthres0);
1993 writel(0x00000001, &axi_qos->qosthres1);
1994 writel(0x00000001, &axi_qos->qosthres2);
1995 writel(0x00000001, &axi_qos->qosqon);
1996
1997 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0R_BASE;
1998 writel(0x00000001, &axi_qos->qosconf);
1999 writel(0x00002190, &axi_qos->qosctset0);
2000 writel(0x00000020, &axi_qos->qosreqctr);
2001 writel(0x00002064, &axi_qos->qosthres0);
2002 writel(0x00002004, &axi_qos->qosthres1);
2003 writel(0x00000001, &axi_qos->qosthres2);
2004 writel(0x00000001, &axi_qos->qosqon);
2005
2006 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU0W_BASE;
2007 writel(0x00000001, &axi_qos->qosconf);
2008 writel(0x00002190, &axi_qos->qosctset0);
2009 writel(0x00000020, &axi_qos->qosreqctr);
2010 writel(0x00002004, &axi_qos->qosthres0);
2011 writel(0x00000001, &axi_qos->qosthres1);
2012 writel(0x00000001, &axi_qos->qosthres2);
2013 writel(0x00000001, &axi_qos->qosqon);
2014
2015 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1R_BASE;
2016 writel(0x00000001, &axi_qos->qosconf);
2017 writel(0x00002190, &axi_qos->qosctset0);
2018 writel(0x00000020, &axi_qos->qosreqctr);
2019 writel(0x00002064, &axi_qos->qosthres0);
2020 writel(0x00002004, &axi_qos->qosthres1);
2021 writel(0x00000001, &axi_qos->qosthres2);
2022 writel(0x00000001, &axi_qos->qosqon);
2023
2024 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_GCU1W_BASE;
2025 writel(0x00000001, &axi_qos->qosconf);
2026 writel(0x00002190, &axi_qos->qosctset0);
2027 writel(0x00000020, &axi_qos->qosreqctr);
2028 writel(0x00002004, &axi_qos->qosthres0);
2029 writel(0x00000001, &axi_qos->qosthres1);
2030 writel(0x00000001, &axi_qos->qosthres2);
2031 writel(0x00000001, &axi_qos->qosqon);
2032
2033 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
2034 writel(0x00000001, &axi_qos->qosconf);
2035 writel(0x00002190, &axi_qos->qosctset0);
2036 writel(0x00000020, &axi_qos->qosreqctr);
2037 writel(0x00002064, &axi_qos->qosthres0);
2038 writel(0x00002004, &axi_qos->qosthres1);
2039 writel(0x00000001, &axi_qos->qosthres2);
2040 writel(0x00000001, &axi_qos->qosqon);
2041
2042 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
2043 writel(0x00000001, &axi_qos->qosconf);
2044 writel(0x00002190, &axi_qos->qosctset0);
2045 writel(0x00000020, &axi_qos->qosreqctr);
2046 writel(0x00002004, &axi_qos->qosthres0);
2047 writel(0x00000001, &axi_qos->qosthres1);
2048 writel(0x00000001, &axi_qos->qosthres2);
2049 writel(0x00000001, &axi_qos->qosqon);
2050
2051 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CR_BASE;
2052 writel(0x00000001, &axi_qos->qosconf);
2053 writel(0x00002190, &axi_qos->qosctset0);
2054 writel(0x00000020, &axi_qos->qosreqctr);
2055 writel(0x00002064, &axi_qos->qosthres0);
2056 writel(0x00002004, &axi_qos->qosthres1);
2057 writel(0x00000001, &axi_qos->qosthres2);
2058 writel(0x00000001, &axi_qos->qosqon);
2059
2060 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0CW_BASE;
2061 writel(0x00000001, &axi_qos->qosconf);
2062 writel(0x00002190, &axi_qos->qosctset0);
2063 writel(0x00000020, &axi_qos->qosreqctr);
2064 writel(0x00002004, &axi_qos->qosthres0);
2065 writel(0x00000001, &axi_qos->qosthres1);
2066 writel(0x00000001, &axi_qos->qosthres2);
2067 writel(0x00000001, &axi_qos->qosqon);
2068
2069 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
2070 writel(0x00000001, &axi_qos->qosconf);
2071 writel(0x00002190, &axi_qos->qosctset0);
2072 writel(0x00000020, &axi_qos->qosreqctr);
2073 writel(0x00002064, &axi_qos->qosthres0);
2074 writel(0x00002004, &axi_qos->qosthres1);
2075 writel(0x00000001, &axi_qos->qosthres2);
2076 writel(0x00000001, &axi_qos->qosqon);
2077
2078 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
2079 writel(0x00000001, &axi_qos->qosconf);
2080 writel(0x00002190, &axi_qos->qosctset0);
2081 writel(0x00000020, &axi_qos->qosreqctr);
2082 writel(0x00002004, &axi_qos->qosthres0);
2083 writel(0x00000001, &axi_qos->qosthres1);
2084 writel(0x00000001, &axi_qos->qosthres2);
2085 writel(0x00000001, &axi_qos->qosqon);
2086
2087 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
2088 writel(0x00000001, &axi_qos->qosconf);
2089 writel(0x00002190, &axi_qos->qosctset0);
2090 writel(0x00000020, &axi_qos->qosreqctr);
2091 writel(0x00002064, &axi_qos->qosthres0);
2092 writel(0x00002004, &axi_qos->qosthres1);
2093 writel(0x00000001, &axi_qos->qosthres2);
2094 writel(0x00000001, &axi_qos->qosqon);
2095
2096 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
2097 writel(0x00000001, &axi_qos->qosconf);
2098 writel(0x00002190, &axi_qos->qosctset0);
2099 writel(0x00000020, &axi_qos->qosreqctr);
2100 writel(0x00002004, &axi_qos->qosthres0);
2101 writel(0x00000001, &axi_qos->qosthres1);
2102 writel(0x00000001, &axi_qos->qosthres2);
2103 writel(0x00000001, &axi_qos->qosqon);
2104
2105 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
2106 writel(0x00000001, &axi_qos->qosconf);
2107 writel(0x00002190, &axi_qos->qosctset0);
2108 writel(0x00000020, &axi_qos->qosreqctr);
2109 writel(0x00002064, &axi_qos->qosthres0);
2110 writel(0x00002004, &axi_qos->qosthres1);
2111 writel(0x00000001, &axi_qos->qosthres2);
2112 writel(0x00000001, &axi_qos->qosqon);
2113
2114 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
2115 writel(0x00000001, &axi_qos->qosconf);
2116 writel(0x00002190, &axi_qos->qosctset0);
2117 writel(0x00000020, &axi_qos->qosreqctr);
2118 writel(0x00002004, &axi_qos->qosthres0);
2119 writel(0x00000001, &axi_qos->qosthres1);
2120 writel(0x00000001, &axi_qos->qosthres2);
2121 writel(0x00000001, &axi_qos->qosqon);
2122
2123 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
2124 writel(0x00000001, &axi_qos->qosconf);
2125 writel(0x00001FF0, &axi_qos->qosctset0);
2126 writel(0x00000020, &axi_qos->qosreqctr);
2127 writel(0x00002064, &axi_qos->qosthres0);
2128 writel(0x00002004, &axi_qos->qosthres1);
2129 writel(0x00002001, &axi_qos->qosthres2);
2130 writel(0x00000001, &axi_qos->qosqon);
2131
2132 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0R_BASE;
2133 writel(0x00000001, &axi_qos->qosconf);
2134 writel(0x000020C8, &axi_qos->qosctset0);
2135 writel(0x00000020, &axi_qos->qosreqctr);
2136 writel(0x00002064, &axi_qos->qosthres0);
2137 writel(0x00002004, &axi_qos->qosthres1);
2138 writel(0x00000001, &axi_qos->qosthres2);
2139 writel(0x00000001, &axi_qos->qosqon);
2140
2141 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0W_BASE;
2142 writel(0x00000001, &axi_qos->qosconf);
2143 writel(0x000020C8, &axi_qos->qosctset0);
2144 writel(0x00000020, &axi_qos->qosreqctr);
2145 writel(0x00002004, &axi_qos->qosthres0);
2146 writel(0x00000001, &axi_qos->qosthres1);
2147 writel(0x00000001, &axi_qos->qosthres2);
2148 writel(0x00000001, &axi_qos->qosqon);
2149
2150 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
2151 writel(0x00000001, &axi_qos->qosconf);
2152 writel(0x000020C8, &axi_qos->qosctset0);
2153 writel(0x00000020, &axi_qos->qosreqctr);
2154 writel(0x00002064, &axi_qos->qosthres0);
2155 writel(0x00002004, &axi_qos->qosthres1);
2156 writel(0x00000001, &axi_qos->qosthres2);
2157 writel(0x00000001, &axi_qos->qosqon);
2158
2159 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
2160 writel(0x00000001, &axi_qos->qosconf);
2161 writel(0x000020C8, &axi_qos->qosctset0);
2162 writel(0x00000020, &axi_qos->qosreqctr);
2163 writel(0x00002004, &axi_qos->qosthres0);
2164 writel(0x00000001, &axi_qos->qosthres1);
2165 writel(0x00000001, &axi_qos->qosthres2);
2166 writel(0x00000001, &axi_qos->qosqon);
2167
2168 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
2169 writel(0x00000001, &axi_qos->qosconf);
2170 writel(0x000020C8, &axi_qos->qosctset0);
2171 writel(0x00000020, &axi_qos->qosreqctr);
2172 writel(0x00002064, &axi_qos->qosthres0);
2173 writel(0x00002004, &axi_qos->qosthres1);
2174 writel(0x00000001, &axi_qos->qosthres2);
2175 writel(0x00000001, &axi_qos->qosqon);
2176
2177 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
2178 writel(0x00000001, &axi_qos->qosconf);
2179 writel(0x000020C8, &axi_qos->qosctset0);
2180 writel(0x00000020, &axi_qos->qosreqctr);
2181 writel(0x00002064, &axi_qos->qosthres0);
2182 writel(0x00002004, &axi_qos->qosthres1);
2183 writel(0x00000001, &axi_qos->qosthres2);
2184 writel(0x00000001, &axi_qos->qosqon);
2185
2186 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
2187 writel(0x00000001, &axi_qos->qosconf);
2188 writel(0x000020C8, &axi_qos->qosctset0);
2189 writel(0x00000020, &axi_qos->qosreqctr);
2190 writel(0x00002064, &axi_qos->qosthres0);
2191 writel(0x00002004, &axi_qos->qosthres1);
2192 writel(0x00000001, &axi_qos->qosthres2);
2193 writel(0x00000001, &axi_qos->qosqon);
2194
2195 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
2196 writel(0x00000001, &axi_qos->qosconf);
2197 writel(0x000020C8, &axi_qos->qosctset0);
2198 writel(0x00000020, &axi_qos->qosreqctr);
2199 writel(0x00002004, &axi_qos->qosthres0);
2200 writel(0x00000001, &axi_qos->qosthres1);
2201 writel(0x00000001, &axi_qos->qosthres2);
2202 writel(0x00000001, &axi_qos->qosqon);
2203
2204 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
2205 writel(0x00000001, &axi_qos->qosconf);
2206 writel(0x000020C8, &axi_qos->qosctset0);
2207 writel(0x00000020, &axi_qos->qosreqctr);
2208 writel(0x00002064, &axi_qos->qosthres0);
2209 writel(0x00002004, &axi_qos->qosthres1);
2210 writel(0x00000001, &axi_qos->qosthres2);
2211 writel(0x00000001, &axi_qos->qosqon);
2212
2213 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
2214 writel(0x00000001, &axi_qos->qosconf);
2215 writel(0x000020C8, &axi_qos->qosctset0);
2216 writel(0x00000020, &axi_qos->qosreqctr);
2217 writel(0x00002004, &axi_qos->qosthres0);
2218 writel(0x00000001, &axi_qos->qosthres1);
2219 writel(0x00000001, &axi_qos->qosthres2);
2220 writel(0x00000001, &axi_qos->qosqon);
2221
2222 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
2223 writel(0x00000001, &axi_qos->qosconf);
2224 writel(0x000020C8, &axi_qos->qosctset0);
2225 writel(0x00000020, &axi_qos->qosreqctr);
2226 writel(0x00002064, &axi_qos->qosthres0);
2227 writel(0x00002004, &axi_qos->qosthres1);
2228 writel(0x00000001, &axi_qos->qosthres2);
2229 writel(0x00000001, &axi_qos->qosqon);
2230
2231 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
2232 writel(0x00000001, &axi_qos->qosconf);
2233 writel(0x000020C8, &axi_qos->qosctset0);
2234 writel(0x00000020, &axi_qos->qosreqctr);
2235 writel(0x00002004, &axi_qos->qosthres0);
2236 writel(0x00000001, &axi_qos->qosthres1);
2237 writel(0x00000001, &axi_qos->qosthres2);
2238 writel(0x00000001, &axi_qos->qosqon);
2239
2240 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2R_BASE;
2241 writel(0x00000001, &axi_qos->qosconf);
2242 writel(0x000020C8, &axi_qos->qosctset0);
2243 writel(0x00000020, &axi_qos->qosreqctr);
2244 writel(0x00002064, &axi_qos->qosthres0);
2245 writel(0x00002004, &axi_qos->qosthres1);
2246 writel(0x00000001, &axi_qos->qosthres2);
2247 writel(0x00000001, &axi_qos->qosqon);
2248
2249 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP2W_BASE;
2250 writel(0x00000001, &axi_qos->qosconf);
2251 writel(0x000020C8, &axi_qos->qosctset0);
2252 writel(0x00000020, &axi_qos->qosreqctr);
2253 writel(0x00002004, &axi_qos->qosthres0);
2254 writel(0x00000001, &axi_qos->qosthres1);
2255 writel(0x00000001, &axi_qos->qosthres2);
2256 writel(0x00000001, &axi_qos->qosqon);
2257
2258 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
2259 writel(0x00000003, &axi_qos->qosconf);
2260 writel(0x000020C8, &axi_qos->qosctset0);
2261 writel(0x00000001, &axi_qos->qosreqctr);
2262 writel(0x00002064, &axi_qos->qosthres0);
2263 writel(0x00002004, &axi_qos->qosthres1);
2264 writel(0x00000001, &axi_qos->qosthres2);
2265 writel(0x00000001, &axi_qos->qosqon);
2266
2267 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
2268 writel(0x00000003, &axi_qos->qosconf);
2269 writel(0x000020C8, &axi_qos->qosctset0);
2270 writel(0x00000001, &axi_qos->qosreqctr);
2271 writel(0x00000001, &axi_qos->qosthres0);
2272 writel(0x00000001, &axi_qos->qosthres1);
2273 writel(0x00000001, &axi_qos->qosthres2);
2274 writel(0x00000001, &axi_qos->qosqon);
2275
2276 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
2277 writel(0x00000003, &axi_qos->qosconf);
2278 writel(0x000020C8, &axi_qos->qosctset0);
2279 writel(0x00000001, &axi_qos->qosreqctr);
2280 writel(0x00002064, &axi_qos->qosthres0);
2281 writel(0x00002004, &axi_qos->qosthres1);
2282 writel(0x00000001, &axi_qos->qosthres2);
2283 writel(0x00000001, &axi_qos->qosqon);
2284
2285 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
2286 writel(0x00000003, &axi_qos->qosconf);
2287 writel(0x000020C8, &axi_qos->qosctset0);
2288 writel(0x00000001, &axi_qos->qosreqctr);
2289 writel(0x00000001, &axi_qos->qosthres0);
2290 writel(0x00000001, &axi_qos->qosthres1);
2291 writel(0x00000001, &axi_qos->qosthres2);
2292 writel(0x00000001, &axi_qos->qosqon);
2293
2294 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
2295 writel(0x00000003, &axi_qos->qosconf);
2296 writel(0x00002063, &axi_qos->qosctset0);
2297 writel(0x00000001, &axi_qos->qosreqctr);
2298 writel(0x00002064, &axi_qos->qosthres0);
2299 writel(0x00002004, &axi_qos->qosthres1);
2300 writel(0x00000001, &axi_qos->qosthres2);
2301 writel(0x00000001, &axi_qos->qosqon);
2302
2303 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
2304 writel(0x00000003, &axi_qos->qosconf);
2305 writel(0x00002063, &axi_qos->qosctset0);
2306 writel(0x00000001, &axi_qos->qosreqctr);
2307 writel(0x00000001, &axi_qos->qosthres0);
2308 writel(0x00000001, &axi_qos->qosthres1);
2309 writel(0x00000001, &axi_qos->qosthres2);
2310 writel(0x00000001, &axi_qos->qosqon);
2311
2312 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1R_BASE;
2313 writel(0x00000003, &axi_qos->qosconf);
2314 writel(0x00002063, &axi_qos->qosctset0);
2315 writel(0x00000001, &axi_qos->qosreqctr);
2316 writel(0x00002064, &axi_qos->qosthres0);
2317 writel(0x00002004, &axi_qos->qosthres1);
2318 writel(0x00000001, &axi_qos->qosthres2);
2319 writel(0x00000001, &axi_qos->qosqon);
2320
2321 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU1W_BASE;
2322 writel(0x00000003, &axi_qos->qosconf);
2323 writel(0x00002063, &axi_qos->qosctset0);
2324 writel(0x00000001, &axi_qos->qosreqctr);
2325 writel(0x00000001, &axi_qos->qosthres0);
2326 writel(0x00000001, &axi_qos->qosthres1);
2327 writel(0x00000001, &axi_qos->qosthres2);
2328 writel(0x00000001, &axi_qos->qosqon);
2329
2330 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
2331 writel(0x00000001, &axi_qos->qosconf);
2332 writel(0x00002073, &axi_qos->qosctset0);
2333 writel(0x00000020, &axi_qos->qosreqctr);
2334 writel(0x00002064, &axi_qos->qosthres0);
2335 writel(0x00002004, &axi_qos->qosthres1);
2336 writel(0x00000001, &axi_qos->qosthres2);
2337 writel(0x00000001, &axi_qos->qosqon);
2338
2339 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
2340 writel(0x00000001, &axi_qos->qosconf);
2341 writel(0x00002073, &axi_qos->qosctset0);
2342 writel(0x00000020, &axi_qos->qosreqctr);
2343 writel(0x00002004, &axi_qos->qosthres0);
2344 writel(0x00000001, &axi_qos->qosthres1);
2345 writel(0x00000001, &axi_qos->qosthres2);
2346 writel(0x00000001, &axi_qos->qosqon);
2347
2348 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
2349 writel(0x00000001, &axi_qos->qosconf);
2350 writel(0x00002073, &axi_qos->qosctset0);
2351 writel(0x00000020, &axi_qos->qosreqctr);
2352 writel(0x00002064, &axi_qos->qosthres0);
2353 writel(0x00002004, &axi_qos->qosthres1);
2354 writel(0x00000001, &axi_qos->qosthres2);
2355 writel(0x00000001, &axi_qos->qosqon);
2356
2357 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
2358 writel(0x00000001, &axi_qos->qosconf);
2359 writel(0x00002073, &axi_qos->qosctset0);
2360 writel(0x00000020, &axi_qos->qosreqctr);
2361 writel(0x00002004, &axi_qos->qosthres0);
2362 writel(0x00000001, &axi_qos->qosthres1);
2363 writel(0x00000001, &axi_qos->qosthres2);
2364 writel(0x00000001, &axi_qos->qosqon);
2365
2366 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
2367 writel(0x00000001, &axi_qos->qosconf);
2368 writel(0x00002073, &axi_qos->qosctset0);
2369 writel(0x00000020, &axi_qos->qosreqctr);
2370 writel(0x00002064, &axi_qos->qosthres0);
2371 writel(0x00002004, &axi_qos->qosthres1);
2372 writel(0x00000001, &axi_qos->qosthres2);
2373 writel(0x00000001, &axi_qos->qosqon);
2374
2375 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CR_BASE;
2376 writel(0x00000001, &axi_qos->qosconf);
2377 writel(0x00002073, &axi_qos->qosctset0);
2378 writel(0x00000020, &axi_qos->qosreqctr);
2379 writel(0x00002064, &axi_qos->qosthres0);
2380 writel(0x00002004, &axi_qos->qosthres1);
2381 writel(0x00000001, &axi_qos->qosthres2);
2382 writel(0x00000001, &axi_qos->qosqon);
2383
2384 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1CW_BASE;
2385 writel(0x00000001, &axi_qos->qosconf);
2386 writel(0x00002073, &axi_qos->qosctset0);
2387 writel(0x00000020, &axi_qos->qosreqctr);
2388 writel(0x00002004, &axi_qos->qosthres0);
2389 writel(0x00000001, &axi_qos->qosthres1);
2390 writel(0x00000001, &axi_qos->qosthres2);
2391 writel(0x00000001, &axi_qos->qosqon);
2392
2393 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VR_BASE;
2394 writel(0x00000001, &axi_qos->qosconf);
2395 writel(0x00002073, &axi_qos->qosctset0);
2396 writel(0x00000020, &axi_qos->qosreqctr);
2397 writel(0x00002064, &axi_qos->qosthres0);
2398 writel(0x00002004, &axi_qos->qosthres1);
2399 writel(0x00000001, &axi_qos->qosthres2);
2400 writel(0x00000001, &axi_qos->qosqon);
2401
2402 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP1VW_BASE;
2403 writel(0x00000001, &axi_qos->qosconf);
2404 writel(0x00002073, &axi_qos->qosctset0);
2405 writel(0x00000020, &axi_qos->qosreqctr);
2406 writel(0x00002004, &axi_qos->qosthres0);
2407 writel(0x00000001, &axi_qos->qosthres1);
2408 writel(0x00000001, &axi_qos->qosthres2);
2409 writel(0x00000001, &axi_qos->qosqon);
2410
2411 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC1R_BASE;
2412 writel(0x00000001, &axi_qos->qosconf);
2413 writel(0x00002073, &axi_qos->qosctset0);
2414 writel(0x00000020, &axi_qos->qosreqctr);
2415 writel(0x00002064, &axi_qos->qosthres0);
2416 writel(0x00002004, &axi_qos->qosthres1);
2417 writel(0x00000001, &axi_qos->qosthres2);
2418 writel(0x00000001, &axi_qos->qosqon);
2419}
2420
2421void qos_init(void)
2422{
2423 if (rmobile_get_cpu_rev_integer() >= R8A7790_CUT_ES2X)
2424 qos_init_es2();
2425 else
2426 qos_init_es1();
2427}
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +0900[diff] [blame]2428#else /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */
Nobuhiro Iwamatsufb6f6002014-10-31 16:16:26 +0900[diff] [blame]2429void qos_init(void)
2430{
2431}
Nobuhiro Iwamatsu1cc95f62015-10-10 05:58:28 +0900[diff] [blame]2432#endif /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */