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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00002/*
3 * (C) Copyright 2001
4 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
wdenkc6097192002-11-03 00:24:07 +00005 */
6
7/*
8 * This provides a bit-banged interface to the ethernet MII management
9 * channel.
10 */
11
12#include <common.h>
Simon Glassc74c8e62015-04-05 16:07:39 -060013#include <dm.h>
wdenkc6097192002-11-03 00:24:07 +000014#include <miiphy.h>
Andy Fleming5f184712011-04-08 02:10:27 -050015#include <phy.h>
wdenkc6097192002-11-03 00:24:07 +000016
Marian Balakowicz63ff0042005-10-28 22:30:33 +020017#include <asm/types.h>
18#include <linux/list.h>
19#include <malloc.h>
20#include <net.h>
21
22/* local debug macro */
Marian Balakowicz63ff0042005-10-28 22:30:33 +020023#undef MII_DEBUG
24
25#undef debug
26#ifdef MII_DEBUG
Andy Fleming16a53232011-04-07 14:38:35 -050027#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020028#else
Andy Fleming16a53232011-04-07 14:38:35 -050029#define debug(fmt, args...)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020030#endif /* MII_DEBUG */
31
Marian Balakowicz63ff0042005-10-28 22:30:33 +020032static struct list_head mii_devs;
33static struct mii_dev *current_mii;
34
Mike Frysinger0daac972010-07-27 18:35:09 -040035/*
36 * Lookup the mii_dev struct by the registered device name.
37 */
Andy Fleming5f184712011-04-08 02:10:27 -050038struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger0daac972010-07-27 18:35:09 -040039{
40 struct list_head *entry;
41 struct mii_dev *dev;
42
43 if (!devname) {
44 printf("NULL device name!\n");
45 return NULL;
46 }
47
48 list_for_each(entry, &mii_devs) {
49 dev = list_entry(entry, struct mii_dev, link);
50 if (strcmp(dev->name, devname) == 0)
51 return dev;
52 }
53
Mike Frysinger0daac972010-07-27 18:35:09 -040054 return NULL;
55}
56
Marian Balakowicz63ff0042005-10-28 22:30:33 +020057/*****************************************************************************
58 *
Marian Balakowiczd9785c12005-11-30 18:06:04 +010059 * Initialize global data. Need to be called before any other miiphy routine.
60 */
Mike Frysinger5700bb62010-07-27 18:35:08 -040061void miiphy_init(void)
Marian Balakowiczd9785c12005-11-30 18:06:04 +010062{
Andy Fleming16a53232011-04-07 14:38:35 -050063 INIT_LIST_HEAD(&mii_devs);
Larry Johnson298035d2007-10-31 11:21:29 -050064 current_mii = NULL;
Marian Balakowiczd9785c12005-11-30 18:06:04 +010065}
66
Andy Fleming5f184712011-04-08 02:10:27 -050067struct mii_dev *mdio_alloc(void)
68{
69 struct mii_dev *bus;
70
71 bus = malloc(sizeof(*bus));
72 if (!bus)
73 return bus;
74
75 memset(bus, 0, sizeof(*bus));
76
77 /* initalize mii_dev struct fields */
78 INIT_LIST_HEAD(&bus->link);
79
80 return bus;
81}
82
Bin Mengcb6baca2015-10-07 21:32:37 -070083void mdio_free(struct mii_dev *bus)
84{
85 free(bus);
86}
87
Andy Fleming5f184712011-04-08 02:10:27 -050088int mdio_register(struct mii_dev *bus)
89{
Peng Fand39449b2015-11-24 17:03:47 +080090 if (!bus || !bus->read || !bus->write)
Andy Fleming5f184712011-04-08 02:10:27 -050091 return -1;
92
93 /* check if we have unique name */
94 if (miiphy_get_dev_by_name(bus->name)) {
95 printf("mdio_register: non unique device name '%s'\n",
96 bus->name);
97 return -1;
98 }
99
100 /* add it to the list */
101 list_add_tail(&bus->link, &mii_devs);
102
103 if (!current_mii)
104 current_mii = bus;
105
106 return 0;
107}
108
Michal Simek79e2a6a2016-12-08 10:06:26 +0100109int mdio_register_seq(struct mii_dev *bus, int seq)
110{
111 int ret;
112
113 /* Setup a unique name for each mdio bus */
114 ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
115 if (ret < 0)
116 return ret;
117
118 return mdio_register(bus);
119}
120
Bin Mengcb6baca2015-10-07 21:32:37 -0700121int mdio_unregister(struct mii_dev *bus)
122{
123 if (!bus)
124 return 0;
125
126 /* delete it from the list */
127 list_del(&bus->link);
128
129 if (current_mii == bus)
130 current_mii = NULL;
131
132 return 0;
133}
134
Andy Fleming5f184712011-04-08 02:10:27 -0500135void mdio_list_devices(void)
136{
137 struct list_head *entry;
138
139 list_for_each(entry, &mii_devs) {
140 int i;
141 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
142
143 printf("%s:\n", bus->name);
144
145 for (i = 0; i < PHY_MAX_ADDR; i++) {
146 struct phy_device *phydev = bus->phymap[i];
147
148 if (phydev) {
Michal Simek15a2acd2016-11-16 08:41:01 +0100149 printf("%x - %s", i, phydev->drv->name);
Andy Fleming5f184712011-04-08 02:10:27 -0500150
151 if (phydev->dev)
152 printf(" <--> %s\n", phydev->dev->name);
153 else
154 printf("\n");
155 }
156 }
157 }
158}
159
Mike Frysinger5700bb62010-07-27 18:35:08 -0400160int miiphy_set_current_dev(const char *devname)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200161{
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200162 struct mii_dev *dev;
163
Andy Fleming5f184712011-04-08 02:10:27 -0500164 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger0daac972010-07-27 18:35:09 -0400165 if (dev) {
166 current_mii = dev;
167 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200168 }
169
Andy Fleming5f184712011-04-08 02:10:27 -0500170 printf("No such device: %s\n", devname);
171
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200172 return 1;
173}
174
Andy Fleming5f184712011-04-08 02:10:27 -0500175struct mii_dev *mdio_get_current_dev(void)
176{
177 return current_mii;
178}
179
180struct phy_device *mdio_phydev_for_ethname(const char *ethname)
181{
182 struct list_head *entry;
183 struct mii_dev *bus;
184
185 list_for_each(entry, &mii_devs) {
186 int i;
187 bus = list_entry(entry, struct mii_dev, link);
188
189 for (i = 0; i < PHY_MAX_ADDR; i++) {
190 if (!bus->phymap[i] || !bus->phymap[i]->dev)
191 continue;
192
193 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
194 return bus->phymap[i];
195 }
196 }
197
198 printf("%s is not a known ethernet\n", ethname);
199 return NULL;
200}
201
Mike Frysinger5700bb62010-07-27 18:35:08 -0400202const char *miiphy_get_current_dev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200203{
204 if (current_mii)
205 return current_mii->name;
206
207 return NULL;
208}
209
Mike Frysingerede16ea2010-07-27 18:35:10 -0400210static struct mii_dev *miiphy_get_active_dev(const char *devname)
211{
212 /* If the current mii is the one we want, return it */
213 if (current_mii)
214 if (strcmp(current_mii->name, devname) == 0)
215 return current_mii;
216
217 /* Otherwise, set the active one to the one we want */
218 if (miiphy_set_current_dev(devname))
219 return NULL;
220 else
221 return current_mii;
222}
223
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200224/*****************************************************************************
225 *
226 * Read to variable <value> from the PHY attached to device <devname>,
227 * use PHY address <addr> and register <reg>.
228 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500229 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
230 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200231 * Returns:
232 * 0 on success
233 */
Wolfgang Denkf915c932011-12-07 08:35:14 +0100234int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500235 unsigned short *value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200236{
Andy Fleming5f184712011-04-08 02:10:27 -0500237 struct mii_dev *bus;
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000238 int ret;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200239
Andy Fleming5f184712011-04-08 02:10:27 -0500240 bus = miiphy_get_active_dev(devname);
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000241 if (!bus)
Andy Fleming5f184712011-04-08 02:10:27 -0500242 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200243
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000244 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
245 if (ret < 0)
246 return 1;
247
248 *value = (unsigned short)ret;
249 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200250}
251
252/*****************************************************************************
253 *
254 * Write <value> to the PHY attached to device <devname>,
255 * use PHY address <addr> and register <reg>.
256 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500257 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
258 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200259 * Returns:
260 * 0 on success
261 */
Wolfgang Denkf915c932011-12-07 08:35:14 +0100262int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500263 unsigned short value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200264{
Andy Fleming5f184712011-04-08 02:10:27 -0500265 struct mii_dev *bus;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200266
Andy Fleming5f184712011-04-08 02:10:27 -0500267 bus = miiphy_get_active_dev(devname);
268 if (bus)
269 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200270
Mike Frysinger0daac972010-07-27 18:35:09 -0400271 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200272}
273
274/*****************************************************************************
275 *
276 * Print out list of registered MII capable devices.
277 */
Andy Fleming16a53232011-04-07 14:38:35 -0500278void miiphy_listdev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200279{
280 struct list_head *entry;
281 struct mii_dev *dev;
282
Andy Fleming16a53232011-04-07 14:38:35 -0500283 puts("MII devices: ");
284 list_for_each(entry, &mii_devs) {
285 dev = list_entry(entry, struct mii_dev, link);
286 printf("'%s' ", dev->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200287 }
Andy Fleming16a53232011-04-07 14:38:35 -0500288 puts("\n");
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200289
290 if (current_mii)
Andy Fleming16a53232011-04-07 14:38:35 -0500291 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200292}
293
wdenkc6097192002-11-03 00:24:07 +0000294/*****************************************************************************
295 *
296 * Read the OUI, manufacture's model number, and revision number.
297 *
298 * OUI: 22 bits (unsigned int)
299 * Model: 6 bits (unsigned char)
300 * Revision: 4 bits (unsigned char)
301 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500302 * This API is deprecated.
303 *
wdenkc6097192002-11-03 00:24:07 +0000304 * Returns:
305 * 0 on success
306 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400307int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000308 unsigned char *model, unsigned char *rev)
309{
310 unsigned int reg = 0;
wdenk8bf3b002003-12-06 23:20:41 +0000311 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000312
Andy Fleming16a53232011-04-07 14:38:35 -0500313 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
314 debug("PHY ID register 2 read failed\n");
315 return -1;
wdenkc6097192002-11-03 00:24:07 +0000316 }
wdenk8bf3b002003-12-06 23:20:41 +0000317 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000318
Andy Fleming16a53232011-04-07 14:38:35 -0500319 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900320
wdenkc6097192002-11-03 00:24:07 +0000321 if (reg == 0xFFFF) {
322 /* No physical device present at this address */
Andy Fleming16a53232011-04-07 14:38:35 -0500323 return -1;
wdenkc6097192002-11-03 00:24:07 +0000324 }
325
Andy Fleming16a53232011-04-07 14:38:35 -0500326 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
327 debug("PHY ID register 1 read failed\n");
328 return -1;
wdenkc6097192002-11-03 00:24:07 +0000329 }
wdenk8bf3b002003-12-06 23:20:41 +0000330 reg |= tmp << 16;
Andy Fleming16a53232011-04-07 14:38:35 -0500331 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900332
Larry Johnson298035d2007-10-31 11:21:29 -0500333 *oui = (reg >> 10);
334 *model = (unsigned char)((reg >> 4) & 0x0000003F);
335 *rev = (unsigned char)(reg & 0x0000000F);
Andy Fleming16a53232011-04-07 14:38:35 -0500336 return 0;
wdenkc6097192002-11-03 00:24:07 +0000337}
338
Andy Fleming5f184712011-04-08 02:10:27 -0500339#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000340/*****************************************************************************
341 *
342 * Reset the PHY.
Andy Fleming1cdabc42011-10-31 09:46:13 -0500343 *
344 * This API is deprecated. Use PHYLIB.
345 *
wdenkc6097192002-11-03 00:24:07 +0000346 * Returns:
347 * 0 on success
348 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400349int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000350{
351 unsigned short reg;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100352 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000353
Andy Fleming16a53232011-04-07 14:38:35 -0500354 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
355 debug("PHY status read failed\n");
356 return -1;
Wolfgang Denkf89920c2005-08-12 23:15:53 +0200357 }
Andy Fleming16a53232011-04-07 14:38:35 -0500358 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
359 debug("PHY reset failed\n");
360 return -1;
wdenkc6097192002-11-03 00:24:07 +0000361 }
wdenk5653fc32004-02-08 22:55:38 +0000362#ifdef CONFIG_PHY_RESET_DELAY
Andy Fleming16a53232011-04-07 14:38:35 -0500363 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk5653fc32004-02-08 22:55:38 +0000364#endif
wdenkc6097192002-11-03 00:24:07 +0000365 /*
366 * Poll the control register for the reset bit to go to 0 (it is
367 * auto-clearing). This should happen within 0.5 seconds per the
368 * IEEE spec.
369 */
wdenkc6097192002-11-03 00:24:07 +0000370 reg = 0x8000;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100371 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500372 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100373 debug("PHY status read failed\n");
374 return -1;
wdenkc6097192002-11-03 00:24:07 +0000375 }
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100376 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000377 }
378 if ((reg & 0x8000) == 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500379 return 0;
wdenkc6097192002-11-03 00:24:07 +0000380 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500381 puts("PHY reset timed out\n");
382 return -1;
wdenkc6097192002-11-03 00:24:07 +0000383 }
Andy Fleming16a53232011-04-07 14:38:35 -0500384 return 0;
wdenkc6097192002-11-03 00:24:07 +0000385}
Andy Fleming5f184712011-04-08 02:10:27 -0500386#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000387
wdenkc6097192002-11-03 00:24:07 +0000388/*****************************************************************************
389 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500390 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000391 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400392int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000393{
Dongpo Li8c83c032016-08-22 21:03:29 +0800394 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000395
wdenk6fb6af62004-03-23 23:20:24 +0000396#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500397 u16 btsr;
398
399 /*
400 * Check for 1000BASE-X. If it is supported, then assume that the speed
401 * is 1000.
402 */
Andy Fleming16a53232011-04-07 14:38:35 -0500403 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500404 return _1000BASET;
Andy Fleming16a53232011-04-07 14:38:35 -0500405
Larry Johnson71bc6e62007-11-01 08:46:50 -0500406 /*
407 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
408 */
409 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500410 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
411 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500412 goto miiphy_read_failed;
413 }
414 if (btsr != 0xFFFF &&
Andy Fleming16a53232011-04-07 14:38:35 -0500415 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500416 return _1000BASET;
wdenk6fb6af62004-03-23 23:20:24 +0000417#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000418
wdenka56bd922004-06-06 23:13:55 +0000419 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500420 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
421 printf("PHY speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500422 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000423 }
wdenka56bd922004-06-06 23:13:55 +0000424 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500425 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000426 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500427 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
428 printf("PHY AN speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500429 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000430 }
Dongpo Li8c83c032016-08-22 21:03:29 +0800431
432 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
433 puts("PHY AN adv speed");
434 goto miiphy_read_failed;
435 }
436 return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000437 }
438 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500439 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000440
Michael Zaidman5f841952010-02-28 16:28:25 +0200441miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500442 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500443 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000444}
445
wdenkc6097192002-11-03 00:24:07 +0000446/*****************************************************************************
447 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500448 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000449 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400450int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000451{
Dongpo Li8c83c032016-08-22 21:03:29 +0800452 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000453
wdenk6fb6af62004-03-23 23:20:24 +0000454#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500455 u16 btsr;
456
457 /* Check for 1000BASE-X. */
Andy Fleming16a53232011-04-07 14:38:35 -0500458 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson71bc6e62007-11-01 08:46:50 -0500459 /* 1000BASE-X */
Andy Fleming16a53232011-04-07 14:38:35 -0500460 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
461 printf("1000BASE-X PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500462 goto miiphy_read_failed;
463 }
464 }
465 /*
466 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
467 */
468 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500469 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
470 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500471 goto miiphy_read_failed;
472 }
473 if (btsr != 0xFFFF) {
474 if (btsr & PHY_1000BTSR_1000FD) {
475 return FULL;
476 } else if (btsr & PHY_1000BTSR_1000HD) {
477 return HALF;
wdenk855a4962004-03-14 18:23:55 +0000478 }
479 }
wdenk6fb6af62004-03-23 23:20:24 +0000480#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000481
wdenka56bd922004-06-06 23:13:55 +0000482 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500483 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
484 puts("PHY duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500485 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000486 }
wdenka56bd922004-06-06 23:13:55 +0000487 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500488 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000489 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500490 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
491 puts("PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500492 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000493 }
Dongpo Li8c83c032016-08-22 21:03:29 +0800494
495 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
496 puts("PHY AN adv duplex");
497 goto miiphy_read_failed;
498 }
499 return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson71bc6e62007-11-01 08:46:50 -0500500 FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000501 }
502 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500503 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000504
Michael Zaidman5f841952010-02-28 16:28:25 +0200505miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500506 printf(" read failed, assuming half duplex\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500507 return HALF;
508}
509
510/*****************************************************************************
511 *
512 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
513 * 1000BASE-T, or on error.
514 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400515int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500516{
517#if defined(CONFIG_PHY_GIGE)
518 u16 exsr;
519
Andy Fleming16a53232011-04-07 14:38:35 -0500520 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
521 printf("PHY extended status read failed, assuming no "
Larry Johnson71bc6e62007-11-01 08:46:50 -0500522 "1000BASE-X\n");
523 return 0;
524 }
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500525 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson71bc6e62007-11-01 08:46:50 -0500526#else
527 return 0;
528#endif
wdenkc6097192002-11-03 00:24:07 +0000529}
530
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200531#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenkfc3e2162003-10-08 22:33:00 +0000532/*****************************************************************************
533 *
534 * Determine link status
535 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400536int miiphy_link(const char *devname, unsigned char addr)
wdenkfc3e2162003-10-08 22:33:00 +0000537{
538 unsigned short reg;
539
wdenka3d991b2004-04-15 21:48:45 +0000540 /* dummy read; needed to latch some phys */
Andy Fleming16a53232011-04-07 14:38:35 -0500541 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
542 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
543 puts("MII_BMSR read failed, assuming no link\n");
544 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000545 }
546
547 /* Determine if a link is active */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500548 if ((reg & BMSR_LSTATUS) != 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500549 return 1;
wdenkfc3e2162003-10-08 22:33:00 +0000550 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500551 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000552 }
553}
554#endif