blob: 9d45f547d15313d24645df1ebf1800f68c8eb344 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Vasut9e75ea42017-11-28 08:02:27 +01002/*
3 * Renesas RCar IIC driver
4 *
5 * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
6 *
7 * Based on
8 * Copyright (C) 2011, 2013 Renesas Solutions Corp.
9 * Copyright (C) 2011, 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Marek Vasut9e75ea42017-11-28 08:02:27 +010010 */
11
12#include <common.h>
13#include <clk.h>
14#include <dm.h>
15#include <i2c.h>
16#include <asm/io.h>
17
18struct rcar_iic_priv {
19 void __iomem *base;
20 struct clk clk;
21 u8 iccl;
22 u8 icch;
23};
24
25#define RCAR_IIC_ICDR 0x00
26#define RCAR_IIC_ICCR 0x04
27#define RCAR_IIC_ICSR 0x08
28#define RCAR_IIC_ICIC 0x0c
29#define RCAR_IIC_ICCL 0x10
30#define RCAR_IIC_ICCH 0x14
31
32/* ICCR */
33#define RCAR_IIC_ICCR_ICE BIT(7)
34#define RCAR_IIC_ICCR_RACK BIT(6)
35#define RCAR_IIC_ICCR_RTS BIT(4)
36#define RCAR_IIC_ICCR_BUSY BIT(2)
37#define RCAR_IIC_ICCR_SCP BIT(0)
38
39/* ICSR / ICIC */
40#define RCAR_IC_BUSY BIT(4)
41#define RCAR_IC_TACK BIT(2)
42#define RCAR_IC_DTE BIT(0)
43
44#define IRQ_WAIT 1000
45
46static void sh_irq_dte(struct udevice *dev)
47{
48 struct rcar_iic_priv *priv = dev_get_priv(dev);
49 int i;
50
51 for (i = 0; i < IRQ_WAIT; i++) {
52 if (RCAR_IC_DTE & readb(priv->base + RCAR_IIC_ICSR))
53 break;
54 udelay(10);
55 }
56}
57
58static int sh_irq_dte_with_tack(struct udevice *dev)
59{
60 struct rcar_iic_priv *priv = dev_get_priv(dev);
Marek Vasuteb546822019-03-07 03:41:08 +010061 u8 icsr;
Marek Vasut9e75ea42017-11-28 08:02:27 +010062 int i;
63
64 for (i = 0; i < IRQ_WAIT; i++) {
Marek Vasuteb546822019-03-07 03:41:08 +010065 icsr = readb(priv->base + RCAR_IIC_ICSR);
66 if (RCAR_IC_DTE & icsr)
Marek Vasut9e75ea42017-11-28 08:02:27 +010067 break;
Marek Vasuteb546822019-03-07 03:41:08 +010068 if (RCAR_IC_TACK & icsr)
Marek Vasut9e75ea42017-11-28 08:02:27 +010069 return -ETIMEDOUT;
70 udelay(10);
71 }
72 return 0;
73}
74
75static void sh_irq_busy(struct udevice *dev)
76{
77 struct rcar_iic_priv *priv = dev_get_priv(dev);
78 int i;
79
80 for (i = 0; i < IRQ_WAIT; i++) {
81 if (!(RCAR_IC_BUSY & readb(priv->base + RCAR_IIC_ICSR)))
82 break;
83 udelay(10);
84 }
85}
86
87static int rcar_iic_set_addr(struct udevice *dev, u8 chip, u8 read)
88{
89 struct rcar_iic_priv *priv = dev_get_priv(dev);
90
91 clrbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
92 setbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
93
94 writeb(priv->iccl, priv->base + RCAR_IIC_ICCL);
95 writeb(priv->icch, priv->base + RCAR_IIC_ICCH);
96 writeb(RCAR_IC_TACK, priv->base + RCAR_IIC_ICIC);
97
98 writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RTS | RCAR_IIC_ICCR_BUSY,
99 priv->base + RCAR_IIC_ICCR);
100 sh_irq_dte(dev);
101
102 clrbits_8(priv->base + RCAR_IIC_ICSR, RCAR_IC_TACK);
103 writeb(chip << 1 | read, priv->base + RCAR_IIC_ICDR);
104 return sh_irq_dte_with_tack(dev);
105}
106
107static void rcar_iic_finish(struct udevice *dev)
108{
109 struct rcar_iic_priv *priv = dev_get_priv(dev);
110
111 writeb(0, priv->base + RCAR_IIC_ICSR);
112 clrbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
113}
114
115static int rcar_iic_read_common(struct udevice *dev, struct i2c_msg *msg)
116{
117 struct rcar_iic_priv *priv = dev_get_priv(dev);
118 int i, ret = -EREMOTEIO;
119
120 if (rcar_iic_set_addr(dev, msg->addr, 1) != 0)
121 goto err;
122
123 udelay(10);
124
125 writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_SCP,
126 priv->base + RCAR_IIC_ICCR);
127
128 for (i = 0; i < msg->len; i++) {
129 if (sh_irq_dte_with_tack(dev) != 0)
130 goto err;
131
132 msg->buf[i] = readb(priv->base + RCAR_IIC_ICDR) & 0xff;
133
134 if (msg->len - 1 == i) {
135 writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RACK,
136 priv->base + RCAR_IIC_ICCR);
137 }
138 }
139
140 sh_irq_busy(dev);
141 ret = 0;
142
143err:
144 rcar_iic_finish(dev);
145 return ret;
146}
147
148static int rcar_iic_write_common(struct udevice *dev, struct i2c_msg *msg)
149{
150 struct rcar_iic_priv *priv = dev_get_priv(dev);
151 int i, ret = -EREMOTEIO;
152
153 if (rcar_iic_set_addr(dev, msg->addr, 0) != 0)
154 goto err;
155
156 udelay(10);
157
158 for (i = 0; i < msg->len; i++) {
159 writeb(msg->buf[i], priv->base + RCAR_IIC_ICDR);
160 if (sh_irq_dte_with_tack(dev) != 0)
161 goto err;
162 }
163
164 if (msg->flags & I2C_M_STOP) {
165 writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RTS,
166 priv->base + RCAR_IIC_ICCR);
167 if (sh_irq_dte_with_tack(dev) != 0)
168 goto err;
169 }
170
171 sh_irq_busy(dev);
172 ret = 0;
173
174err:
175 rcar_iic_finish(dev);
176 return ret;
177}
178
179static int rcar_iic_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
180{
181 int ret;
182
183 for (; nmsgs > 0; nmsgs--, msg++) {
184 if (msg->flags & I2C_M_RD)
185 ret = rcar_iic_read_common(dev, msg);
186 else
187 ret = rcar_iic_write_common(dev, msg);
188
189 if (ret)
190 return -EREMOTEIO;
191 }
192
193 return ret;
194}
195
196static int rcar_iic_set_speed(struct udevice *dev, uint speed)
197{
198 struct rcar_iic_priv *priv = dev_get_priv(dev);
199 const unsigned int ratio_high = 4;
200 const unsigned int ratio_low = 5;
201 int clkrate, denom;
202
203 clkrate = clk_get_rate(&priv->clk);
204 if (clkrate < 0)
205 return clkrate;
206
207 /*
208 * Calculate the value for ICCL and ICCH. From the data sheet:
209 * iccl = (p-clock / transfer-rate) * (L / (L + H))
210 * icch = (p clock / transfer rate) * (H / (L + H))
211 * where L and H are the SCL low and high ratio.
212 */
213 denom = speed * (ratio_high + ratio_low);
214 priv->iccl = DIV_ROUND_CLOSEST(clkrate * ratio_low, denom);
215 priv->icch = DIV_ROUND_CLOSEST(clkrate * ratio_high, denom);
216
217 return 0;
218}
219
220static int rcar_iic_probe_chip(struct udevice *dev, uint addr, uint flags)
221{
222 struct rcar_iic_priv *priv = dev_get_priv(dev);
223 int ret;
224
225 rcar_iic_set_addr(dev, addr, 1);
226 writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_SCP,
227 priv->base + RCAR_IIC_ICCR);
228 ret = sh_irq_dte_with_tack(dev);
229 rcar_iic_finish(dev);
230
231 return ret;
232}
233
234static int rcar_iic_probe(struct udevice *dev)
235{
236 struct rcar_iic_priv *priv = dev_get_priv(dev);
237 int ret;
238
239 priv->base = dev_read_addr_ptr(dev);
240
241 ret = clk_get_by_index(dev, 0, &priv->clk);
242 if (ret)
243 return ret;
244
245 ret = clk_enable(&priv->clk);
246 if (ret)
247 return ret;
248
249 rcar_iic_finish(dev);
250
251 return rcar_iic_set_speed(dev, 100000);
252}
253
254static const struct dm_i2c_ops rcar_iic_ops = {
255 .xfer = rcar_iic_xfer,
256 .probe_chip = rcar_iic_probe_chip,
257 .set_bus_speed = rcar_iic_set_speed,
258};
259
260static const struct udevice_id rcar_iic_ids[] = {
261 { .compatible = "renesas,rmobile-iic" },
262 { }
263};
264
265U_BOOT_DRIVER(iic_rcar) = {
266 .name = "iic_rcar",
267 .id = UCLASS_I2C,
268 .of_match = rcar_iic_ids,
269 .probe = rcar_iic_probe,
270 .priv_auto_alloc_size = sizeof(struct rcar_iic_priv),
271 .ops = &rcar_iic_ops,
272};