Blame - arch/arm/mach-mvebu/Kconfig - platform/external/u-boot

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Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	1	if ARCH_MVEBU
				2
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	3	config HAVE_MVEBU_EFUSE
				4	bool
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	5
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	6	config ARMADA_32BIT
				7	bool
Michal Simek	58008cb	2018-07-23 15:55:15 +0200	[diff] [blame]	8	select BOARD_EARLY_INIT_F
Lokesh Vutla	acf1500	2018-04-26 18:21:26 +0530	[diff] [blame]	9	select CPU_V7A
Stefan Roese	237b629	2019-04-11 08:58:32 +0200	[diff] [blame]	10	select SPL_DM if SPL
				11	select SPL_DM_SEQ_ALIAS if SPL
				12	select SPL_OF_CONTROL if SPL
Tom Rini	7609e02	2021-10-15 10:54:41 -0400	[diff] [blame]	13	select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese	237b629	2019-04-11 08:58:32 +0200	[diff] [blame]	14	select SPL_SIMPLE_BUS if SPL
Michal Simek	58008cb	2018-07-23 15:55:15 +0200	[diff] [blame]	15	select SUPPORT_SPL
Philip Oberfichtner	1116888	2022-08-17 15:07:12 +0200	[diff] [blame]	16	select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roese	f2100f6	2019-04-12 16:42:28 +0200	[diff] [blame]	17	select TRANSLATION_OFFSET
Pali Rohár	2975bba	2022-04-06 16:20:20 +0200	[diff] [blame]	18	select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Rohár	5bb2c55	2022-05-06 11:05:14 +0200	[diff] [blame]	19	select ARCH_VERY_EARLY_INIT
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	20
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	21	# ARMv7 SoCs...
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	22	config ARMADA_375
				23	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	24	select ARMADA_32BIT
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	25
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	26	config ARMADA_38X
				27	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	28	select ARMADA_32BIT
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	29	select HAVE_MVEBU_EFUSE
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	30
Joshua Scott	28f0cbc	2020-11-09 10:14:08 +1300	[diff] [blame]	31	config ARMADA_38X_HS_IMPEDANCE_THRESH
				32	hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
				33	depends on ARMADA_38X
				34	default 0x6
				35	range 0x0 0x7
				36
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	37	config ARMADA_XP
				38	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	39	select ARMADA_32BIT
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	40
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	41	# ARMv8 SoCs...
				42	config ARMADA_3700
				43	bool
				44	select ARM64
Pali Rohár	10154b8	2022-02-23 14:15:45 +0100	[diff] [blame]	45	select HAVE_MVEBU_EFUSE
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	46
Stefan Roese	21b29fc	2016-05-25 08:13:45 +0200	[diff] [blame]	47	# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
				48	config ARMADA_8K
				49	bool
				50	select ARM64
				51
Chris Packham	7d7bb99	2022-11-05 17:23:59 +1300	[diff] [blame]	52	config ALLEYCAT_5
				53	bool
				54	select ARM64
				55
Chris Packham	a53d97a	2016-10-26 14:08:30 +1300	[diff] [blame]	56	# Armada PLL frequency (used for NAND clock generation)
				57	config SYS_MVEBU_PLL_CLOCK
				58	int
Chris Packham	0d0df46	2019-04-11 22:22:50 +1200	[diff] [blame]	59	default "2000000000" if ARMADA_XP \|\| ARMADA_3700 \|\| ARMADA_8K \|\| ARMADA_MSYS
Chris Packham	a53d97a	2016-10-26 14:08:30 +1300	[diff] [blame]	60	default "1000000000" if ARMADA_38X \|\| ARMADA_375
				61
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	62	# Armada XP/38x SoC types...
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	63	config MV78230
				64	bool
				65	select ARMADA_XP
				66
				67	config MV78260
				68	bool
				69	select ARMADA_XP
Simon Glass	3bf926c	2017-06-14 21:28:24 -0600	[diff] [blame]	70	imply CMD_SATA
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	71
				72	config MV78460
				73	bool
				74	select ARMADA_XP
				75
Chris Packham	0d0df46	2019-04-11 22:22:50 +1200	[diff] [blame]	76	config ARMADA_MSYS
				77	bool
				78	select ARMADA_32BIT
				79
				80	config 98DX4251
				81	bool
				82	select ARMADA_MSYS
				83
				84	config 98DX3336
				85	bool
				86	select ARMADA_MSYS
				87
				88	config 98DX3236
				89	bool
				90	select ARMADA_MSYS
				91
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	92	config 88F6820
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	93	bool
				94	select ARMADA_38X
				95
Tom Rini	53dbf11	2022-03-30 18:07:24 -0400	[diff] [blame]	96	config CUSTOMER_BOARD_SUPPORT
				97	bool
				98
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	99	config DDR4
				100	bool "Support Marvell DDR4 Training driver"
				101
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	102	choice
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	103	prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select"
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	104	optional
				105
Stefan Roese	0299c90	2015-10-20 15:14:47 +0200	[diff] [blame]	106	config TARGET_CLEARFOG
				107	bool "Support ClearFog"
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	108	select 88F6820
Baruch Siach	867572f	2020-01-20 14:20:13 +0200	[diff] [blame]	109	select BOARD_LATE_INIT
Stefan Roese	0299c90	2015-10-20 15:14:47 +0200	[diff] [blame]	110
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	111	config TARGET_HELIOS4
				112	bool "Support Helios4"
				113	select 88F6820
				114
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	115	config TARGET_MVEBU_ARMADA_37XX
				116	bool "Support Armada 37xx platforms"
Stefan Roese	01e62c7	2016-05-17 15:04:16 +0200	[diff] [blame]	117	select ARMADA_3700
Simon Glass	fedb428	2017-06-14 21:28:21 -0600	[diff] [blame]	118	imply SCSI
Stefan Roese	01e62c7	2016-05-17 15:04:16 +0200	[diff] [blame]	119
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	120	config TARGET_DB_88F6720
				121	bool "Support DB-88F6720 Armada 375"
				122	select ARMADA_375
				123
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	124	config TARGET_DB_88F6820_GP
				125	bool "Support DB-88F6820-GP"
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	126	select 88F6820
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	127
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	128	config TARGET_DB_88F6820_AMC
				129	bool "Support DB-88F6820-AMC"
				130	select 88F6820
				131
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	132	config TARGET_TURRIS_OMNIA
				133	bool "Support Turris Omnia"
				134	select 88F6820
Marek Behún	539f024	2019-05-02 16:53:37 +0200	[diff] [blame]	135	select BOARD_LATE_INIT
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	136	select DM_I2C
				137	select I2C_MUX
				138	select I2C_MUX_PCA954x
Marek Behún	6d7bfb6	2021-10-09 19:33:46 +0200	[diff] [blame]	139	select SPL_DRIVERS_MISC
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	140	select SPL_I2C_MUX
Marek Behún	2c8a4e4	2021-10-09 19:33:45 +0200	[diff] [blame]	141	select SPL_SYS_MALLOC_SIMPLE
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	142	select SYS_I2C_MVTWSI
Marek Behún	6b26f3e	2019-05-02 16:53:32 +0200	[diff] [blame]	143	select ATSHA204A
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	144
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	145	config TARGET_TURRIS_MOX
				146	bool "Support Turris Mox"
				147	select ARMADA_3700
				148
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	149	config TARGET_MVEBU_ARMADA_8K
				150	bool "Support Armada 7k/8k platforms"
Stefan Roese	6f8c2d4	2016-05-25 08:21:21 +0200	[diff] [blame]	151	select ARMADA_8K
Tom Rini	e5ec481	2017-01-22 19:43:11 -0500	[diff] [blame]	152	select BOARD_LATE_INIT
Simon Glass	fedb428	2017-06-14 21:28:21 -0600	[diff] [blame]	153	imply SCSI
Stefan Roese	6f8c2d4	2016-05-25 08:21:21 +0200	[diff] [blame]	154
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	155	config TARGET_MVEBU_ALLEYCAT5
				156	bool "Support AlleyCat 5 platforms"
				157	select ALLEYCAT_5
				158
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	159	config TARGET_OCTEONTX2_CN913x
				160	bool "Support CN913x platforms"
				161	select ARMADA_8K
				162	imply BOARD_EARLY_INIT_R
				163	select BOARD_LATE_INIT
				164	imply SCSI
				165
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	166	config TARGET_DB_MV784MP_GP
				167	bool "Support db-mv784mp-gp"
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	168	select BOARD_ECC_SUPPORT
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	169	select MV78460
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	170
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	171	config TARGET_DS116
				172	bool "Support Synology DS116"
				173	select 88F6820
				174
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	175	config TARGET_DS414
				176	bool "Support Synology DS414"
				177	select MV78230
				178
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	179	config TARGET_MAXBCM
				180	bool "Support maxbcm"
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	181	select BOARD_ECC_SUPPORT
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	182	select MV78460
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	183
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	184	config TARGET_N2350
				185	bool "Support Thecus N2350"
				186	select 88F6820
				187	select DDR4
				188
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	189	config TARGET_THEADORABLE
				190	bool "Support theadorable Armada XP"
Tom Rini	e5ec481	2017-01-22 19:43:11 -0500	[diff] [blame]	191	select BOARD_LATE_INIT if USB
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	192	select MV78260
Simon Glass	3bf926c	2017-06-14 21:28:24 -0600	[diff] [blame]	193	imply CMD_SATA
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	194
Dirk Eibach	6008326	2017-02-22 16:07:23 +0100	[diff] [blame]	195	config TARGET_CONTROLCENTERDC
				196	bool "Support CONTROLCENTERDC"
				197	select 88F6820
Tom Rini	53dbf11	2022-03-30 18:07:24 -0400	[diff] [blame]	198	select CUSTOMER_BOARD_SUPPORT
Dirk Eibach	6008326	2017-02-22 16:07:23 +0100	[diff] [blame]	199
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	200	config TARGET_X530
				201	bool "Support Allied Telesis x530"
				202	select 88F6820
				203
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	204	config TARGET_DB_XC3_24G4XG
				205	bool "Support DB-XC3-24G4XG"
				206	select 98DX3336
				207
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	208	config TARGET_CRS3XX_98DX3236
				209	bool "Support CRS3XX-98DX3236"
Luka Kovacic	22bb913	2019-05-07 19:35:55 +0200	[diff] [blame]	210	select 98DX3236
				211
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	212	endchoice
				213
Tom Rini	5b527c5	2021-08-21 13:50:13 -0400	[diff] [blame]	214	choice
				215	prompt "DDR bus width"
				216	default DDR_64BIT
				217	depends on ARMADA_XP
				218
				219	config DDR_64BIT
				220	bool "64bit bus width"
				221
				222	config DDR_32BIT
				223	bool "32bit bus width"
				224
				225	endchoice
				226
Tom Rini	f66a3fd	2021-08-21 13:50:15 -0400	[diff] [blame]	227	config DDR_LOG_LEVEL
				228	int "DDR training code log level"
				229	depends on ARMADA_XP
				230	default 0
				231	range 0 3
				232	help
				233	Amount of information provided on error while running the DDR
				234	training code. At level 0, provides an error code in a case of
				235	failure, RL, WL errors and other algorithm failure. At level 1,
				236	provides the D-Unit setup (SPD/Static configuration). At level 2,
				237	provides the windows margin as a results of DQS centeralization.
				238	At level 3, rovides the windows margin of each DQ as a results of
				239	DQS centeralization.
				240
Marek Behún	871ee66	2022-02-17 13:54:42 +0100	[diff] [blame]	241	config DDR_RESET_ON_TRAINING_FAILURE
				242	bool "Reset the board on DDR training failure instead of hanging"
				243	depends on ARMADA_38X \|\| ARMADA_XP
				244	help
				245	If DDR training fails in SPL, reset the board instead of hanging.
				246	Some boards are known to fail DDR training occasionally and an
				247	immediate reset may be preferable to waiting until the board is
				248	reset by watchdog (if there even is one).
				249
				250	Note that if booting via UART and the DDR training fails, the
				251	device will still hang - it doesn't make sense to reset the board
				252	in such a case.
				253
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	254	config BOARD_ECC_SUPPORT
				255	bool
				256
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	257	config SYS_BOARD
				258	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	259	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	260	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	261	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	262	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	263	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	264	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	265	default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	266	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	267	default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	268	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	269	default "ds116" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	270	default "ds414" if TARGET_DS414
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	271	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	272	default "n2350" if TARGET_N2350
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	273	default "theadorable" if TARGET_THEADORABLE
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	274	default "a38x" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	275	default "x530" if TARGET_X530
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	276	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	277	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	278	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	279
				280	config SYS_CONFIG_NAME
				281	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	282	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	283	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	284	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	285	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	286	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	287	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	288	default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	289	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	290	default "ds116" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	291	default "ds414" if TARGET_DS414
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	292	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	293	default "n2350" if TARGET_N2350
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	294	default "theadorable" if TARGET_THEADORABLE
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	295	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	296	default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	297	default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	298	default "x530" if TARGET_X530
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	299	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	300	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	301	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	302
				303	config SYS_VENDOR
				304	default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	305	default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	306	default "Marvell" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	307	default "Marvell" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	308	default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	309	default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	310	default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	311	default "Marvell" if TARGET_DB_XC3_24G4XG
				312	default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	313	default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	314	default "kobol" if TARGET_HELIOS4
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	315	default "Synology" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	316	default "Synology" if TARGET_DS414
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	317	default "thecus" if TARGET_N2350
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	318	default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	319	default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	320	default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	321	default "alliedtelesis" if TARGET_X530
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	322	default "mikrotik" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	323	default "Marvell" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	324
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	325	config SYS_SOC
				326	default "mvebu"
				327
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	328	choice
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	329	prompt "Boot method"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	330	depends on SPL
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	331
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	332	config MVEBU_SPL_BOOT_DEVICE_SPI
Pali Rohár	41d52f3	2023-01-10 23:13:01 +0100	[diff] [blame]	333	bool "NOR flash (SPI or parallel)"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	334	imply ENV_IS_IN_SPI_FLASH
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	335	imply SPL_DM_SPI
				336	imply SPL_SPI_FLASH_SUPPORT
				337	imply SPL_SPI_LOAD
Simon Glass	ea2ca7e	2021-08-08 12:20:14 -0600	[diff] [blame]	338	imply SPL_SPI
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	339	select SPL_BOOTROM_SUPPORT
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	340
Pali Rohár	67bd615	2023-01-10 22:55:21 +0100	[diff] [blame]	341	config MVEBU_SPL_BOOT_DEVICE_NAND
				342	bool "NAND flash (SPI or parallel)"
				343	select MTD_RAW_NAND
				344	select SPL_BOOTROM_SUPPORT
				345
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	346	config MVEBU_SPL_BOOT_DEVICE_MMC
Pali Rohár	41d52f3	2023-01-10 23:13:01 +0100	[diff] [blame]	347	bool "eMMC or SD card"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	348	imply ENV_IS_IN_MMC
				349	# GPIO needed for eMMC/SD card presence detection
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	350	imply SPL_DM_GPIO
				351	imply SPL_DM_MMC
				352	imply SPL_GPIO
				353	imply SPL_LIBDISK_SUPPORT
Simon Glass	103c5f1	2021-08-08 12:20:09 -0600	[diff] [blame]	354	imply SPL_MMC
Pali Rohár	2f27db2	2023-01-08 13:31:41 +0100	[diff] [blame]	355	select SUPPORT_EMMC_BOOT if SPL_MMC
Pali Rohár	913d756	2023-01-09 00:52:09 +0100	[diff] [blame]	356	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	357	select SPL_BOOTROM_SUPPORT
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	358
Baruch Siach	22c6545	2019-05-16 13:03:58 +0300	[diff] [blame]	359	config MVEBU_SPL_BOOT_DEVICE_SATA
				360	bool "SATA"
Simon Glass	f756037	2021-08-08 12:20:17 -0600	[diff] [blame]	361	imply SPL_SATA
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	362	imply SPL_LIBDISK_SUPPORT
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	363	select SPL_BOOTROM_SUPPORT
Baruch Siach	22c6545	2019-05-16 13:03:58 +0300	[diff] [blame]	364
Pali Rohár	50afad5	2023-01-10 23:09:15 +0100	[diff] [blame]	365	config MVEBU_SPL_BOOT_DEVICE_PEX
				366	bool "PCI Express"
				367	select SPL_BOOTROM_SUPPORT
				368
Baruch Siach	72c4e67	2018-06-18 21:56:26 +0300	[diff] [blame]	369	config MVEBU_SPL_BOOT_DEVICE_UART
				370	bool "UART"
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	371	select SPL_BOOTROM_SUPPORT
Baruch Siach	72c4e67	2018-06-18 21:56:26 +0300	[diff] [blame]	372
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	373	endchoice
				374
Pali Rohár	67bd615	2023-01-10 22:55:21 +0100	[diff] [blame]	375	config MVEBU_SPL_NAND_BADBLK_LOCATION
				376	hex "NAND Bad block indicator location"
				377	depends on MVEBU_SPL_BOOT_DEVICE_NAND
				378	range 0x0 0x1
				379	help
				380	Value 0x0 = SLC flash = BBI at page 0 or page 1
				381	Value 0x1 = MLC flash = BBI at last page in the block
				382
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	383	config MVEBU_EFUSE
				384	bool "Enable eFuse support"
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	385	depends on HAVE_MVEBU_EFUSE
				386	help
				387	Enable support for reading and writing eFuses on mvebu SoCs.
				388
				389	config MVEBU_EFUSE_FAKE
				390	bool "Fake eFuse access (dry run)"
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	391	depends on MVEBU_EFUSE
				392	help
				393	This enables a "dry run" mode where eFuses are not really programmed.
				394	Instead the eFuse accesses are emulated by writing to and reading
				395	from a memory block.
				396	This is can be used for testing prog scripts.
				397
Pali Rohár	8092d1d	2022-09-22 13:43:45 +0200	[diff] [blame]	398	config MVEBU_EFUSE_VHV_GPIO
				399	string "VHV_Enable GPIO name for eFuse programming"
				400	depends on MVEBU_EFUSE && !ARMADA_3700
				401	help
				402	The eFuse programing (burning) phase requires supplying 1.8V to the
				403	device on the VHV power pin, while for normal operation the VHV power
				404	rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
				405	document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
				406	.
				407	This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
				408
				409	config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
				410	bool "VHV_Enable GPIO is Active Low"
				411	depends on MVEBU_EFUSE_VHV_GPIO != ""
				412
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	413	config SECURED_MODE_IMAGE
				414	bool "Build image for trusted boot"
				415	default false
				416	depends on 88F6820
				417	help
				418	Build an image that employs the ARMADA SoC's trusted boot framework
				419	for securely booting images.
				420
				421	config SECURED_MODE_CSK_INDEX
				422	int "Index of active CSK"
				423	default 0
				424	depends on SECURED_MODE_IMAGE
				425
Tony Dinh	21f6227	2023-03-02 19:27:29 -0800	[diff] [blame]	426	config SF_DEFAULT_SPEED
				427	int "Default speed for SPI flash in Hz"
				428	default 10000000
				429	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				430
				431	config SF_DEFAULT_MODE
				432	hex "Default mode for SPI flash"
				433	default 0x0
				434	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				435
Joel Johnson	9f205d6	2020-03-23 14:21:32 -0600	[diff] [blame]	436	source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore	5a3db5d	2020-12-08 21:07:36 -0600	[diff] [blame]	437	source "board/kobol/helios4/Kconfig"
Joel Johnson	9f205d6	2020-03-23 14:21:32 -0600	[diff] [blame]	438
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	439	endif