blob: c739d665f66264680dc47cdd6eff7211bf7e7365 [file] [log] [blame]
Manivannan Sadhasivameba65892018-06-14 23:38:32 +05301/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Board configuration file for Bubblegum-96
4 *
5 * Copyright (C) 2015 Actions Semi Co., Ltd.
6 * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
7 *
8 */
9
10#ifndef _BUBBLEGUM_96_H_
11#define _BUGGLEGUM_96_H_
12
13/* SDRAM Definitions */
14#define CONFIG_SYS_SDRAM_BASE 0x0
Manivannan Sadhasivameba65892018-06-14 23:38:32 +053015#define CONFIG_SYS_SDRAM_SIZE 0x80000000
16
17/* Generic Timer Definitions */
18#define COUNTER_FREQUENCY (24000000) /* 24MHz */
19
20#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
21
22/* Some commands use this as the default load address */
23#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7ffc0)
24
25/*
26 * This is the initial SP which is used only briefly for relocating the u-boot
27 * image to the top of SDRAM. After relocation u-boot moves the stack to the
28 * proper place.
29 */
30#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00)
31
32/* UART Definitions */
33#define CONFIG_BAUDRATE 115200
34
Manivannan Sadhasivameba65892018-06-14 23:38:32 +053035/* Console configuration */
36#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */
37#define CONFIG_SYS_MAXARGS 64
38#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
39
40#endif