blob: 82452e2c4811108b43ee94e99c1db4b1546b42c2 [file] [log] [blame]
wdenka562e1b2005-01-09 18:21:42 +00001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
26#define PHYS_FLASH_1 CFG_FLASH_BASE
27#define FLASH_BANK_SIZE 0x200000
28
29flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
30
31void flash_print_info (flash_info_t * info)
32{
33 int i;
34
35 switch (info->flash_id & FLASH_VENDMASK) {
36 case (AMD_MANUFACT & FLASH_VENDMASK):
37 printf ("AMD: ");
38 break;
39 default:
40 printf ("Unknown Vendor ");
41 break;
42 }
43
44 switch (info->flash_id & FLASH_TYPEMASK) {
45 case (AMD_ID_PL160CB & FLASH_TYPEMASK):
46 printf ("AM29PL160CB (16Mbit)\n");
47 break;
48 default:
49 printf ("Unknown Chip Type\n");
50 goto Done;
51 break;
52 }
53
54 printf (" Size: %ld MB in %d Sectors\n",
55 info->size >> 20, info->sector_count);
56
57 printf (" Sector Start Addresses:");
58 for (i = 0; i < info->sector_count; i++) {
59 if ((i % 5) == 0) {
60 printf ("\n ");
61 }
62 printf (" %08lX%s", info->start[i],
63 info->protect[i] ? " (RO)" : " ");
64 }
65 printf ("\n");
66
67Done:
Marian Balakowicz483a0cf2006-05-09 11:28:36 +020068 return;
wdenka562e1b2005-01-09 18:21:42 +000069}
70
71
72unsigned long flash_init (void)
73{
74 int i, j;
75 ulong size = 0;
76
77 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
78 ulong flashbase = 0;
79
80 flash_info[i].flash_id =
81 (AMD_MANUFACT & FLASH_VENDMASK) |
82 (AMD_ID_PL160CB & FLASH_TYPEMASK);
83 flash_info[i].size = FLASH_BANK_SIZE;
84 flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
85 memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
86 if (i == 0)
87 flashbase = PHYS_FLASH_1;
88 else
89 panic ("configured to many flash banks!\n");
90
91 for (j = 0; j < flash_info[i].sector_count; j++) {
92 if (j == 0) {
93 /* 1st is 16 KiB */
94 flash_info[i].start[j] = flashbase;
95 }
96 if ((j >= 1) && (j <= 2)) {
97 /* 2nd and 3rd are 8 KiB */
98 flash_info[i].start[j] =
99 flashbase + 0x4000 + 0x2000 * (j - 1);
100 }
101 if (j == 3) {
102 /* 4th is 224 KiB */
103 flash_info[i].start[j] = flashbase + 0x8000;
104 }
105 if ((j >= 4) && (j <= 10)) {
106 /* rest is 256 KiB */
107 flash_info[i].start[j] =
108 flashbase + 0x40000 + 0x40000 * (j -
109 4);
110 }
111 }
112 size += flash_info[i].size;
113 }
114
115 flash_protect (FLAG_PROTECT_SET,
116 CFG_FLASH_BASE,
117 CFG_FLASH_BASE + 0x3ffff, &flash_info[0]);
118
119 return size;
120}
121
122
123#define CMD_READ_ARRAY 0x00F0
124#define CMD_UNLOCK1 0x00AA
125#define CMD_UNLOCK2 0x0055
126#define CMD_ERASE_SETUP 0x0080
127#define CMD_ERASE_CONFIRM 0x0030
128#define CMD_PROGRAM 0x00A0
129#define CMD_UNLOCK_BYPASS 0x0020
130
131#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555<<1)))
132#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA<<1)))
133
134#define BIT_ERASE_DONE 0x0080
135#define BIT_RDY_MASK 0x0080
136#define BIT_PROGRAM_ERROR 0x0020
137#define BIT_TIMEOUT 0x80000000 /* our flag */
138
139#define READY 1
140#define ERR 2
141#define TMO 4
142
143
144int flash_erase (flash_info_t * info, int s_first, int s_last)
145{
146 ulong result;
147 int iflag, cflag, prot, sect;
148 int rc = ERR_OK;
149 int chip1;
150
151 /* first look for protection bits */
152
153 if (info->flash_id == FLASH_UNKNOWN)
154 return ERR_UNKNOWN_FLASH_TYPE;
155
156 if ((s_first < 0) || (s_first > s_last)) {
157 return ERR_INVAL;
158 }
159
160 if ((info->flash_id & FLASH_VENDMASK) !=
161 (AMD_MANUFACT & FLASH_VENDMASK)) {
162 return ERR_UNKNOWN_FLASH_VENDOR;
163 }
164
165 prot = 0;
166 for (sect = s_first; sect <= s_last; ++sect) {
167 if (info->protect[sect]) {
168 prot++;
169 }
170 }
171 if (prot)
172 return ERR_PROTECTED;
173
174 /*
175 * Disable interrupts which might cause a timeout
176 * here. Remember that our exception vectors are
177 * at address 0 in the flash, and we don't want a
178 * (ticker) exception to happen while the flash
179 * chip is in programming mode.
180 */
181
182 cflag = icache_status ();
183 icache_disable ();
184 iflag = disable_interrupts ();
185
186 printf ("\n");
187
188 /* Start erase on unprotected sectors */
189 for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
190 printf ("Erasing sector %2d ... ", sect);
191
192 /* arm simple, non interrupt dependent timer */
193 set_timer (0);
194
195 if (info->protect[sect] == 0) { /* not protected */
196 volatile u16 *addr =
197 (volatile u16 *) (info->start[sect]);
198
199 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
200 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
201 MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
202
203 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
204 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
205 *addr = CMD_ERASE_CONFIRM;
206
207 /* wait until flash is ready */
208 chip1 = 0;
209
210 do {
211 result = *addr;
212
213 /* check timeout */
214 if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
215 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
216 chip1 = TMO;
217 break;
218 }
219
220 if (!chip1
221 && (result & 0xFFFF) & BIT_ERASE_DONE)
222 chip1 = READY;
223
224 } while (!chip1);
225
226 MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
227
228 if (chip1 == ERR) {
229 rc = ERR_PROG_ERROR;
230 goto outahere;
231 }
232 if (chip1 == TMO) {
233 rc = ERR_TIMOUT;
234 goto outahere;
235 }
236
237 printf ("ok.\n");
238 } else { /* it was protected */
239
240 printf ("protected!\n");
241 }
242 }
243
244 if (ctrlc ())
245 printf ("User Interrupt!\n");
246
247 outahere:
248 /* allow flash to settle - wait 10 ms */
249 udelay (10000);
250
251 if (iflag)
252 enable_interrupts ();
253
254 if (cflag)
255 icache_enable ();
256
257 return rc;
258}
259
Wolfgang Denk8de7ed32006-03-11 22:56:07 +0100260static int write_word (flash_info_t * info, ulong dest, ulong data)
wdenka562e1b2005-01-09 18:21:42 +0000261{
262 volatile u16 *addr = (volatile u16 *) dest;
263 ulong result;
264 int rc = ERR_OK;
265 int cflag, iflag;
266 int chip1;
267
268 /*
269 * Check if Flash is (sufficiently) erased
270 */
271 result = *addr;
272 if ((result & data) != data)
273 return ERR_NOT_ERASED;
274
275
276 /*
277 * Disable interrupts which might cause a timeout
278 * here. Remember that our exception vectors are
279 * at address 0 in the flash, and we don't want a
280 * (ticker) exception to happen while the flash
281 * chip is in programming mode.
282 */
283
284 cflag = icache_status ();
285 icache_disable ();
286 iflag = disable_interrupts ();
287
288 MEM_FLASH_ADDR1 = CMD_UNLOCK1;
289 MEM_FLASH_ADDR2 = CMD_UNLOCK2;
290 MEM_FLASH_ADDR1 = CMD_PROGRAM;
291 *addr = data;
292
293 /* arm simple, non interrupt dependent timer */
294 set_timer (0);
295
296 /* wait until flash is ready */
297 chip1 = 0;
298 do {
299 result = *addr;
300
301 /* check timeout */
302 if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
303 chip1 = ERR | TMO;
304 break;
305 }
306 if (!chip1 && ((result & 0x80) == (data & 0x80)))
307 chip1 = READY;
308
309 } while (!chip1);
310
311 *addr = CMD_READ_ARRAY;
312
313 if (chip1 == ERR || *addr != data)
314 rc = ERR_PROG_ERROR;
315
316 if (iflag)
317 enable_interrupts ();
318
319 if (cflag)
320 icache_enable ();
321
322 return rc;
323}
324
325
326int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
327{
328 ulong wp, data;
329 int rc;
330
331 if (addr & 1) {
332 printf ("unaligned destination not supported\n");
333 return ERR_ALIGN;
334 }
335
336#if 0
337 if (cnt & 1) {
338 printf ("odd transfer sizes not supported\n");
339 return ERR_ALIGN;
340 }
341#endif
342
343 wp = addr;
344
345 if (addr & 1) {
346 data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
347 src);
348 if ((rc = write_word (info, wp - 1, data)) != 0) {
349 return (rc);
350 }
351 src += 1;
352 wp += 1;
353 cnt -= 1;
354 }
355
356 while (cnt >= 2) {
357 data = *((volatile u16 *) src);
358 if ((rc = write_word (info, wp, data)) != 0) {
359 return (rc);
360 }
361 src += 2;
362 wp += 2;
363 cnt -= 2;
364 }
365
366 if (cnt == 1) {
367 data = (*((volatile u8 *) src) << 8) |
368 *((volatile u8 *) (wp + 1));
369 if ((rc = write_word (info, wp, data)) != 0) {
370 return (rc);
371 }
372 src += 1;
373 wp += 1;
374 cnt -= 1;
375 }
376
377 return ERR_OK;
378}