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Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +09001/*
2 * R8A66597 HCD (Host Controller Driver) for u-boot
3 *
4 * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
5 *
Simon Glasse62b5262015-07-06 16:47:42 -06006 * SPDX-License-Identifier: GPL-2.0
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +09007 */
8
9#include <common.h>
Simon Glass24b852a2015-11-08 23:47:45 -070010#include <console.h>
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090011#include <usb.h>
12#include <asm/io.h>
Chris Brandt243fd642017-11-29 14:49:21 -050013#include <linux/iopoll.h>
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090014
15#include "r8a66597.h"
16
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090017#ifdef R8A66597_DEBUG
18#define R8A66597_DPRINT printf
19#else
20#define R8A66597_DPRINT(...)
21#endif
22
23static const char hcd_name[] = "r8a66597_hcd";
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090024static struct r8a66597 gr8a66597;
25
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +090026static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport)
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090027{
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +090028 int i;
29
30 *hub_devnum = 0;
31 *hubport = 0;
32
33 /* check a device connected to root_hub */
34 if ((dev->parent && dev->parent->devnum == 1) ||
35 (dev->devnum == 1))
36 return;
37
38 for (i = 0; i < USB_MAXCHILDREN; i++) {
39 if (dev->parent->children[i] == dev) {
40 *hub_devnum = (u8)dev->parent->devnum;
41 *hubport = i;
42 return;
43 }
44 }
45
46 printf("get_hub_data error.\n");
47}
48
49static void set_devadd(struct r8a66597 *r8a66597, u8 r8a66597_address,
50 struct usb_device *dev, int port)
51{
52 u16 val, usbspd, upphub, hubport;
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090053 unsigned long devadd_reg = get_devadd_addr(r8a66597_address);
54
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +090055 get_hub_data(dev, &upphub, &hubport);
56 usbspd = r8a66597->speed;
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090057 val = (upphub << 11) | (hubport << 8) | (usbspd << 6) | (port & 0x0001);
58 r8a66597_write(r8a66597, val, devadd_reg);
59}
60
61static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
62{
63 u16 tmp;
64 int i = 0;
65
66#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
67 do {
68 r8a66597_write(r8a66597, SCKE, SYSCFG0);
69 tmp = r8a66597_read(r8a66597, SYSCFG0);
70 if (i++ > 1000) {
71 printf("register access fail.\n");
72 return -1;
73 }
74 } while ((tmp & SCKE) != SCKE);
75 r8a66597_write(r8a66597, 0x04, 0x02);
76#else
77 do {
78 r8a66597_write(r8a66597, USBE, SYSCFG0);
79 tmp = r8a66597_read(r8a66597, SYSCFG0);
80 if (i++ > 1000) {
81 printf("register access fail.\n");
82 return -1;
83 }
84 } while ((tmp & USBE) != USBE);
85 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
Chris Brandt11f46782017-11-27 14:04:10 -050086#if !defined(CONFIG_RZA_USB)
Nobuhiro Iwamatsu9d034202012-03-20 20:23:29 +000087 r8a66597_mdfy(r8a66597, CONFIG_R8A66597_XTAL, XTAL, SYSCFG0);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090088
89 i = 0;
90 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
91 do {
92 udelay(1000);
93 tmp = r8a66597_read(r8a66597, SYSCFG0);
94 if (i++ > 500) {
95 printf("register access fail.\n");
96 return -1;
97 }
98 } while ((tmp & SCKE) != SCKE);
Chris Brandt11f46782017-11-27 14:04:10 -050099#else
100 /*
101 * RZ/A Only:
102 * Bits XTAL(UCKSEL) and UPLLE in SYSCFG0 for USB0 controls both USB0
103 * and USB1, so we must always set the USB0 register
104 */
105#if (CONFIG_R8A66597_XTAL == 1)
106 setbits(le16, R8A66597_BASE0, XTAL);
107#endif
108 mdelay(1);
109 setbits(le16, R8A66597_BASE0, UPLLE);
110 mdelay(1);
111 r8a66597_bset(r8a66597, SUSPM, SUSPMODE0);
112#endif /* CONFIG_RZA_USB */
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900113#endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */
114
115 return 0;
116}
117
118static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
119{
Chris Brandt11f46782017-11-27 14:04:10 -0500120#if !defined(CONFIG_RZA_USB)
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900121 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
122 udelay(1);
123#if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
124 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
125 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
126 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
127#endif
Chris Brandt11f46782017-11-27 14:04:10 -0500128#else
129 r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0);
130
131 clrbits(le16, R8A66597_BASE0, UPLLE);
132 mdelay(1);
133 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
134 mdelay(1);
135
136#endif
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900137}
138
139static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
140{
141 u16 val;
142
143 val = port ? DRPD : DCFM | DRPD;
144 r8a66597_bset(r8a66597, val, get_syscfg_reg(port));
145 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
146
Chris Brandt11f46782017-11-27 14:04:10 -0500147#if !defined(CONFIG_RZA_USB)
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900148 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port));
Chris Brandt11f46782017-11-27 14:04:10 -0500149#endif
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900150}
151
152static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)
153{
154 u16 val, tmp;
155
156 r8a66597_write(r8a66597, 0, get_intenb_reg(port));
157 r8a66597_write(r8a66597, 0, get_intsts_reg(port));
158
159 r8a66597_port_power(r8a66597, port, 0);
160
161 do {
162 tmp = r8a66597_read(r8a66597, SOFCFG) & EDGESTS;
163 udelay(640);
164 } while (tmp == EDGESTS);
165
166 val = port ? DRPD : DCFM | DRPD;
167 r8a66597_bclr(r8a66597, val, get_syscfg_reg(port));
168 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
169}
170
171static int enable_controller(struct r8a66597 *r8a66597)
172{
173 int ret, port;
174
175 ret = r8a66597_clock_enable(r8a66597);
176 if (ret < 0)
177 return ret;
178
Chris Brandt11f46782017-11-27 14:04:10 -0500179#if !defined(CONFIG_RZA_USB)
Nobuhiro Iwamatsu9d034202012-03-20 20:23:29 +0000180 r8a66597_bset(r8a66597, CONFIG_R8A66597_LDRV & LDRV, PINCFG);
Chris Brandt11f46782017-11-27 14:04:10 -0500181#endif
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900182 r8a66597_bset(r8a66597, USBE, SYSCFG0);
183
184 r8a66597_bset(r8a66597, INTL, SOFCFG);
185 r8a66597_write(r8a66597, 0, INTENB0);
yasuhisa umano8ecdce72014-04-18 11:33:08 +0900186 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)
187 r8a66597_write(r8a66597, 0, get_intenb_reg(port));
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900188
Nobuhiro Iwamatsu9d034202012-03-20 20:23:29 +0000189 r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, CFIFOSEL);
190 r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D0FIFOSEL);
191 r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D1FIFOSEL);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900192 r8a66597_bset(r8a66597, TRNENSEL, SOFCFG);
193
194 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)
195 r8a66597_enable_port(r8a66597, port);
196
197 return 0;
198}
199
200static void disable_controller(struct r8a66597 *r8a66597)
201{
202 int i;
203
204 if (!(r8a66597_read(r8a66597, SYSCFG0) & USBE))
205 return;
206
207 r8a66597_write(r8a66597, 0, INTENB0);
208 r8a66597_write(r8a66597, 0, INTSTS0);
209
210 r8a66597_write(r8a66597, 0, D0FIFOSEL);
211 r8a66597_write(r8a66597, 0, D1FIFOSEL);
212 r8a66597_write(r8a66597, 0, DCPCFG);
213 r8a66597_write(r8a66597, 0x40, DCPMAXP);
214 r8a66597_write(r8a66597, 0, DCPCTR);
215
216 for (i = 0; i <= 10; i++)
217 r8a66597_write(r8a66597, 0, get_devadd_addr(i));
218 for (i = 1; i <= 5; i++) {
219 r8a66597_write(r8a66597, 0, get_pipetre_addr(i));
220 r8a66597_write(r8a66597, 0, get_pipetrn_addr(i));
221 }
222 for (i = 1; i < R8A66597_MAX_NUM_PIPE; i++) {
223 r8a66597_write(r8a66597, 0, get_pipectr_addr(i));
224 r8a66597_write(r8a66597, i, PIPESEL);
225 r8a66597_write(r8a66597, 0, PIPECFG);
226 r8a66597_write(r8a66597, 0, PIPEBUF);
227 r8a66597_write(r8a66597, 0, PIPEMAXP);
228 r8a66597_write(r8a66597, 0, PIPEPERI);
229 }
230
231 for (i = 0; i < R8A66597_MAX_ROOT_HUB; i++)
232 r8a66597_disable_port(r8a66597, i);
233
234 r8a66597_clock_disable(r8a66597);
235}
236
237static void r8a66597_reg_wait(struct r8a66597 *r8a66597, unsigned long reg,
238 u16 mask, u16 loop)
239{
240 u16 tmp;
241 int i = 0;
242
243 do {
244 tmp = r8a66597_read(r8a66597, reg);
245 if (i++ > 1000000) {
246 printf("register%lx, loop %x is timeout\n", reg, loop);
247 break;
248 }
249 } while ((tmp & mask) != loop);
250}
251
252static void pipe_buffer_setting(struct r8a66597 *r8a66597,
253 struct usb_device *dev, unsigned long pipe)
254{
255 u16 val = 0;
256 u16 pipenum, bufnum, maxpacket;
257
258 if (usb_pipein(pipe)) {
259 pipenum = BULK_IN_PIPENUM;
260 bufnum = BULK_IN_BUFNUM;
261 maxpacket = dev->epmaxpacketin[usb_pipeendpoint(pipe)];
262 } else {
263 pipenum = BULK_OUT_PIPENUM;
264 bufnum = BULK_OUT_BUFNUM;
265 maxpacket = dev->epmaxpacketout[usb_pipeendpoint(pipe)];
266 }
267
268 if (r8a66597->pipe_config & (1 << pipenum))
269 return;
270 r8a66597->pipe_config |= (1 << pipenum);
271
272 r8a66597_bset(r8a66597, ACLRM, get_pipectr_addr(pipenum));
273 r8a66597_bclr(r8a66597, ACLRM, get_pipectr_addr(pipenum));
274 r8a66597_write(r8a66597, pipenum, PIPESEL);
275
276 /* FIXME: This driver support bulk transfer only. */
277 if (!usb_pipein(pipe))
278 val |= R8A66597_DIR;
279 else
280 val |= R8A66597_SHTNAK;
281 val |= R8A66597_BULK | R8A66597_DBLB | usb_pipeendpoint(pipe);
282 r8a66597_write(r8a66597, val, PIPECFG);
283
284 r8a66597_write(r8a66597, (8 << 10) | bufnum, PIPEBUF);
285 r8a66597_write(r8a66597, make_devsel(usb_pipedevice(pipe)) |
286 maxpacket, PIPEMAXP);
287 r8a66597_write(r8a66597, 0, PIPEPERI);
288 r8a66597_write(r8a66597, SQCLR, get_pipectr_addr(pipenum));
289}
290
291static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
292 struct devrequest *setup)
293{
294 int i;
295 unsigned short *p = (unsigned short *)setup;
296 unsigned long setup_addr = USBREQ;
297 u16 intsts1;
298 int timeout = 3000;
Chris Brandt11f46782017-11-27 14:04:10 -0500299#if defined(CONFIG_RZA_USB)
300 u16 dcpctr;
Chris Brandt11f46782017-11-27 14:04:10 -0500301#endif
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900302 u16 devsel = setup->request == USB_REQ_SET_ADDRESS ? 0 : dev->devnum;
303
304 r8a66597_write(r8a66597, make_devsel(devsel) |
305 (8 << dev->maxpacketsize), DCPMAXP);
306 r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1);
307
Chris Brandt11f46782017-11-27 14:04:10 -0500308#if defined(CONFIG_RZA_USB)
309 dcpctr = r8a66597_read(r8a66597, DCPCTR);
310 if ((dcpctr & PID) == PID_BUF) {
Chris Brandt243fd642017-11-29 14:49:21 -0500311 if (readw_poll_timeout(r8a66597->reg + DCPCTR, dcpctr,
312 dcpctr & BSTS, 1000) < 0) {
313 printf("DCPCTR BSTS timeout!\n");
314 return -ETIMEDOUT;
Chris Brandt11f46782017-11-27 14:04:10 -0500315 }
316 }
317#endif
318
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900319 for (i = 0; i < 4; i++) {
320 r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr);
321 setup_addr += 2;
322 }
323 r8a66597_write(r8a66597, ~0x0001, BRDYSTS);
324 r8a66597_write(r8a66597, SUREQ, DCPCTR);
325
326 while (1) {
327 intsts1 = r8a66597_read(r8a66597, INTSTS1);
328 if (intsts1 & SACK)
329 break;
330 if (intsts1 & SIGN) {
331 printf("setup packet send error\n");
332 return -1;
333 }
334 if (timeout-- < 0) {
335 printf("setup packet timeout\n");
336 return -1;
337 }
338 udelay(500);
339 }
340
341 return 0;
342}
343
344static int send_bulk_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
345 unsigned long pipe, void *buffer, int transfer_len)
346{
347 u16 tmp, bufsize;
348 u16 *buf;
349 size_t size;
350
351 R8A66597_DPRINT("%s\n", __func__);
352
353 r8a66597_mdfy(r8a66597, MBW | BULK_OUT_PIPENUM,
354 MBW | CURPIPE, CFIFOSEL);
355 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, BULK_OUT_PIPENUM);
356 tmp = r8a66597_read(r8a66597, CFIFOCTR);
357 if ((tmp & FRDY) == 0) {
358 printf("%s FRDY is not set (%x)\n", __func__, tmp);
359 return -1;
360 }
361
362 /* prepare parameters */
363 bufsize = dev->epmaxpacketout[usb_pipeendpoint(pipe)];
364 buf = (u16 *)(buffer + dev->act_len);
365 size = min((int)bufsize, transfer_len - dev->act_len);
366
367 /* write fifo */
368 r8a66597_write(r8a66597, ~(1 << BULK_OUT_PIPENUM), BEMPSTS);
369 if (buffer) {
370 r8a66597_write_fifo(r8a66597, CFIFO, buf, size);
371 r8a66597_write(r8a66597, BVAL, CFIFOCTR);
372 }
373
374 /* update parameters */
375 dev->act_len += size;
376
377 r8a66597_mdfy(r8a66597, PID_BUF, PID,
378 get_pipectr_addr(BULK_OUT_PIPENUM));
379
380 while (!(r8a66597_read(r8a66597, BEMPSTS) & (1 << BULK_OUT_PIPENUM)))
381 if (ctrlc())
382 return -1;
383 r8a66597_write(r8a66597, ~(1 << BULK_OUT_PIPENUM), BEMPSTS);
384
385 if (dev->act_len >= transfer_len)
386 r8a66597_mdfy(r8a66597, PID_NAK, PID,
387 get_pipectr_addr(BULK_OUT_PIPENUM));
388
389 return 0;
390}
391
392static int receive_bulk_packet(struct r8a66597 *r8a66597,
393 struct usb_device *dev,
394 unsigned long pipe,
395 void *buffer, int transfer_len)
396{
397 u16 tmp;
398 u16 *buf;
399 const u16 pipenum = BULK_IN_PIPENUM;
400 int rcv_len;
401 int maxpacket = dev->epmaxpacketin[usb_pipeendpoint(pipe)];
402
403 R8A66597_DPRINT("%s\n", __func__);
404
405 /* prepare */
406 if (dev->act_len == 0) {
407 r8a66597_mdfy(r8a66597, PID_NAK, PID,
408 get_pipectr_addr(pipenum));
409 r8a66597_write(r8a66597, ~(1 << pipenum), BRDYSTS);
410
411 r8a66597_write(r8a66597, TRCLR, get_pipetre_addr(pipenum));
412 r8a66597_write(r8a66597,
413 (transfer_len + maxpacket - 1) / maxpacket,
414 get_pipetrn_addr(pipenum));
415 r8a66597_bset(r8a66597, TRENB, get_pipetre_addr(pipenum));
416
417 r8a66597_mdfy(r8a66597, PID_BUF, PID,
418 get_pipectr_addr(pipenum));
419 }
420
421 r8a66597_mdfy(r8a66597, MBW | pipenum, MBW | CURPIPE, CFIFOSEL);
422 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum);
423
424 while (!(r8a66597_read(r8a66597, BRDYSTS) & (1 << pipenum)))
425 if (ctrlc())
426 return -1;
427 r8a66597_write(r8a66597, ~(1 << pipenum), BRDYSTS);
428
429 tmp = r8a66597_read(r8a66597, CFIFOCTR);
430 if ((tmp & FRDY) == 0) {
431 printf("%s FRDY is not set. (%x)\n", __func__, tmp);
432 return -1;
433 }
434
435 buf = (u16 *)(buffer + dev->act_len);
436 rcv_len = tmp & DTLN;
437 dev->act_len += rcv_len;
438
439 if (buffer) {
440 if (rcv_len == 0)
441 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
442 else
443 r8a66597_read_fifo(r8a66597, CFIFO, buf, rcv_len);
444 }
445
446 return 0;
447}
448
449static int receive_control_packet(struct r8a66597 *r8a66597,
450 struct usb_device *dev,
451 void *buffer, int transfer_len)
452{
453 u16 tmp;
454 int rcv_len;
455
456 /* FIXME: limit transfer size : 64byte or less */
457
458 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
459 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
460 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
461 r8a66597_bset(r8a66597, SQSET, DCPCTR);
462 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
463 r8a66597_mdfy(r8a66597, PID_BUF, PID, DCPCTR);
464
465 while (!(r8a66597_read(r8a66597, BRDYSTS) & 0x0001))
466 if (ctrlc())
467 return -1;
468 r8a66597_write(r8a66597, ~0x0001, BRDYSTS);
469
470 r8a66597_mdfy(r8a66597, MBW, MBW | CURPIPE, CFIFOSEL);
471 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
472
473 tmp = r8a66597_read(r8a66597, CFIFOCTR);
474 if ((tmp & FRDY) == 0) {
475 printf("%s FRDY is not set. (%x)\n", __func__, tmp);
476 return -1;
477 }
478
479 rcv_len = tmp & DTLN;
480 dev->act_len += rcv_len;
481
482 r8a66597_mdfy(r8a66597, PID_NAK, PID, DCPCTR);
483
484 if (buffer) {
485 if (rcv_len == 0)
486 r8a66597_write(r8a66597, BCLR, DCPCTR);
487 else
488 r8a66597_read_fifo(r8a66597, CFIFO, buffer, rcv_len);
489 }
490
491 return 0;
492}
493
494static int send_status_packet(struct r8a66597 *r8a66597,
495 unsigned long pipe)
496{
497 r8a66597_bset(r8a66597, SQSET, DCPCTR);
498 r8a66597_mdfy(r8a66597, PID_NAK, PID, DCPCTR);
499
500 if (usb_pipein(pipe)) {
501 r8a66597_bset(r8a66597, R8A66597_DIR, DCPCFG);
502 r8a66597_mdfy(r8a66597, ISEL, ISEL | CURPIPE, CFIFOSEL);
503 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
504 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
505 r8a66597_write(r8a66597, BCLR | BVAL, CFIFOCTR);
506 } else {
507 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
508 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
509 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
510 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
511 }
512 r8a66597_mdfy(r8a66597, PID_BUF, PID, DCPCTR);
513
514 while (!(r8a66597_read(r8a66597, BEMPSTS) & 0x0001))
515 if (ctrlc())
516 return -1;
517
518 return 0;
519}
520
521static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port)
522{
523 int count = R8A66597_MAX_SAMPLING;
524 unsigned short syssts, old_syssts;
525
526 R8A66597_DPRINT("%s\n", __func__);
527
528 old_syssts = r8a66597_read(r8a66597, get_syssts_reg(port) & LNST);
529 while (count > 0) {
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000530 mdelay(R8A66597_RH_POLL_TIME);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900531
532 syssts = r8a66597_read(r8a66597, get_syssts_reg(port) & LNST);
533 if (syssts == old_syssts) {
534 count--;
535 } else {
536 count = R8A66597_MAX_SAMPLING;
537 old_syssts = syssts;
538 }
539 }
540}
541
542static void r8a66597_bus_reset(struct r8a66597 *r8a66597, int port)
543{
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000544 mdelay(10);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900545 r8a66597_mdfy(r8a66597, USBRST, USBRST | UACT, get_dvstctr_reg(port));
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000546 mdelay(50);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900547 r8a66597_mdfy(r8a66597, UACT, USBRST | UACT, get_dvstctr_reg(port));
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000548 mdelay(50);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900549}
550
551static int check_usb_device_connecting(struct r8a66597 *r8a66597)
552{
553 int timeout = 10000; /* 100usec * 10000 = 1sec */
554 int i;
555
556 for (i = 0; i < 5; i++) {
557 /* check a usb cable connect */
558 while (!(r8a66597_read(r8a66597, INTSTS1) & ATTCH)) {
559 if (timeout-- < 0) {
560 printf("%s timeout.\n", __func__);
561 return -1;
562 }
563 udelay(100);
564 }
565
566 /* check a data line */
567 r8a66597_check_syssts(r8a66597, 0);
568
569 r8a66597_bus_reset(r8a66597, 0);
570 r8a66597->speed = get_rh_usb_speed(r8a66597, 0);
571
572 if (!(r8a66597_read(r8a66597, INTSTS1) & DTCH)) {
573 r8a66597->port_change = USB_PORT_STAT_C_CONNECTION;
574 r8a66597->port_status = USB_PORT_STAT_CONNECTION |
575 USB_PORT_STAT_ENABLE;
576 return 0; /* success */
577 }
578
579 R8A66597_DPRINT("USB device has detached. retry = %d\n", i);
580 r8a66597_write(r8a66597, ~DTCH, INTSTS1);
581 }
582
583 return -1; /* fail */
584}
585
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900586/*-------------------------------------------------------------------------*
587 * Virtual Root Hub
588 *-------------------------------------------------------------------------*/
589
Stephen Warreneb838e72014-02-13 21:15:18 -0700590#include <usbroothubdes.h>
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900591
592static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
593 void *buffer, int transfer_len, struct devrequest *cmd)
594{
595 struct r8a66597 *r8a66597 = &gr8a66597;
596 int leni = transfer_len;
597 int len = 0;
598 int stat = 0;
599 __u16 bmRType_bReq;
600 __u16 wValue;
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900601 __u16 wLength;
602 unsigned char data[32];
603
604 R8A66597_DPRINT("%s\n", __func__);
605
Remy Bohmer9dbc3662008-10-10 10:23:22 +0200606 if (usb_pipeint(pipe)) {
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900607 printf("Root-Hub submit IRQ: NOT implemented");
608 return 0;
609 }
610
611 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
612 wValue = cpu_to_le16 (cmd->value);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900613 wLength = cpu_to_le16 (cmd->length);
614
615 switch (bmRType_bReq) {
616 case RH_GET_STATUS:
617 *(__u16 *)buffer = cpu_to_le16(1);
618 len = 2;
619 break;
620 case RH_GET_STATUS | RH_INTERFACE:
621 *(__u16 *)buffer = cpu_to_le16(0);
622 len = 2;
623 break;
624 case RH_GET_STATUS | RH_ENDPOINT:
625 *(__u16 *)buffer = cpu_to_le16(0);
626 len = 2;
627 break;
628 case RH_GET_STATUS | RH_CLASS:
629 *(__u32 *)buffer = cpu_to_le32(0);
630 len = 4;
631 break;
632 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
633 *(__u32 *)buffer = cpu_to_le32(r8a66597->port_status |
634 (r8a66597->port_change << 16));
635 len = 4;
636 break;
637 case RH_CLEAR_FEATURE | RH_ENDPOINT:
638 case RH_CLEAR_FEATURE | RH_CLASS:
639 break;
640
641 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
642 switch (wValue) {
643 case RH_C_PORT_CONNECTION:
644 r8a66597->port_change &= ~USB_PORT_STAT_C_CONNECTION;
645 break;
646 }
647 break;
648
649 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
650 switch (wValue) {
651 case (RH_PORT_SUSPEND):
652 break;
653 case (RH_PORT_RESET):
654 r8a66597_bus_reset(r8a66597, 0);
655 break;
656 case (RH_PORT_POWER):
657 break;
658 case (RH_PORT_ENABLE):
659 break;
660 }
661 break;
662 case RH_SET_ADDRESS:
663 gr8a66597.rh_devnum = wValue;
664 break;
665 case RH_GET_DESCRIPTOR:
666 switch ((wValue & 0xff00) >> 8) {
667 case (0x01): /* device descriptor */
668 len = min_t(unsigned int,
669 leni,
670 min_t(unsigned int,
671 sizeof(root_hub_dev_des),
672 wLength));
673 memcpy(buffer, root_hub_dev_des, len);
674 break;
675 case (0x02): /* configuration descriptor */
676 len = min_t(unsigned int,
677 leni,
678 min_t(unsigned int,
679 sizeof(root_hub_config_des),
680 wLength));
681 memcpy(buffer, root_hub_config_des, len);
682 break;
683 case (0x03): /* string descriptors */
684 if (wValue == 0x0300) {
685 len = min_t(unsigned int,
686 leni,
687 min_t(unsigned int,
688 sizeof(root_hub_str_index0),
689 wLength));
690 memcpy(buffer, root_hub_str_index0, len);
691 }
692 if (wValue == 0x0301) {
693 len = min_t(unsigned int,
694 leni,
695 min_t(unsigned int,
696 sizeof(root_hub_str_index1),
697 wLength));
698 memcpy(buffer, root_hub_str_index1, len);
699 }
700 break;
701 default:
702 stat = USB_ST_STALLED;
703 }
704 break;
705
706 case RH_GET_DESCRIPTOR | RH_CLASS:
707 {
708 __u32 temp = 0x00000001;
709
710 data[0] = 9; /* min length; */
711 data[1] = 0x29;
712 data[2] = temp & RH_A_NDP;
713 data[3] = 0;
714 if (temp & RH_A_PSM)
715 data[3] |= 0x1;
716 if (temp & RH_A_NOCP)
717 data[3] |= 0x10;
718 else if (temp & RH_A_OCPM)
719 data[3] |= 0x8;
720
721 /* corresponds to data[4-7] */
722 data[5] = (temp & RH_A_POTPGT) >> 24;
723 data[7] = temp & RH_B_DR;
724 if (data[2] < 7) {
725 data[8] = 0xff;
726 } else {
727 data[0] += 2;
728 data[8] = (temp & RH_B_DR) >> 8;
729 data[10] = data[9] = 0xff;
730 }
731
732 len = min_t(unsigned int, leni,
733 min_t(unsigned int, data[0], wLength));
734 memcpy(buffer, data, len);
735 break;
736 }
737
738 case RH_GET_CONFIGURATION:
739 *(__u8 *) buffer = 0x01;
740 len = 1;
741 break;
742 case RH_SET_CONFIGURATION:
743 break;
744 default:
Nobuhiro Iwamatsue58c41e2008-09-18 20:13:08 +0900745 R8A66597_DPRINT("unsupported root hub command");
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900746 stat = USB_ST_STALLED;
747 }
748
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000749 mdelay(1);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900750
751 len = min_t(int, len, leni);
752
753 dev->act_len = len;
754 dev->status = stat;
755
756 return stat;
757}
758
759int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
760 int transfer_len)
761{
762 struct r8a66597 *r8a66597 = &gr8a66597;
763 int ret = 0;
764
765 R8A66597_DPRINT("%s\n", __func__);
766 R8A66597_DPRINT("pipe = %08x, buffer = %p, len = %d, devnum = %d\n",
767 pipe, buffer, transfer_len, dev->devnum);
768
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +0900769 set_devadd(r8a66597, dev->devnum, dev, 0);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900770
771 pipe_buffer_setting(r8a66597, dev, pipe);
772
773 dev->act_len = 0;
774 while (dev->act_len < transfer_len && ret == 0) {
775 if (ctrlc())
776 return -1;
777
778 if (usb_pipein(pipe))
779 ret = receive_bulk_packet(r8a66597, dev, pipe, buffer,
780 transfer_len);
781 else
782 ret = send_bulk_packet(r8a66597, dev, pipe, buffer,
783 transfer_len);
784 }
785
786 if (ret == 0)
787 dev->status = 0;
788
789 return ret;
790}
791
792int submit_control_msg(struct usb_device *dev, unsigned long pipe,
793 void *buffer, int transfer_len, struct devrequest *setup)
794{
795 struct r8a66597 *r8a66597 = &gr8a66597;
796 u16 r8a66597_address = setup->request == USB_REQ_SET_ADDRESS ?
797 0 : dev->devnum;
798
799 R8A66597_DPRINT("%s\n", __func__);
800 if (usb_pipedevice(pipe) == r8a66597->rh_devnum)
801 return r8a66597_submit_rh_msg(dev, pipe, buffer, transfer_len,
802 setup);
803
804 R8A66597_DPRINT("%s: setup\n", __func__);
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +0900805 set_devadd(r8a66597, r8a66597_address, dev, 0);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900806
807 if (send_setup_packet(r8a66597, dev, setup) < 0) {
808 printf("setup packet send error\n");
809 return -1;
810 }
811
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +0900812 dev->act_len = 0;
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900813 if (usb_pipein(pipe))
814 if (receive_control_packet(r8a66597, dev, buffer,
815 transfer_len) < 0)
816 return -1;
817
818 if (send_status_packet(r8a66597, pipe) < 0)
819 return -1;
820
821 dev->status = 0;
822
823 return 0;
824}
825
826int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
827 int transfer_len, int interval)
828{
829 /* no implement */
830 R8A66597_DPRINT("%s\n", __func__);
831 return 0;
832}
833
Troy Kisky06d513e2013-10-10 15:27:56 -0700834int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900835{
836 struct r8a66597 *r8a66597 = &gr8a66597;
837
838 R8A66597_DPRINT("%s\n", __func__);
839
Yasuhisa Umano198c5f92014-04-18 11:33:15 +0900840 memset(r8a66597, 0, sizeof(*r8a66597));
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900841 r8a66597->reg = CONFIG_R8A66597_BASE_ADDR;
842
843 disable_controller(r8a66597);
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000844 mdelay(100);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900845
846 enable_controller(r8a66597);
847 r8a66597_port_power(r8a66597, 0 , 1);
848
849 /* check usb device */
850 check_usb_device_connecting(r8a66597);
851
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000852 mdelay(50);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900853
854 return 0;
855}
856
Lucas Stachc7e3b2b2012-09-26 00:14:34 +0200857int usb_lowlevel_stop(int index)
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900858{
859 disable_controller(&gr8a66597);
860
861 return 0;
862}