blob: 7c35d8cd468489b28dbf4cbdd771344ce1d2ee50 [file] [log] [blame]
Sergey Temerkhanov746f9852015-10-14 09:55:50 -07001/**
2 * (C) Copyright 2014, Cavium Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5**/
6
7#ifndef __THUNDERX_88XX_H__
8#define __THUNDERX_88XX_H__
9
10#define CONFIG_REMAKE_ELF
11
12#define CONFIG_THUNDERX
13
14#define CONFIG_SYS_64BIT
15
16#define CONFIG_SYS_NO_FLASH
17
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070018#define CONFIG_IDENT_STRING \
19 " for Cavium Thunder CN88XX ARM v8 Multi-Core"
20#define CONFIG_BOOTP_VCI_STRING "Diagnostics"
21
22#define MEM_BASE 0x00500000
23
Sergey Temerkhanov900f88f2015-10-14 09:55:51 -070024#define CONFIG_SYS_LOWMEM_BASE MEM_BASE
25
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070026/* Link Definitions */
27#define CONFIG_SYS_TEXT_BASE 0x00500000
28#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
29
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070030/* SMP Spin Table Definitions */
31#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
32
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070033/* Generic Timer Definitions */
34#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
35
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070036#define CONFIG_SYS_MEMTEST_START MEM_BASE
37#define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE)
38
39/* Size of malloc() pool */
40#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
41
42/* PL011 Serial Configuration */
43
44#define CONFIG_PL01X_SERIAL
45#define CONFIG_PL011_CLOCK 24000000
46#define CONFIG_CONS_INDEX 1
47
48/* Generic Interrupt Controller Definitions */
49#define GICD_BASE (0x801000000000)
50#define GICR_BASE (0x801000002000)
51#define CONFIG_SYS_SERIAL0 0x87e024000000
52#define CONFIG_SYS_SERIAL1 0x87e025000000
53
54#define CONFIG_BAUDRATE 115200
55
56/* Command line configuration */
57#define CONFIG_MENU
58
59/* BOOTP options */
60#define CONFIG_BOOTP_BOOTFILESIZE
61#define CONFIG_BOOTP_BOOTPATH
62#define CONFIG_BOOTP_GATEWAY
63#define CONFIG_BOOTP_HOSTNAME
64#define CONFIG_BOOTP_PXE
65#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
66
67/* Miscellaneous configurable options */
68#define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
69
70/* Physical Memory Map */
71#define CONFIG_NR_DRAM_BANKS 1
72#define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
73#define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
74#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
75
76/* Initial environment variables */
77#define UBOOT_IMG_HEAD_SIZE 0x40
78/* C80000 - 0x40 */
79#define CONFIG_EXTRA_ENV_SETTINGS \
80 "kernel_addr=08007ffc0\0" \
81 "fdt_addr=0x94C00000\0" \
82 "fdt_high=0x9fffffff\0"
83
84#define CONFIG_BOOTARGS \
85 "console=ttyAMA0,115200n8 " \
86 "earlycon=pl011,0x87e024000000 " \
87 "debug maxcpus=48 rootwait rw "\
88 "root=/dev/sda2 coherent_pool=16M"
89#define CONFIG_BOOTDELAY 5
90
91/* Do not preserve environment */
92#define CONFIG_ENV_IS_NOWHERE 1
93#define CONFIG_ENV_SIZE 0x1000
94
95/* Monitor Command Prompt */
96#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
97#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
98 sizeof(CONFIG_SYS_PROMPT) + 16)
Sergey Temerkhanov746f9852015-10-14 09:55:50 -070099#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
100#define CONFIG_SYS_LONGHELP
101#define CONFIG_CMDLINE_EDITING 1
102#define CONFIG_SYS_MAXARGS 64 /* max command args */
103#define CONFIG_NO_RELOCATION 1
104#define CONFIG_LIB_RAND
105#define PLL_REF_CLK 50000000 /* 50 MHz */
106#define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK)
107
108#endif /* __THUNDERX_88XX_H__ */